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Merge pull request #718 from 86Box/bugfix/wd80x3_ramhandler

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Simplified memory handler for the wd80x3 nic family.
This commit is contained in:
OBattler
2020-04-23 20:37:37 +02:00
committed by GitHub
parent 7d322aaf34 191687e5ac
commit af9b08e88f
2 changed files with 23 additions and 88 deletions
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24
src/network/net_dp8390.c
View File

@@ -204,11 +204,8 @@ dp8390_write_cr(dp8390_t *dev, uint32_t val)
/* Check for start-tx */ /* Check for start-tx */
if ((val & 0x04) && dev->TCR.loop_cntl) { if ((val & 0x04) && dev->TCR.loop_cntl) {
if (dev->TCR.loop_cntl) { if (dev->TCR.loop_cntl) {
if ((dev->flags & DP8390_FLAG_CHECK_CR) || (dev->flags & DP8390_FLAG_EVEN_MAC)) dp8390_rx(dev, &dev->mem[(dev->tx_page_start * 256) - dev->mem_start],
dp8390_rx(dev, &dev->mem[(dev->tx_page_start * 256) - dev->mem_start], dev->tx_bytes);
dev->tx_bytes);
else
dp8390_rx(dev, dev->mem, dev->tx_bytes);
} }
} else if (val & 0x04) { } else if (val & 0x04) {
if (dev->CR.stop || (!dev->CR.start && (dev->flags & DP8390_FLAG_CHECK_CR))) { if (dev->CR.stop || (!dev->CR.start && (dev->flags & DP8390_FLAG_CHECK_CR))) {
@@ -226,11 +223,8 @@ dp8390_write_cr(dp8390_t *dev, uint32_t val)
/* Send the packet to the system driver */ /* Send the packet to the system driver */
dev->CR.tx_packet = 1; dev->CR.tx_packet = 1;
if ((dev->flags & DP8390_FLAG_CHECK_CR) || (dev->flags & DP8390_FLAG_EVEN_MAC)) network_tx(&dev->mem[(dev->tx_page_start * 256) - dev->mem_start], dev->tx_bytes);
network_tx(&dev->mem[(dev->tx_page_start * 256) - dev->mem_start], dev->tx_bytes);
else
network_tx(dev->mem, dev->tx_bytes);
/* some more debug */ /* some more debug */
#ifdef ENABLE_DP8390_LOG #ifdef ENABLE_DP8390_LOG
@@ -394,10 +388,7 @@ dp8390_rx(void *priv, uint8_t *buf, int io_len)
pkthdr[0], pkthdr[1], pkthdr[2], pkthdr[3]); pkthdr[0], pkthdr[1], pkthdr[2], pkthdr[3]);
/* Copy into buffer, update curpage, and signal interrupt if config'd */ /* Copy into buffer, update curpage, and signal interrupt if config'd */
if ((dev->flags & DP8390_FLAG_CHECK_CR) || (dev->flags & DP8390_FLAG_EVEN_MAC)) startptr = &dev->mem[(dev->curr_page * 256) - dev->mem_start];
startptr = &dev->mem[(dev->curr_page * 256) - dev->mem_start];
else
startptr = dev->mem + ((dev->curr_page * 256) - dev->mem_start);
memcpy(startptr, pkthdr, sizeof(pkthdr)); memcpy(startptr, pkthdr, sizeof(pkthdr));
if ((nextpage > dev->curr_page) || if ((nextpage > dev->curr_page) ||
((dev->curr_page + pages) == dev->page_stop)) { ((dev->curr_page + pages) == dev->page_stop)) {
@@ -405,10 +396,7 @@ dp8390_rx(void *priv, uint8_t *buf, int io_len)
} else { } else {
endbytes = (dev->page_stop - dev->curr_page) * 256; endbytes = (dev->page_stop - dev->curr_page) * 256;
memcpy(startptr+sizeof(pkthdr), buf, endbytes-sizeof(pkthdr)); memcpy(startptr+sizeof(pkthdr), buf, endbytes-sizeof(pkthdr));
if ((dev->flags & DP8390_FLAG_CHECK_CR) || (dev->flags & DP8390_FLAG_EVEN_MAC)) startptr = &dev->mem[(dev->page_start * 256) - dev->mem_start];
startptr = &dev->mem[(dev->page_start * 256) - dev->mem_start];
else
startptr = dev->mem + ((dev->page_start * 256) - dev->mem_start);
memcpy(startptr, buf+endbytes-sizeof(pkthdr), io_len-endbytes+8); memcpy(startptr, buf+endbytes-sizeof(pkthdr), io_len-endbytes+8);
} }
dev->curr_page = nextpage; dev->curr_page = nextpage;

87
src/network/net_wd8003.c
View File

@@ -175,68 +175,22 @@ wd_soft_reset(void *priv)
} }
static uint32_t
wd_ram_read(uint32_t addr, unsigned len, void *priv)
{
wd_t *dev = (wd_t *)priv;
uint32_t ret;
uint16_t ram_mask = dev->ram_size - 1;
ret = dev->dp8390->mem[addr & ram_mask];
if (len == 2)
ret |= dev->dp8390->mem[(addr + 1) & ram_mask] << 8;
return ret;
}
static uint8_t static uint8_t
wd_ram_readb(uint32_t addr, void *priv) wd_ram_read(uint32_t addr, void *priv)
{ {
wd_t *dev = (wd_t *)priv; wd_t *dev = (wd_t *)priv;
return wd_ram_read(addr, 1, dev); wdlog("WD80x3: RAM Read: addr=%06x, val=%02x\n", addr & (dev->ram_size - 1), dev->dp8390->mem[addr & (dev->ram_size - 1)]);
return dev->dp8390->mem[addr & (dev->ram_size - 1)];
} }
static uint16_t
wd_ram_readw(uint32_t addr, void *priv)
{
wd_t *dev = (wd_t *)priv;
return wd_ram_read(addr, 2, dev);
}
static void static void
wd_ram_write(uint32_t addr, uint32_t val, unsigned len, void *priv) wd_ram_write(uint32_t addr, uint8_t val, void *priv)
{ {
wd_t *dev = (wd_t *)priv; wd_t *dev = (wd_t *)priv;
uint16_t ram_mask = dev->ram_size - 1;
dev->dp8390->mem[addr & (dev->ram_size - 1)] = val;
dev->dp8390->mem[addr & ram_mask] = val & 0xff; wdlog("WD80x3: RAM Write: addr=%06x, val=%02x\n", addr & (dev->ram_size - 1), val);
if (len == 2)
dev->dp8390->mem[(addr + 1) & ram_mask] = val >> 8;
}
static void
wd_ram_writeb(uint32_t addr, uint8_t val, void *priv)
{
wd_t *dev = (wd_t *)priv;
wd_ram_write(addr, val, 1, dev);
}
static void
wd_ram_writew(uint32_t addr, uint16_t val, void *priv)
{
wd_t *dev = (wd_t *)priv;
wd_ram_write(addr, val, 2, dev);
} }
@@ -605,7 +559,7 @@ wd_mca_write(int port, uint8_t val, void *priv)
* So, remove current address, if any. * So, remove current address, if any.
*/ */
if (dev->base_address) if (dev->base_address)
wd_io_remove(dev, dev->base_address); wd_io_remove(dev, dev->base_address);
dev->base_address = (dev->pos_regs[2] & 0xfe) << 4; dev->base_address = (dev->pos_regs[2] & 0xfe) << 4;
dev->ram_addr = (dev->pos_regs[3] & 0xfc) << 12; dev->ram_addr = (dev->pos_regs[3] & 0xfc) << 12;
@@ -685,7 +639,7 @@ wd_init(const device_t *info)
dev->dp8390 = device_add(&dp8390_device); dev->dp8390 = device_add(&dp8390_device);
dev->dp8390->priv = dev; dev->dp8390->priv = dev;
dev->dp8390->interrupt = wd_interrupt; dev->dp8390->interrupt = wd_interrupt;
dp8390_set_defaults(dev->dp8390, DP8390_FLAG_CLEAR_IRQ); dp8390_set_defaults(dev->dp8390, DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ);
switch(dev->board) { switch(dev->board) {
/* Ethernet, ISA, no interface chip, RAM 8k */ /* Ethernet, ISA, no interface chip, RAM 8k */
@@ -748,25 +702,18 @@ wd_init(const device_t *info)
memcpy(dev->dp8390->physaddr, dev->maclocal, sizeof(dev->maclocal)); memcpy(dev->dp8390->physaddr, dev->maclocal, sizeof(dev->maclocal));
wdlog("%s: I/O=%04x, IRQ=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n", wdlog("%s: I/O=%04x, IRQ=%d, MAC=%02x:%02x:%02x:%02x:%02x:%02x\n",
dev->name, dev->base_address, dev->irq, dev->name, dev->base_address, dev->irq,
dev->dp8390->physaddr[0], dev->dp8390->physaddr[1], dev->dp8390->physaddr[2], dev->dp8390->physaddr[0], dev->dp8390->physaddr[1], dev->dp8390->physaddr[2],
dev->dp8390->physaddr[3], dev->dp8390->physaddr[4], dev->dp8390->physaddr[5]); dev->dp8390->physaddr[3], dev->dp8390->physaddr[4], dev->dp8390->physaddr[5]);
/* Reset the board. */ /* Reset the board. */
wd_reset(dev); wd_reset(dev);
/* Map this system into the memory map. */ /* Map this system into the memory map. */
if (dev->bit16 & 1) { mem_mapping_add(&dev->ram_mapping, dev->ram_addr, dev->ram_size,
mem_mapping_add(&dev->ram_mapping, dev->ram_addr, dev->ram_size, wd_ram_read, NULL, NULL,
wd_ram_readb, wd_ram_readw, NULL, wd_ram_write, NULL, NULL,
wd_ram_writeb, wd_ram_writew, NULL, NULL, MEM_MAPPING_EXTERNAL, dev);
NULL, MEM_MAPPING_EXTERNAL, dev);
} else {
mem_mapping_add(&dev->ram_mapping, dev->ram_addr, dev->ram_size,
wd_ram_readb, NULL, NULL,
wd_ram_writeb, NULL, NULL,
NULL, MEM_MAPPING_EXTERNAL, dev);
}
mem_mapping_disable(&dev->ram_mapping); mem_mapping_disable(&dev->ram_mapping);