Added MSR C2 to the i686 CPU's.
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@@ -107,6 +107,7 @@ uint64_t mtrr_deftype_msr = 0;
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uint64_t ecx17_msr = 0;
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uint64_t ecx17_msr = 0;
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uint64_t ecx79_msr = 0;
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uint64_t ecx79_msr = 0;
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uint64_t ecx8x_msr[4] = {0, 0, 0, 0};
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uint64_t ecx8x_msr[4] = {0, 0, 0, 0};
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uint64_t ecxc2_msr = 0;
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uint64_t ecx116_msr = 0;
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uint64_t ecx116_msr = 0;
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uint64_t ecx11x_msr[4] = {0, 0, 0, 0};
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uint64_t ecx11x_msr[4] = {0, 0, 0, 0};
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uint64_t ecx11e_msr = 0;
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uint64_t ecx11e_msr = 0;
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@@ -1988,6 +1989,10 @@ void cpu_RDMSR()
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EAX = ecx8x_msr[ECX - 0x88] & 0xffffffff;
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EAX = ecx8x_msr[ECX - 0x88] & 0xffffffff;
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EDX = ecx8x_msr[ECX - 0x88] >> 32;
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EDX = ecx8x_msr[ECX - 0x88] >> 32;
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break;
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break;
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case 0xC2:
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EAX = ecxc2_msr & 0xffffffff;
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EDX = ecxc2_msr >> 32;
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break;
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case 0xFE:
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case 0xFE:
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EAX = mtrr_cap_msr & 0xffffffff;
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EAX = mtrr_cap_msr & 0xffffffff;
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EDX = mtrr_cap_msr >> 32;
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EDX = mtrr_cap_msr >> 32;
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@@ -2183,6 +2188,9 @@ void cpu_WRMSR()
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case 0x88 ... 0x8B:
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case 0x88 ... 0x8B:
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ecx8x_msr[ECX - 0x88] = EAX | ((uint64_t)EDX << 32);
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ecx8x_msr[ECX - 0x88] = EAX | ((uint64_t)EDX << 32);
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break;
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break;
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case 0xC2:
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ecxc2_msr = EAX | ((uint64_t)EDX << 32);
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break;
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case 0xFE:
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case 0xFE:
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mtrr_cap_msr = EAX | ((uint64_t)EDX << 32);
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mtrr_cap_msr = EAX | ((uint64_t)EDX << 32);
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break;
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break;
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