80486DX2-66/86Box-fork
1
0
Fork 0
Code Issues Pull Requests Activity

Aded optional PCI slot logging to detect unassigned slots (used for detecting what slot the southbridge should use, for example).

Browse Source
This commit is contained in:
OBattler
2020-03-23 02:41:18 +01:00
parent ae1f1529ea
commit b1aea66e41
1 changed files with 32 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

39
src/pci.c
View File

@@ -127,7 +127,15 @@ pci_write(uint16_t port, uint8_t val, void *priv)
pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); pci_log("Writing to PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv);
} }
#ifdef ENABLE_PCI_LOG
else
pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
#endif
} }
#ifdef ENABLE_PCI_LOG
else
pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
#endif
} }
break; break;
@@ -150,7 +158,15 @@ pci_read(uint16_t port, void *priv)
if (slot != 0xff) { if (slot != 0xff) {
if (pci_cards[slot].read) if (pci_cards[slot].read)
return pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); return pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv);
#ifdef ENABLE_PCI_LOG
else
pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
#endif
} }
#ifdef ENABLE_PCI_LOG
else
pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
#endif
} }
return 0xff; return 0xff;
@@ -237,10 +253,15 @@ pci_type2_write(uint16_t port, uint8_t val, void *priv)
if (slot != 0xff) { if (slot != 0xff) {
if (pci_cards[slot].write) if (pci_cards[slot].write)
pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv);
#ifdef ENABLE_PCI_LOG
else else
pclog("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
} else #endif
pclog("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); }
#ifdef ENABLE_PCI_LOG
else
pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
#endif
} }
} }
} }
@@ -265,10 +286,15 @@ pci_type2_read(uint16_t port, void *priv)
if (slot != 0xff) { if (slot != 0xff) {
if (pci_cards[slot].read) if (pci_cards[slot].read)
return pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); return pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv);
#ifdef ENABLE_PCI_LOG
else else
pclog("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
} else #endif
pclog("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); }
#ifdef ENABLE_PCI_LOG
else
pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index);
#endif
} }
return 0xff; return 0xff;
@@ -649,7 +675,6 @@ void
trc_write(uint16_t port, uint8_t val, void *priv) trc_write(uint16_t port, uint8_t val, void *priv)
{ {
pci_log("TRC Write: %02X\n", val); pci_log("TRC Write: %02X\n", val);
pclog("[%04X:%08X] TRC Write: %02X\n", CS, cpu_state.pc, val);
if (!(trc_reg & 4) && (val & 4)) if (!(trc_reg & 4) && (val & 4))
trc_reset(val); trc_reset(val);