Fixed the SMC FDC37C932FR's GPIO port change handler.
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@@ -9,7 +9,7 @@
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* Implementation of the SMC FDC37C932FR and FDC37C935 Super
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* I/O Chips.
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*
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* Version: @(#)sio_fdc37c93x.c 1.0.10 2018/01/16
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* Version: @(#)sio_fdc37c93x.c 1.0.11 2018/03/14
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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* Copyright 2016-2018 Miran Grca.
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@@ -36,7 +36,7 @@ static int fdc37c93x_curreg = 0;
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static int fdc37c93x_gpio_reg = 0;
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static uint8_t fdc37c93x_regs[48];
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static uint8_t fdc37c93x_ld_regs[10][256];
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static uint8_t fdc37c93x_gpio_base = 0x00EA;
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static uint16_t fdc37c93x_gpio_base = 0x00EA;
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static fdc_t *fdc37c93x_fdc;
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static uint8_t tries;
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@@ -122,12 +122,12 @@ static void fdc37c93x_auxio_handler(void)
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{
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uint16_t ld_port = 0;
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uint8_t local_enable = !!fdc37c93x_ld_regs[3][0x30];
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uint8_t local_enable = !!fdc37c93x_ld_regs[8][0x30];
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io_removehandler(fdc37c93x_gpio_base, 0x0001, fdc37c93x_gpio_read, NULL, NULL, fdc37c93x_gpio_write, NULL, NULL, NULL);
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if (local_enable)
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{
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fdc37c93x_gpio_base = ld_port = make_port(3);
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fdc37c93x_gpio_base = ld_port = make_port(8);
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/* pclog("fdc37c93x: Setting Auxiliary I/O port to %04X\n", ld_port); */
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if ((ld_port >= 0x0100) && (ld_port <= 0x0FFF))
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io_sethandler(fdc37c93x_gpio_base, 0x0001, fdc37c93x_gpio_read, NULL, NULL, fdc37c93x_gpio_write, NULL, NULL, NULL);
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@@ -377,7 +377,7 @@ process_value:
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}
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break;
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case 8:
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/* Serial port 2 */
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/* Auxiliary I/O */
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switch(fdc37c93x_curreg)
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{
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case 0x30:
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