From b833f39496f9bef605bed6826e986cfd8948ff7d Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Mon, 23 Mar 2020 02:37:06 +0100
Subject: [PATCH] ROM read and Winbond fixes, also added the Winbond 83977EF.

---
 src/rom.c         |  6 +++---
 src/sio.h         |  1 +
 src/sio_w83877f.c |  1 -
 src/sio_w83977f.c | 46 +++++++++++++++++++++++++++++++---------------
 4 files changed, 35 insertions(+), 19 deletions(-)

diff --git a/src/rom.c b/src/rom.c
index 174ca0479..1853fb3f0 100644
--- a/src/rom.c
+++ b/src/rom.c
@@ -121,7 +121,7 @@ rom_read(uint32_t addr, void *priv)
 	return 0xff;
     if (addr >= (rom->mapping.base + rom->sz))
 	return 0xff;
-    return(rom->rom[addr & rom->mask]);
+    return(rom->rom[(addr - rom->mapping.base) & rom->mask]);
 }
 
 
@@ -139,7 +139,7 @@ rom_readw(uint32_t addr, void *priv)
 	return 0xffff;
     if (addr >= (rom->mapping.base + rom->sz))
 	return 0xffff;
-    return(*(uint16_t *)&rom->rom[addr & rom->mask]);
+    return(*(uint16_t *)&rom->rom[(addr - rom->mapping.base) & rom->mask]);
 }
 
 
@@ -157,7 +157,7 @@ rom_readl(uint32_t addr, void *priv)
 	return 0xffffffff;
     if (addr >= (rom->mapping.base + rom->sz))
 	return 0xffffffff;
-    return(*(uint32_t *)&rom->rom[addr & rom->mask]);
+    return(*(uint32_t *)&rom->rom[(addr - rom->mapping.base) & rom->mask]);
 }
 
 
diff --git a/src/sio.h b/src/sio.h
index fc6c2bd61..6009545ee 100644
--- a/src/sio.h
+++ b/src/sio.h
@@ -35,6 +35,7 @@ extern const device_t	w83877tf_device;
 extern const device_t	w83877tf_acorp_device;
 extern const device_t	w83977f_device;
 extern const device_t	w83977tf_device;
+extern const device_t	w83977ef_device;
 
 
 #endif	/*EMU_SIO_H*/
diff --git a/src/sio_w83877f.c b/src/sio_w83877f.c
index dadce5a6c..c9304e7db 100644
--- a/src/sio_w83877f.c
+++ b/src/sio_w83877f.c
@@ -253,7 +253,6 @@ w83877f_write(uint16_t port, uint8_t val, void *priv)
 	return;
     } else if ((port == 0x252) || (port == 0x3f1)) {
 	if (dev->locked) {
-		pclog("dev->locked\n");
 		if (dev->rw_locked)
 			return;
 		if ((dev->cur_reg >= 0x26) && (dev->cur_reg <= 0x27))
diff --git a/src/sio_w83977f.c b/src/sio_w83977f.c
index 286aa074a..770ce2c7a 100644
--- a/src/sio_w83977f.c
+++ b/src/sio_w83977f.c
@@ -88,7 +88,6 @@ w83977f_fdc_handler(w83977f_t *dev)
 
     fdc_remove(dev->fdc);
 
-    pclog("fdc: %02X %02X %04X\n", dev->dev_regs[0][0x00], dev->regs[0x22], io_base);
     if ((dev->dev_regs[0][0x00] & 0x01) && (dev->regs[0x22] & 0x01) && (io_base >= 0x100) && (io_base <= 0xff8))
 	fdc_set_base(dev->fdc, io_base);
 
@@ -153,8 +152,6 @@ w83977f_write(uint16_t port, uint8_t val, void *priv)
     uint8_t valxor = 0;
     uint8_t ld = dev->regs[7];
 
-    pclog("W83977F Write: %04X %02X\n", port, val);
-
     if (index) {
 	if ((val == 0x87) && !dev->locked) {
 		if (dev->tries) {
@@ -191,8 +188,8 @@ w83977f_write(uint16_t port, uint8_t val, void *priv)
 
     switch (dev->cur_reg) {
 	case 0x02:
-		if (valxor & 0x02)
-			softresetx86();
+		/* if (valxor & 0x02)
+			softresetx86(); */
 		break;
 	case 0x22:
 		if (valxor & 0x20)
@@ -205,8 +202,11 @@ w83977f_write(uint16_t port, uint8_t val, void *priv)
 			w83977f_fdc_handler(dev);
 		break;
 	case 0x26:
+		if (valxor & 0x40)
+			w83977f_remap(dev);
 		if (valxor & 0x20)
 			dev->rw_locked = (val & 0x20) ? 1 : 0;
+		break;
 	case 0x30:
 		if (valxor & 0x01)  switch (ld) {
 			case 0x00:
@@ -329,8 +329,6 @@ w83977f_read(uint16_t port, void *priv)
 	}
     }
 
-    pclog("W83977F Read: %04X %02X\n", port, ret);
-
     return ret;
 }
 
@@ -344,8 +342,13 @@ w83977f_reset(w83977f_t *dev)
     for (i = 0; i < 256; i++)
 	memset(dev->dev_regs[i], 0, 208);
 
-    dev->regs[0x20] = 0x97;
-    dev->regs[0x21] = dev->type ? 0x73 : 0x71;
+    if (dev->type < 2) {
+	dev->regs[0x20] = 0x97;
+	dev->regs[0x21] = dev->type ? 0x73 : 0x71;
+    } else {
+	dev->regs[0x20] = 0x52;
+	dev->regs[0x21] = 0xf0;
+    }
     dev->regs[0x22] = 0xff;
     dev->regs[0x24] = dev->type ? 0x84 : 0xa4;
 
@@ -368,9 +371,9 @@ w83977f_reset(w83977f_t *dev)
     dev->dev_regs[1][0x30] = 0x03; dev->dev_regs[1][0x31] = 0x78;
     dev->dev_regs[1][0x40] = 0x07;
     if (!dev->type)
-	dev->dev_regs[1][0x41] = 0x02;	/* Read-only */
+	dev->dev_regs[1][0x41] = 0x01 /*0x02*/;	/* Read-only */
     dev->dev_regs[1][0x44] = 0x04;
-    dev->dev_regs[1][0xc0] = 0x3c;	/* The datasheet says default is 3f, but also default is priner mode. */
+    dev->dev_regs[1][0xc0] = 0x3c;	/* The datasheet says default is 3f, but also default is printer mode. */
 
     /* Logical Device 2 (UART A) */
     dev->dev_regs[2][0x00] = 0x01;
@@ -404,6 +407,7 @@ w83977f_reset(w83977f_t *dev)
     if (!dev->type)
 	dev->dev_regs[5][0x01] = 0x02;
     dev->dev_regs[5][0x30] = 0x00; dev->dev_regs[5][0x31] = 0x60;
+    dev->dev_regs[5][0x32] = 0x00; dev->dev_regs[5][0x33] = 0x64;
     dev->dev_regs[5][0x40] = 0x01;
     if (!dev->type)
 	dev->dev_regs[5][0x41] = 0x02;	/* Read-only */
@@ -448,10 +452,12 @@ w83977f_reset(w83977f_t *dev)
 
     /* Logical Device 9 (Auxiliary I/O Part III) */
     if (dev->type) {
-	dev->dev_regs[7][0xb0] = 0x01; dev->dev_regs[7][0xb1] = 0x01;
-	dev->dev_regs[7][0xb2] = 0x01; dev->dev_regs[7][0xb3] = 0x01;
-	dev->dev_regs[7][0xb4] = 0x01; dev->dev_regs[7][0xb5] = 0x01;
-	dev->dev_regs[7][0xb6] = 0x01; dev->dev_regs[7][0xb7] = 0x01;
+	dev->dev_regs[9][0xb0] = 0x01; dev->dev_regs[9][0xb1] = 0x01;
+	dev->dev_regs[9][0xb2] = 0x01; dev->dev_regs[9][0xb3] = 0x01;
+	dev->dev_regs[9][0xb4] = 0x01; dev->dev_regs[9][0xb5] = 0x01;
+	dev->dev_regs[9][0xb6] = 0x01; dev->dev_regs[9][0xb7] = 0x01;
+
+	dev->dev_regs[10][0xc0] = 0x8f;
     }
 
     fdc_reset(dev->fdc);
@@ -517,3 +523,13 @@ const device_t w83977tf_device = {
     NULL, NULL, NULL,
     NULL
 };
+
+
+const device_t w83977ef_device = {
+    "Winbond W83977TF Super I/O",
+    0,
+    2,
+    w83977f_init, w83977f_close, NULL,
+    NULL, NULL, NULL,
+    NULL
+};