From bc4f006e5904f36b08e3a0a222f3d9ea11388177 Mon Sep 17 00:00:00 2001
From: Jasmine Iwanek <jasmine@iwanek.co.uk>
Date: Sat, 21 Oct 2023 19:42:14 -0400
Subject: [PATCH] Named-initializers for 8086 CPU's

---
 src/cpu/cpu_table.c | 110 +++++++++++++++++++++++++++++++++++++++++---
 1 file changed, 103 insertions(+), 7 deletions(-)

diff --git a/src/cpu/cpu_table.c b/src/cpu/cpu_table.c
index f12bb254a..e52697ab7 100644
--- a/src/cpu/cpu_table.c
+++ b/src/cpu/cpu_table.c
@@ -264,13 +264,109 @@ const cpu_family_t cpu_families[] = {
     .name = "8086",
     .internal_name = "8086",
     .cpus = (const CPU[]) {
-        {"7.16",    CPU_8086, fpus_8088,   7159092,    1, 5000, 0, 0, 0, CPU_ALTERNATE_XTAL, 0,0,0,0, 1},
-        {"8",       CPU_8086, fpus_8088,   8000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
-        {"9.54",    CPU_8086, fpus_8088,   9545456,    1, 5000, 0, 0, 0, CPU_ALTERNATE_XTAL, 0,0,0,0, 1},
-        {"10",      CPU_8086, fpus_8088,  10000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
-        {"12",      CPU_8086, fpus_8088,  12000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 1},
-        {"16",      CPU_8086, fpus_8088,  16000000,    1, 5000, 0, 0, 0, 0, 0,0,0,0, 2},
-        {"", 0}
+        {
+            .name = "7.16",
+            .cpu_type = CPU_8086,
+            .fpus = fpus_8088,
+            .rspeed = 7159092,
+            .multi = 1,
+            .voltage = 5000,
+            .edx_reset = 0,
+            .cpuid_model = 0,
+            .cyrix_id = 0,
+            .cpu_flags = CPU_ALTERNATE_XTAL,
+            .mem_read_cycles = 0,
+            .mem_write_cycles = 0,
+            .cache_read_cycles = 0,
+            .cache_write_cycles = 0,
+            .atclk_div = 1
+        },
+        {
+            .name = "8",
+            .cpu_type = CPU_8086,
+            .fpus = fpus_8088,
+            .rspeed = 8000000,
+            .multi = 1,
+            .voltage = 5000,
+            .edx_reset = 0,
+            .cpuid_model = 0,
+            .cyrix_id = 0,
+            .cpu_flags = 0,
+            .mem_read_cycles = 0,
+            .mem_write_cycles = 0,
+            .cache_read_cycles = 0,
+            .cache_write_cycles = 0,
+            .atclk_div = 1
+        },
+        {
+            .name = "9.54",
+            .cpu_type = CPU_8086,
+            .fpus = fpus_8088,
+            .rspeed = 9545456,
+            .multi = 1,
+            .voltage = 5000,
+            .edx_reset = 0,
+            .cpuid_model = 0,
+            .cyrix_id = 0,
+            .cpu_flags = CPU_ALTERNATE_XTAL,
+            .mem_read_cycles = 0,
+            .mem_write_cycles = 0,
+            .cache_read_cycles = 0,
+            .cache_write_cycles = 0,
+            .atclk_div = 1
+        },
+        {
+            .name = "10",
+            .cpu_type = CPU_8086,
+            .fpus = fpus_8088,
+            .rspeed = 10000000,
+            .multi = 1,
+            .voltage = 5000,
+            .edx_reset = 0,
+            .cpuid_model = 0,
+            .cyrix_id = 0,
+            .cpu_flags = 0,
+            .mem_read_cycles = 0,
+            .mem_write_cycles = 0,
+            .cache_read_cycles = 0,
+            .cache_write_cycles = 0,
+            .atclk_div = 1
+        },
+        {
+            .name = "12",
+            .cpu_type = CPU_8086,
+            .fpus = fpus_8088,
+            .rspeed = 12000000,
+            .multi = 1,
+            .voltage = 5000,
+            .edx_reset = 0,
+            .cpuid_model = 0,
+            .cyrix_id = 0,
+            .cpu_flags = 0,
+            .mem_read_cycles = 0,
+            .mem_write_cycles = 0,
+            .cache_read_cycles = 0,
+            .cache_write_cycles = 0,
+            .atclk_div = 1
+        },
+        {
+            .name = "16",
+            .cpu_type = CPU_8086,
+            .fpus = fpus_8088,
+            .rspeed = 16000000,
+            .multi = 1,
+            .voltage = 5000,
+            .edx_reset = 0,
+            .cpuid_model = 0,
+            .cyrix_id = 0,
+            .cpu_flags = 0,
+            .mem_read_cycles = 0,
+            .mem_write_cycles = 0,
+            .cache_read_cycles = 0,
+            .cache_write_cycles = 0,
+            .atclk_div = 2
+        },
+        { .name = "", 0 }
     }
     }, {
     .package = CPU_PKG_188,