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Merge branch 'master' of https://github.com/86Box/86Box

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This commit is contained in:
OBattler
2021-04-03 04:42:24 +02:00
parent e49296805d 47570ea016
commit bc7e3dc3df
4 changed files with 11 additions and 16 deletions
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2
doc/build.md
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@@ -30,7 +30,7 @@ In order to compile 86Box from this repository, please follow this step-by-step
7. If the compilation succeeded (which it almost always should), you will find `86Box.exe` in the `src` directory. 7. If the compilation succeeded (which it almost always should), you will find `86Box.exe` in the `src` directory.
8. In order to test your fresh build, replace the `86Box.exe` in your current 86Box environment with your freshly built one. If you do not have a pre-existing 86Box environment, download the latest successful build from http://ci.86box.net, and the latest ROM set from https://github.com/86Box/roms. 8. In order to test your fresh build, replace the `86Box.exe` in your current 86Box environment with your freshly built one. If you do not have a pre-existing 86Box environment, download the latest successful build from https://ci.86box.net, and the latest ROM set from https://github.com/86Box/roms.
9. Enjoy using and testing the emulator! :) 9. Enjoy using and testing the emulator! :)

21
src/chipset/ali1217.c
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@@ -33,6 +33,7 @@
#include <86box/port_92.h> #include <86box/port_92.h>
#include <86box/chipset.h> #include <86box/chipset.h>
#ifdef ENABLE_ALI1217_LOG #ifdef ENABLE_ALI1217_LOG
int ali1217_do_log = ENABLE_ALI1217_LOG; int ali1217_do_log = ENABLE_ALI1217_LOG;
static void static void
@@ -57,18 +58,12 @@ typedef struct
int cfg_locked; int cfg_locked;
} ali1217_t; } ali1217_t;
static void ali1217_shadow_recalc(ali1217_t *dev) static void ali1217_shadow_recalc(int reg_15, ali1217_t *dev)
{ {
for (uint8_t i = 0; i < 4; i++) for (uint8_t i = 0; i < 4; i++)
{ mem_set_mem_state_both((reg_15 ? 0xe0000 : 0xc0000) + (i << 15), 0x8000, ((dev->regs[0x14 + reg_15] & (1 << (i * 2))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x14 + reg_15] & (1 << ((i * 2) + 1))) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
mem_set_mem_state_both(0xc0000 + (i << 15), 0x8000, ((dev->regs[0x14] & (1 << (i * 2))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x14] & (1 << ((i * 2) + 1))) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
mem_set_mem_state_both(0xe0000 + (i << 15), 0x8000, ((dev->regs[0x15] & (1 << (i * 2))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x15] & (1 << ((i * 2) + 1))) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY));
}
shadowbios = !!(dev->regs[0x15] & 5); flushmmucache_nopc();
shadowbios_write = !!(dev->regs[0x15] & 0x0a);
flushmmucache();
} }
static void static void
@@ -84,8 +79,7 @@ ali1217_write(uint16_t addr, uint8_t val, void *priv)
case 0x23: case 0x23:
if (dev->index != 0x13) if (dev->index != 0x13)
ali1217_log("ALi M1217: dev->regs[%02x] = %02x\n", dev->index, val); ali1217_log("ALi M1217: dev->regs[%02x] = %02x\n", dev->index, val);
else
if (dev->index == 0x13)
dev->cfg_locked = !(val == 0xc5); dev->cfg_locked = !(val == 0xc5);
if (!dev->cfg_locked) if (!dev->cfg_locked)
@@ -93,7 +87,7 @@ ali1217_write(uint16_t addr, uint8_t val, void *priv)
dev->regs[dev->index] = val; dev->regs[dev->index] = val;
if ((dev->index == 0x14) || (dev->index == 0x15)) if ((dev->index == 0x14) || (dev->index == 0x15))
ali1217_shadow_recalc(dev); ali1217_shadow_recalc(dev->index & 1, dev);
} }
break; break;
} }
@@ -104,7 +98,7 @@ ali1217_read(uint16_t addr, void *priv)
{ {
ali1217_t *dev = (ali1217_t *)priv; ali1217_t *dev = (ali1217_t *)priv;
return !(addr == 0x22) ? dev->regs[dev->index] : dev->index; return (addr == 0x23) ? dev->regs[dev->index] : 0xff;
} }
static void static void
@@ -134,7 +128,6 @@ ali1217_init(const device_t *info)
*/ */
io_sethandler(0x0022, 0x0002, ali1217_read, NULL, NULL, ali1217_write, NULL, NULL, dev); io_sethandler(0x0022, 0x0002, ali1217_read, NULL, NULL, ali1217_write, NULL, NULL, dev);
ali1217_shadow_recalc(dev);
return dev; return dev;
} }

2
src/chipset/umc_hb4.c
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@@ -141,6 +141,8 @@ void hb4_shadow(int cur_addr, hb4_t *dev)
mem_set_mem_state_both(0xc8000 + ((i - 2) << 14), 0x4000, (dev->pci_conf[0x54] & (1 << i)) ? (CAN_READ | CAN_WRITE) : DISABLE); mem_set_mem_state_both(0xc8000 + ((i - 2) << 14), 0x4000, (dev->pci_conf[0x54] & (1 << i)) ? (CAN_READ | CAN_WRITE) : DISABLE);
mem_set_mem_state_both(0xe0000, 0x20000, CAN_READ | CAN_WRITE); mem_set_mem_state_both(0xe0000, 0x20000, CAN_READ | CAN_WRITE);
flushmmucache_nopc();
} }
static void static void

2
src/cpu/cpu_table.c
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@@ -970,7 +970,7 @@ const cpu_family_t cpu_families[] = {
}, { }, {
.package = CPU_PKG_EBGA368, .package = CPU_PKG_EBGA368,
.manufacturer = "VIA", .manufacturer = "VIA",
.name = "Eden(Model 7)", .name = "Eden Model 7",
.internal_name = "c3_eden", .internal_name = "c3_eden",
.cpus = (const CPU[]) { .cpus = (const CPU[]) {
{"100", CPU_EDEN, fpus_internal, 100000000, 1.5, 2050, 0x673, 0x673, 0, CPU_SUPPORTS_DYNAREC | CPU_FIXED_MULTIPLIER, 9, 9, 4, 4, 12}, /* out of spec */ {"100", CPU_EDEN, fpus_internal, 100000000, 1.5, 2050, 0x673, 0x673, 0, CPU_SUPPORTS_DYNAREC | CPU_FIXED_MULTIPLIER, 9, 9, 4, 4, 12}, /* out of spec */