80486DX2-66/86Box-fork
1
0
Fork 0
Code Issues Pull Requests Activity

Fix timings, as the Covington doesn't have L2 cache

Browse Source
This commit is contained in:
Jasmine Iwanek
2022-12-27 14:03:16 -05:00
parent cfa6f64716
commit bde4531606
1 changed files with 2 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
src/cpu/cpu_table.c
View File

@@ -1072,8 +1072,8 @@ const cpu_family_t cpu_families[] = {
.name = "Celeron (Covington)", .name = "Celeron (Covington)",
.internal_name = "celeron_covington", .internal_name = "celeron_covington",
.cpus = (const CPU[]) { .cpus = (const CPU[]) {
{"266", CPU_PENTIUM2D, fpus_internal, 266666666, 4.0, 2050, 0x650, 0x650, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12, 32}, {"266", CPU_PENTIUM2D, fpus_internal, 266666666, 4.0, 2050, 0x650, 0x650, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,24,24, 32},
{"300", CPU_PENTIUM2D, fpus_internal, 300000000, 4.5, 2050, 0x651, 0x651, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 25,25,12,12, 36}, {"300", CPU_PENTIUM2D, fpus_internal, 300000000, 4.5, 2050, 0x651, 0x651, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 25,25,25,25, 36},
{"", 0} {"", 0}
} }
}, { }, {