From c8a1843cdf20b6edcb4f2b9bd123b7fb74c9b370 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 2 Apr 2024 23:31:44 +0200 Subject: [PATCH] FDC: Disable DSR reset on the PS/1-2011/2121 / PS/2-30 FDC. --- src/floppy/fdc.c | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index e16da138d..491df2f47 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -780,24 +780,26 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) } return; case 4: - if (!(val & 0x80)) { - timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); - fdc->interrupt = -6; - } - if (fdc->power_down || ((val & 0x80) && !(fdc->dsr & 0x80))) { - if (fdc->power_down) { - timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC); - fdc->interrupt = -5; - } else { + if (!(fdc->flags & FDC_FLAG_PS1)) { + if (!(val & 0x80)) { timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); - fdc->interrupt = -1; + fdc->interrupt = -6; + } + if (fdc->power_down || ((val & 0x80) && !(fdc->dsr & 0x80))) { + if (fdc->power_down) { + timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC); + fdc->interrupt = -5; + } else { + timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC); + fdc->interrupt = -1; - fdc->perp &= 0xfc; + fdc->perp &= 0xfc; - for (i = 0; i < FDD_NUM; i++) - ui_sb_update_icon(SB_FLOPPY | i, 0); + for (i = 0; i < FDD_NUM; i++) + ui_sb_update_icon(SB_FLOPPY | i, 0); - fdc_ctrl_reset(fdc); + fdc_ctrl_reset(fdc); + } } } fdc->dsr = val;