MAJOR ATI 18800 improvements
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@@ -1,4 +1,4 @@
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/* Copyright holders: Sarah Walker
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/* Copyright holders: Sarah Walker, Melissa Goad
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see COPYING for more details
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see COPYING for more details
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*/
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*/
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/*ATI 18800 emulation (VGA Edge-16)*/
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/*ATI 18800 emulation (VGA Edge-16)*/
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@@ -32,7 +32,8 @@ void ati18800_out(uint16_t addr, uint8_t val, void *p)
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// pclog("ati18800_out : %04X %02X %04X:%04X\n", addr, val, CS,cpu_state.pc);
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// pclog("ati18800_out : %04X %02X %04X:%04X\n", addr, val, CS,cpu_state.pc);
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if (((addr&0xFFF0) == 0x3D0 || (addr&0xFFF0) == 0x3B0) && !(svga->miscout&1)) addr ^= 0x60;
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if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
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addr ^= 0x60;
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switch (addr)
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switch (addr)
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{
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{
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@@ -41,8 +42,11 @@ void ati18800_out(uint16_t addr, uint8_t val, void *p)
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break;
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break;
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case 0x1cf:
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case 0x1cf:
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ati18800->regs[ati18800->index] = val;
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ati18800->regs[ati18800->index] = val;
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pclog("ATI 18800 ATI register write %02x %02x\n", ati18800->index, val);
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switch (ati18800->index)
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switch (ati18800->index)
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{
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{
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case 0xb0:
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svga_recalctimings(svga);
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case 0xb2:
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case 0xb2:
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case 0xbe:
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case 0xbe:
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if (ati18800->regs[0xbe] & 8) /*Read/write bank mode*/
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if (ati18800->regs[0xbe] & 8) /*Read/write bank mode*/
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@@ -65,10 +69,22 @@ void ati18800_out(uint16_t addr, uint8_t val, void *p)
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case 0x3D5:
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case 0x3D5:
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if (svga->crtcreg <= 0x18)
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if (svga->crtcreg <= 0x18)
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val &= mask_crtc[svga->crtcreg];
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val &= mask_crtc[svga->crtcreg];
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if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80))
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if ((svga->crtcreg < 7) && (svga->crtc[0x11] & 0x80) && !(ati18800->regs[0xb4] & 0x80))
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return;
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return;
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if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80))
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if ((svga->crtcreg == 7) && (svga->crtc[0x11] & 0x80) && !(ati18800->regs[0xb4] & 0x80))
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val = (svga->crtc[7] & ~0x10) | (val & 0x10);
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val = (svga->crtc[7] & ~0x10) | (val & 0x10);
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if ((ati18800->regs[0xb4] & 4) && (svga->crtcreg == 9))
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val = (svga->crtc[9] & ~0x60) | (val & 0x60);
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if ((ati18800->regs[0xb4] & 8) && ((svga->crtcreg == 6) || (svga->crtcreg == 0x10) || (svga->crtcreg == 0x12) || (svga->crtcreg == 0x15) || (svga->crtcreg == 0x16)))
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return;
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if ((ati18800->regs[0xb4] & 8) && (svga->crtcreg == 7))
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val = (svga->crtc[9] & ~0x10) | (val & 0x10);
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if ((ati18800->regs[0xb4] & 8) && (svga->crtcreg == 9))
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val = (svga->crtc[9] & ~0xdf) | (val & 0xdf);
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if ((ati18800->regs[0xb4] & 8) && (svga->crtcreg == 0x11))
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val = (svga->crtc[9] & ~0xf0) | (val & 0xf0);
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if ((ati18800->regs[0xb4] & 0x10) && ((svga->crtcreg == 0x0a) || (svga->crtcreg == 0x0b)))
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return;
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old = svga->crtc[svga->crtcreg];
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old = svga->crtc[svga->crtcreg];
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svga->crtc[svga->crtcreg] = val;
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svga->crtc[svga->crtcreg] = val;
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if (old != val)
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if (old != val)
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@@ -130,6 +146,22 @@ uint8_t ati18800_in(uint16_t addr, void *p)
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return temp;
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return temp;
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}
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}
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void ati18800_recalctimings(svga_t *svga)
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{
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ati18800_t *ati18800 = (ati18800_t *)svga->p;
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svga->ma_latch += (ati18800->regs[0xb0] & 0xc0) << 10;
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if(ati18800->regs[0xb1] & 0x40)
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{
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svga->vtotal >>= 1;
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svga->dispend >>= 1;
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svga->vsyncstart >>= 1;
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svga->split >>= 1;
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svga->vblankstart >>= 1;
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}
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}
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void *ati18800_init()
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void *ati18800_init()
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{
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{
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ati18800_t *ati18800 = malloc(sizeof(ati18800_t));
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ati18800_t *ati18800 = malloc(sizeof(ati18800_t));
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