Added 4Mbit capabilities to the Intel Flashes & the 4Mbit SST can be used.
This commit is contained in:
@@ -24,3 +24,4 @@ extern const device_t sst_flash_29ee010_device;
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extern const device_t sst_flash_29ee020_device;
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extern const device_t sst_flash_29ee020_device;
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extern const device_t sst_flash_39sf010_device;
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extern const device_t sst_flash_39sf010_device;
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extern const device_t sst_flash_39sf020_device;
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extern const device_t sst_flash_39sf020_device;
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extern const device_t sst_flash_39sf040_device;
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@@ -40,6 +40,8 @@ enum
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{
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{
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BLOCK_MAIN1,
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BLOCK_MAIN1,
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BLOCK_MAIN2,
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BLOCK_MAIN2,
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BLOCK_MAIN3,
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BLOCK_MAIN4,
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BLOCK_DATA1,
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BLOCK_DATA1,
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BLOCK_DATA2,
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BLOCK_DATA2,
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BLOCK_BOOT,
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BLOCK_BOOT,
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@@ -171,7 +173,9 @@ flash_write(uint32_t addr, uint8_t val, void *p)
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flash_t *dev = (flash_t *) p;
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flash_t *dev = (flash_t *) p;
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int i;
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int i;
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uint32_t bb_mask = biosmask & 0xffffe000;
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uint32_t bb_mask = biosmask & 0xffffe000;
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if (biosmask == 0x3ffff)
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if (biosmask == 0x7ffff)
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bb_mask &= 0xffff8000;
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else if (biosmask == 0x3ffff)
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bb_mask &= 0xffffc000;
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bb_mask &= 0xffffc000;
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if (dev->flags & FLAG_INV_A16)
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if (dev->flags & FLAG_INV_A16)
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@@ -220,7 +224,9 @@ flash_writew(uint32_t addr, uint16_t val, void *p)
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flash_t *dev = (flash_t *) p;
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flash_t *dev = (flash_t *) p;
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int i;
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int i;
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uint32_t bb_mask = biosmask & 0xffffe000;
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uint32_t bb_mask = biosmask & 0xffffe000;
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if (biosmask == 0x3ffff)
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if (biosmask == 0x7ffff)
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bb_mask &= 0xffff8000;
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else if (biosmask == 0x3ffff)
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bb_mask &= 0xffffc000;
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bb_mask &= 0xffffc000;
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if (dev->flags & FLAG_INV_A16)
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if (dev->flags & FLAG_INV_A16)
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@@ -280,16 +286,23 @@ intel_flash_add_mappings(flash_t *dev)
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uint32_t base, fbase;
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uint32_t base, fbase;
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uint32_t sub = 0x20000;
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uint32_t sub = 0x20000;
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if (biosmask == 0x3ffff) {
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if (biosmask == 0x7ffff) {
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sub = 0x80000;
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max = 8;
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}
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else if (biosmask == 0x3ffff) {
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sub = 0x40000;
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sub = 0x40000;
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max = 4;
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max = 4;
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}
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}
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for (i = 0; i < max; i++) {
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for (i = 0; i < max; i++) {
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if (biosmask == 0x3ffff)
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if (biosmask == 0x7ffff)
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base = 0x80000 + (i << 16);
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else if (biosmask == 0x3ffff)
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base = 0xc0000 + (i << 16);
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base = 0xc0000 + (i << 16);
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else
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else
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base = 0xe0000 + (i << 16);
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base = 0xe0000 + (i << 16);
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fbase = base & biosmask;
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fbase = base & biosmask;
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if (dev->flags & FLAG_INV_A16)
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if (dev->flags & FLAG_INV_A16)
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fbase ^= 0x10000;
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fbase ^= 0x10000;
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@@ -356,7 +369,57 @@ intel_flash_init(const device_t *info)
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dev->array = (uint8_t *) malloc(biosmask + 1);
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dev->array = (uint8_t *) malloc(biosmask + 1);
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memset(dev->array, 0xff, biosmask + 1);
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memset(dev->array, 0xff, biosmask + 1);
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if (biosmask == 0x3ffff) {
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switch(biosmask){
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case 0x7ffff:
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if (dev->flags & FLAG_WORD)
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dev->flash_id = (dev->flags & FLAG_BXB) ? 0x4471 :0x4470;
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else
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dev->flash_id =(dev->flags & FLAG_BXB) ? 0x8A : 0x89;
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/* The block lengths are the same both flash types. */
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dev->block_len[BLOCK_MAIN1] = 0x20000;
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dev->block_len[BLOCK_MAIN2] = 0x20000;
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dev->block_len[BLOCK_MAIN3] = 0x20000;
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dev->block_len[BLOCK_MAIN4] = 0x18000;
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dev->block_len[BLOCK_DATA1] = 0x02000;
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dev->block_len[BLOCK_DATA2] = 0x02000;
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dev->block_len[BLOCK_BOOT] = 0x04000;
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if (dev->flags & FLAG_BXB) { /* 28F004BX-T/28F400BX-B */
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dev->block_start[BLOCK_BOOT] = 0x00000; /* MAIN BLOCK 1 */
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dev->block_end[BLOCK_BOOT] = 0x1ffff;
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dev->block_start[BLOCK_DATA2] = 0x20000; /* MAIN BLOCK 2 */
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dev->block_end[BLOCK_DATA2] = 0x3ffff;
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dev->block_start[BLOCK_DATA1] = 0x40000; /* MAIN BLOCK 3 */
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dev->block_end[BLOCK_DATA1] = 0x5ffff;
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dev->block_start[BLOCK_MAIN4] = 0x60000; /* MAIN BLOCK 4 */
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dev->block_end[BLOCK_MAIN4] = 0x77fff;
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dev->block_start[BLOCK_MAIN3] = 0x78000; /* DATA AREA 1 BLOCK */
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dev->block_end[BLOCK_MAIN3] = 0x79fff;
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dev->block_start[BLOCK_MAIN2] = 0x7a000; /* DATA AREA 2 BLOCK */
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dev->block_end[BLOCK_MAIN2] = 0x7bfff;
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dev->block_start[BLOCK_MAIN1] = 0x7c000; /* BOOT BLOCK */
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dev->block_end[BLOCK_MAIN1] = 0x7ffff;
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} else {
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dev->block_start[BLOCK_MAIN1] = 0x00000; /* MAIN BLOCK 1 */
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dev->block_end[BLOCK_MAIN1] = 0x1ffff;
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dev->block_start[BLOCK_MAIN2] = 0x20000; /* MAIN BLOCK 2 */
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dev->block_end[BLOCK_MAIN2] = 0x3ffff;
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dev->block_start[BLOCK_MAIN3] = 0x40000; /* MAIN BLOCK 3 */
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dev->block_end[BLOCK_MAIN3] = 0x5ffff;
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dev->block_start[BLOCK_MAIN4] = 0x60000; /* MAIN BLOCK 4 */
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dev->block_end[BLOCK_MAIN4] = 0x77fff;
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dev->block_start[BLOCK_DATA1] = 0x78000; /* DATA AREA 1 BLOCK */
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dev->block_end[BLOCK_DATA1] = 0x79fff;
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dev->block_start[BLOCK_DATA2] = 0x7a000; /* DATA AREA 2 BLOCK */
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dev->block_end[BLOCK_DATA2] = 0x7bfff;
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dev->block_start[BLOCK_BOOT] = 0x7c000; /* BOOT BLOCK */
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dev->block_end[BLOCK_BOOT] = 0x7ffff;
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}
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break;
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case 0x3ffff:
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if (dev->flags & FLAG_WORD)
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if (dev->flags & FLAG_WORD)
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dev->flash_id = (dev->flags & FLAG_BXB) ? 0x2275 : 0x2274;
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dev->flash_id = (dev->flags & FLAG_BXB) ? 0x2275 : 0x2274;
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else
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else
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@@ -392,7 +455,9 @@ intel_flash_init(const device_t *info)
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dev->block_start[BLOCK_BOOT] = 0x3c000; /* BOOT BLOCK */
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dev->block_start[BLOCK_BOOT] = 0x3c000; /* BOOT BLOCK */
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dev->block_end[BLOCK_BOOT] = 0x3ffff;
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dev->block_end[BLOCK_BOOT] = 0x3ffff;
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}
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}
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} else {
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break;
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default:
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dev->flash_id = (type & FLAG_BXB) ? 0x95 : 0x94;
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dev->flash_id = (type & FLAG_BXB) ? 0x95 : 0x94;
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/* The block lengths are the same both flash types. */
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/* The block lengths are the same both flash types. */
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@@ -425,7 +490,8 @@ intel_flash_init(const device_t *info)
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dev->block_start[BLOCK_BOOT] = 0x1e000; /* BOOT BLOCK */
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dev->block_start[BLOCK_BOOT] = 0x1e000; /* BOOT BLOCK */
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dev->block_end[BLOCK_BOOT] = 0x1ffff;
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dev->block_end[BLOCK_BOOT] = 0x1ffff;
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}
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}
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}
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break;
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}
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intel_flash_add_mappings(dev);
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intel_flash_add_mappings(dev);
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@@ -437,6 +503,11 @@ intel_flash_init(const device_t *info)
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fread(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f);
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fread(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f);
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if (dev->block_len[BLOCK_MAIN2])
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if (dev->block_len[BLOCK_MAIN2])
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fread(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f);
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fread(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f);
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else if (dev->block_len[BLOCK_MAIN3])
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fread(&(dev->array[dev->block_start[BLOCK_MAIN3]]), dev->block_len[BLOCK_MAIN3], 1, f);
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else if (dev->block_len[BLOCK_MAIN4])
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fread(&(dev->array[dev->block_start[BLOCK_MAIN4]]), dev->block_len[BLOCK_MAIN4], 1, f);
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fread(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f);
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fread(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f);
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fread(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f);
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fread(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f);
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fclose(f);
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fclose(f);
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@@ -459,6 +530,11 @@ intel_flash_close(void *p)
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fwrite(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f);
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fwrite(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f);
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if (dev->block_len[BLOCK_MAIN2])
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if (dev->block_len[BLOCK_MAIN2])
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fwrite(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f);
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fwrite(&(dev->array[dev->block_start[BLOCK_MAIN2]]), dev->block_len[BLOCK_MAIN2], 1, f);
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else if (dev->block_len[BLOCK_MAIN3])
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fwrite(&(dev->array[dev->block_start[BLOCK_MAIN3]]), dev->block_len[BLOCK_MAIN3], 1, f);
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else if (dev->block_len[BLOCK_MAIN4])
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fwrite(&(dev->array[dev->block_start[BLOCK_MAIN4]]), dev->block_len[BLOCK_MAIN4], 1, f);
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fwrite(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f);
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fwrite(&(dev->array[dev->block_start[BLOCK_DATA1]]), dev->block_len[BLOCK_DATA1], 1, f);
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fwrite(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f);
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fwrite(&(dev->array[dev->block_start[BLOCK_DATA2]]), dev->block_len[BLOCK_DATA2], 1, f);
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fclose(f);
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fclose(f);
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@@ -473,7 +549,7 @@ intel_flash_close(void *p)
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/* For AMI BIOS'es - Intel 28F001BXT with A16 pin inverted. */
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/* For AMI BIOS'es - Intel 28F001BXT with A16 pin inverted. */
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const device_t intel_flash_bxt_ami_device =
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const device_t intel_flash_bxt_ami_device =
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{
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{
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"Intel 28F001BXT/28F002BXT Flash BIOS",
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"Intel 28F001BXT/28F002BXT/28F004BXT Flash BIOS",
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DEVICE_PCI,
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DEVICE_PCI,
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FLAG_INV_A16,
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FLAG_INV_A16,
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intel_flash_init,
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intel_flash_init,
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@@ -485,7 +561,7 @@ const device_t intel_flash_bxt_ami_device =
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const device_t intel_flash_bxt_device =
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const device_t intel_flash_bxt_device =
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{
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{
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"Intel 28F001BXT/28F002BXT Flash BIOS",
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"Intel 28F001BXT/28F002BXT/28F004BXT Flash BIOS",
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DEVICE_PCI, 0,
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DEVICE_PCI, 0,
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intel_flash_init,
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intel_flash_init,
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intel_flash_close,
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intel_flash_close,
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@@ -496,7 +572,7 @@ const device_t intel_flash_bxt_device =
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const device_t intel_flash_bxb_device =
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const device_t intel_flash_bxb_device =
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{
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{
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"Intel 28F001BXB/28F002BXB Flash BIOS",
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"Intel 28F001BXB/28F002BXB/28F004BXB Flash BIOS",
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DEVICE_PCI, FLAG_BXB,
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DEVICE_PCI, FLAG_BXB,
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intel_flash_init,
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intel_flash_init,
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intel_flash_close,
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intel_flash_close,
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@@ -472,3 +472,14 @@ const device_t sst_flash_39sf020_device =
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NULL,
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NULL,
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NULL, NULL, NULL, NULL
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NULL, NULL, NULL, NULL
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};
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};
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const device_t sst_flash_39sf040_device =
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{
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"SST 39SF040 Flash BIOS",
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0,
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SST_ID_SST39SF040,
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sst_init,
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sst_close,
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NULL,
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NULL, NULL, NULL, NULL
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};
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