80486DX2-66/86Box-fork
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Cleanup: some touch-ups here and there

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This commit is contained in:
Kagamiin~
2024-03-22 23:36:56 -03:00
parent 8bfcfec280
commit d846a16826
2 changed files with 26 additions and 37 deletions
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6
src/sound/snd_ess.c
View File

@@ -49,6 +49,8 @@
#include <86box/snd_sb.h> #include <86box/snd_sb.h>
#include <86box/plat_unused.h> #include <86box/plat_unused.h>
# define sb_log(fmt, ...)
// clang-format off // clang-format off
static const double sb_att_4dbstep_3bits[] = { static const double sb_att_4dbstep_3bits[] = {
164.0, 2067.0, 3276.0, 5193.0, 8230.0, 13045.0, 20675.0, 32767.0 164.0, 2067.0, 3276.0, 5193.0, 8230.0, 13045.0, 20675.0, 32767.0
@@ -302,7 +304,7 @@ ess_mixer_write(uint16_t addr, uint8_t val, void *priv)
} }
default: default:
// pclog("ess: Unknown mixer register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); sb_log("ess: Unknown mixer register WRITE: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
break; break;
} }
} }
@@ -373,7 +375,7 @@ ess_mixer_read(uint16_t addr, void *priv)
} }
default: default:
// pclog("ess: Unknown mixer register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]); sb_log("ess: Unknown mixer register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
break; break;
} }

57
src/sound/snd_sb_dsp.c
View File

@@ -35,7 +35,7 @@
#define ESPCM_4 4 #define ESPCM_4 4
#define ESPCM_3 5 #define ESPCM_3 5
#define ESPCM_1 7 #define ESPCM_1 7
#define ESPCM_4E 8 // for encoding mode switching #define ESPCM_4E 8 // for differentiating between 4-bit encoding and decoding modes
/*The recording safety margin is intended for uneven "len" calls to the get_buffer mixer calls on sound_sb*/ /*The recording safety margin is intended for uneven "len" calls to the get_buffer mixer calls on sound_sb*/
#define SB_DSP_REC_SAFEFTY_MARGIN 4096 #define SB_DSP_REC_SAFEFTY_MARGIN 4096
@@ -687,8 +687,9 @@ int
sb_16_read_dma(void *priv) sb_16_read_dma(void *priv)
{ {
const sb_dsp_t *dsp = (sb_dsp_t *) priv; const sb_dsp_t *dsp = (sb_dsp_t *) priv;
int temp, ret = 0;
int dma_flags, dma_ch = dsp->sb_16_dmanum; int temp, ret = 0;
int dma_flags, dma_ch = dsp->sb_16_dmanum;
if (dsp->sb_16_dma_enabled && dsp->sb_16_dma_supported && !dsp->sb_16_dma_translate) if (dsp->sb_16_dma_enabled && dsp->sb_16_dma_supported && !dsp->sb_16_dma_translate)
ret = dma_channel_read(dma_ch); ret = dma_channel_read(dma_ch);
@@ -722,8 +723,9 @@ int
sb_16_write_dma(void *priv, uint16_t val) sb_16_write_dma(void *priv, uint16_t val)
{ {
const sb_dsp_t *dsp = (sb_dsp_t *) priv; const sb_dsp_t *dsp = (sb_dsp_t *) priv;
int temp, ret = 0;
int dma_ch = dsp->sb_16_dmanum; int temp, ret = 0;
int dma_ch = dsp->sb_16_dmanum;
if (dsp->sb_16_dma_enabled && dsp->sb_16_dma_supported && !dsp->sb_16_dma_translate) if (dsp->sb_16_dma_enabled && dsp->sb_16_dma_supported && !dsp->sb_16_dma_translate)
ret = dma_channel_write(dma_ch, val) == DMA_NODATA; ret = dma_channel_write(dma_ch, val) == DMA_NODATA;
@@ -793,7 +795,6 @@ sb_ess_update_irq_drq_readback_regs(sb_dsp_t *dsp, bool legacy)
void void
sb_dsp_setirq(sb_dsp_t *dsp, int irq) sb_dsp_setirq(sb_dsp_t *dsp, int irq)
{ {
uint8_t t = 0x00;
sb_dsp_log("IRQ now: %i\n", irq); sb_dsp_log("IRQ now: %i\n", irq);
dsp->sb_irqnum = irq; dsp->sb_irqnum = irq;
@@ -805,7 +806,6 @@ sb_dsp_setirq(sb_dsp_t *dsp, int irq)
void void
sb_dsp_setdma8(sb_dsp_t *dsp, int dma) sb_dsp_setdma8(sb_dsp_t *dsp, int dma)
{ {
uint8_t t = 0x00;
sb_dsp_log("8-bit DMA now: %i\n", dma); sb_dsp_log("8-bit DMA now: %i\n", dma);
dsp->sb_8_dmanum = dma; dsp->sb_8_dmanum = dma;
@@ -881,8 +881,6 @@ sb_ess_read_reg(sb_dsp_t *dsp, uint8_t reg)
default: default:
return ESSreg(reg); return ESSreg(reg);
} }
return 0xFF;
} }
static void static void
@@ -907,7 +905,8 @@ sb_ess_write_reg(sb_dsp_t *dsp, uint8_t reg, uint8_t data)
dsp->sb_freq = 397700UL / (128ul - data); dsp->sb_freq = 397700UL / (128ul - data);
temp = 1000000.0 / dsp->sb_freq; temp = 1000000.0 / dsp->sb_freq;
dsp->sblatchi = dsp->sblatcho = TIMER_USEC * temp; dsp->sblatchi = dsp->sblatcho = TIMER_USEC * temp;
dsp->sb_timei = dsp->sb_timeo;
dsp->sb_timei = dsp->sb_timeo;
break; break;
} }
case 0xA2: /* Filter divider (effectively, a hardware lowpass filter under S/W control) */ case 0xA2: /* Filter divider (effectively, a hardware lowpass filter under S/W control) */
@@ -1305,7 +1304,6 @@ sb_exec_command(sb_dsp_t *dsp)
temp = 256 - dsp->sb_data[0]; temp = 256 - dsp->sb_data[0];
temp = 1000000 / temp; temp = 1000000 / temp;
sb_dsp_log("Sample rate - %ihz (%f)\n", temp, dsp->sblatcho); sb_dsp_log("Sample rate - %ihz (%f)\n", temp, dsp->sblatcho);
// if ((dsp->sb_freq != temp) && (IS_ESS(dsp) || (dsp->sb_type >= SB16)))
if ((dsp->sb_freq != temp) && (dsp->sb_type >= SB16)) if ((dsp->sb_freq != temp) && (dsp->sb_type >= SB16))
recalc_sb16_filter(0, temp); recalc_sb16_filter(0, temp);
dsp->sb_freq = temp; dsp->sb_freq = temp;
@@ -1339,8 +1337,7 @@ sb_exec_command(sb_dsp_t *dsp)
case 0x65: /* 4-bit ESPCM output with reference */ case 0x65: /* 4-bit ESPCM output with reference */
case 0x64: /* 4-bit ESPCM output */ case 0x64: /* 4-bit ESPCM output */
if (IS_ESS(dsp)) { if (IS_ESS(dsp)) {
if (dsp->espcm_mode != ESPCM_4 if (dsp->espcm_mode != ESPCM_4 || (dsp->sb_8_enable && dsp->sb_8_pause)) {
|| (dsp->sb_8_enable && dsp->sb_8_pause)) {
fifo_reset(dsp->espcm_fifo); fifo_reset(dsp->espcm_fifo);
dsp->espcm_sample_idx = 0; dsp->espcm_sample_idx = 0;
} }
@@ -1351,8 +1348,7 @@ sb_exec_command(sb_dsp_t *dsp)
case 0x67: /* 3-bit ESPCM output with reference */ case 0x67: /* 3-bit ESPCM output with reference */
case 0x66: /* 3-bit ESPCM output */ case 0x66: /* 3-bit ESPCM output */
if (IS_ESS(dsp)) { if (IS_ESS(dsp)) {
if (dsp->espcm_mode != ESPCM_3 if (dsp->espcm_mode != ESPCM_3 || (dsp->sb_8_enable && dsp->sb_8_pause)) {
|| (dsp->sb_8_enable && dsp->sb_8_pause)) {
fifo_reset(dsp->espcm_fifo); fifo_reset(dsp->espcm_fifo);
dsp->espcm_sample_idx = 0; dsp->espcm_sample_idx = 0;
} }
@@ -1363,8 +1359,7 @@ sb_exec_command(sb_dsp_t *dsp)
case 0x6D: /* 1-bit ESPCM output with reference */ case 0x6D: /* 1-bit ESPCM output with reference */
case 0x6C: /* 1-bit ESPCM output */ case 0x6C: /* 1-bit ESPCM output */
if (IS_ESS(dsp)) { if (IS_ESS(dsp)) {
if (dsp->espcm_mode != ESPCM_1 if (dsp->espcm_mode != ESPCM_1 || (dsp->sb_8_enable && dsp->sb_8_pause)) {
|| (dsp->sb_8_enable && dsp->sb_8_pause)) {
fifo_reset(dsp->espcm_fifo); fifo_reset(dsp->espcm_fifo);
dsp->espcm_sample_idx = 0; dsp->espcm_sample_idx = 0;
} }
@@ -1375,14 +1370,12 @@ sb_exec_command(sb_dsp_t *dsp)
case 0x6F: /* 4-bit ESPCM input with reference */ case 0x6F: /* 4-bit ESPCM input with reference */
case 0x6E: /* 4-bit ESPCM input */ case 0x6E: /* 4-bit ESPCM input */
if (IS_ESS(dsp)) { if (IS_ESS(dsp)) {
if (dsp->espcm_mode != ESPCM_4E if (dsp->espcm_mode != ESPCM_4E || (dsp->sb_8_enable && dsp->sb_8_pause)) {
|| (dsp->sb_8_enable && dsp->sb_8_pause)) {
fifo_reset(dsp->espcm_fifo); fifo_reset(dsp->espcm_fifo);
dsp->espcm_sample_idx = 0; dsp->espcm_sample_idx = 0;
} }
dsp->espcm_mode = ESPCM_4E; dsp->espcm_mode = ESPCM_4E;
sb_start_dma_i(dsp, 1, 0, ESPCM_4E, dsp->sb_data[0] + (dsp->sb_data[1] << 8)); sb_start_dma_i(dsp, 1, 0, ESPCM_4E, dsp->sb_data[0] + (dsp->sb_data[1] << 8));
dsp->espcm_sample_idx = 0;
} }
break; break;
case 0x75: /* 4-bit ADPCM output with reference */ case 0x75: /* 4-bit ADPCM output with reference */
@@ -1598,7 +1591,7 @@ sb_exec_command(sb_dsp_t *dsp)
case 0xE4: /* Write test register */ case 0xE4: /* Write test register */
dsp->sb_test = dsp->sb_data[0]; dsp->sb_test = dsp->sb_data[0];
break; break;
case 0xE7: /* ???? */ /* ESS detect/read config on ESS cards */ case 0xE7: /* ESS detect/read config on ESS cards */
if (IS_ESS(dsp)) { if (IS_ESS(dsp)) {
switch (dsp->sb_subtype) { switch (dsp->sb_subtype) {
default: default:
@@ -1682,8 +1675,6 @@ sb_write(uint16_t a, uint8_t v, void *priv)
if (dsp->sb_type < SB16 && (!IS_ESS(dsp) || (IS_ESS(dsp) && ((a & 0xF) != 0xE)))) if (dsp->sb_type < SB16 && (!IS_ESS(dsp) || (IS_ESS(dsp) && ((a & 0xF) != 0xE))))
a &= 0xfffe; a &= 0xfffe;
// pclog("sb: port write %03x %02x\n", a, v);
switch (a & 0xF) { switch (a & 0xF) {
case 6: /* Reset */ case 6: /* Reset */
if (!dsp->uart_midi) { if (!dsp->uart_midi) {
@@ -1729,17 +1720,16 @@ sb_write(uint16_t a, uint8_t v, void *priv)
sb_commands[dsp->sb_command] = 2; sb_commands[dsp->sb_command] = 2;
} }
if (IS_ESS(dsp) && dsp->sb_command >= 0x64 && dsp->sb_command <= 0x6F) { if (IS_ESS(dsp) && dsp->sb_command >= 0x64 && dsp->sb_command <= 0x6F) {
if (dsp->sb_subtype == SB_SUBTYPE_ESS_ES1688) { sb_commands[dsp->sb_command] = 2;
sb_commands[dsp->sb_command] = 2;
} else {
sb_commands[dsp->sb_command] = 2;
}
} else if (IS_ESS(dsp) && dsp->sb_command >= 0xA0 && dsp->sb_command <= 0xCF) { } else if (IS_ESS(dsp) && dsp->sb_command >= 0xA0 && dsp->sb_command <= 0xCF) {
if (dsp->sb_command <= 0xC0 || dsp->sb_command == 0xC2 if (dsp->sb_command <= 0xC0
|| dsp->sb_command == 0xC2
|| dsp->sb_command == 0xCF) { || dsp->sb_command == 0xCF) {
sb_commands[dsp->sb_command] = 1; sb_commands[dsp->sb_command] = 1;
} else if (dsp->sb_command == 0xC3 || dsp->sb_command == 0xC6 } else if (dsp->sb_command == 0xC3
|| dsp->sb_command == 0xC7 || dsp->sb_command == 0xCE) { || dsp->sb_command == 0xC6
|| dsp->sb_command == 0xC7
|| dsp->sb_command == 0xCE) {
sb_commands[dsp->sb_command] = 0; sb_commands[dsp->sb_command] = 0;
} else { } else {
sb_commands[dsp->sb_command] = -1; sb_commands[dsp->sb_command] = -1;
@@ -1809,8 +1799,7 @@ sb_read(uint16_t a, void *priv)
uint8_t irq_fifohe = 0; // Unimplemented uint8_t irq_fifohe = 0; // Unimplemented
uint8_t irq_dmactr = dsp->ess_irq_dmactr ? 0x01 : 0x00; uint8_t irq_dmactr = dsp->ess_irq_dmactr ? 0x01 : 0x00;
return busy_flag | data_rdy | fifo_full | fifo_empty return busy_flag | data_rdy | fifo_full | fifo_empty | fifo_half | irq_generic | irq_fifohe | irq_dmactr;
| fifo_half | irq_generic | irq_fifohe | irq_dmactr;
} }
if (dsp->wb_full || (dsp->busy_count & 2)) { if (dsp->wb_full || (dsp->busy_count & 2)) {
dsp->wb_full = timer_is_enabled(&dsp->wb_timer); dsp->wb_full = timer_is_enabled(&dsp->wb_timer);
@@ -1857,8 +1846,6 @@ sb_read(uint16_t a, void *priv)
break; break;
} }
// pclog("sb: port read %03x %02x\n", a, ret);
return ret; return ret;
} }