Fixed 16bpp mode in ET4000/W32p with ICS/SDAC RAMDAC and ET4000AX.

This commit is contained in:
OBattler
2016-08-02 17:41:13 +02:00
parent f77c53510e
commit d8b8d149dc
2 changed files with 19 additions and 25 deletions

View File

@@ -39,9 +39,9 @@ void sdac_ramdac_out(uint16_t addr, uint8_t val, sdac_ramdac_t *ramdac, svga_t *
// pclog("RAMDAC command reg now %02X\n", val); // pclog("RAMDAC command reg now %02X\n", val);
switch (val >> 4) switch (val >> 4)
{ {
case 0x2: case 0x3: case 0x8: case 0xa: case 0xc: svga->bpp = 15; break; case 0x2: case 0x3: case 0x8: case 0xa: svga->bpp = 15; break;
case 0x4: case 0x9: case 0xe: svga->bpp = 24; break; case 0x4: case 0x9: case 0xe: svga->bpp = 24; break;
case 0x5: case 0x6: svga->bpp = 16; break; case 0x5: case 0x6: case 0xc: svga->bpp = 16; break;
case 0x7: svga->bpp = 32; break; case 0x7: svga->bpp = 32; break;
case 0: case 1: default: svga->bpp = 8; break; case 0: case 1: default: svga->bpp = 8; break;

View File

@@ -20,34 +20,14 @@ void unk_ramdac_out(uint16_t addr, uint8_t val, unk_ramdac_t *ramdac, svga_t *sv
ramdac->state = 0; ramdac->state = 0;
if (val == 0xFF) break; if (val == 0xFF) break;
ramdac->ctrl = val; ramdac->ctrl = val;
#if 0
switch ((val&1)|((val&0xE0)>>4))
{
case 0: case 1: case 2: case 3:
svga->bpp = 8;
break;
case 4: case 5:
svga->bpp = 32; /* Per the spec. */
break;
case 6: case 7:
svga->bpp = 24;
break;
case 8: case 9: case 0xA: case 0xB:
svga->bpp = 15;
break;
case 0xC: case 0xD: case 0xE: case 0xF:
svga->bpp = 16;
break;
}
#endif
oldbpp = svga->bpp; oldbpp = svga->bpp;
switch ((val&1)|((val&0xC0)>>5)) switch ((val&1)|((val&0xC0)>>5))
{ {
case 0: case 0:
svga->bpp = 8; svga->bpp = 8;
break; break;
case 2: case 3: case 7: case 2: case 3:
switch(val & 0x20) switch (val & 0x20)
{ {
case 0x00: svga->bpp = 32; break; case 0x00: svga->bpp = 32; break;
case 0x20: svga->bpp = 24; break; case 0x20: svga->bpp = 24; break;
@@ -59,6 +39,20 @@ void unk_ramdac_out(uint16_t addr, uint8_t val, unk_ramdac_t *ramdac, svga_t *sv
case 6: case 6:
svga->bpp = 16; svga->bpp = 16;
break; break;
case 7:
switch (val & 4)
{
case 4:
switch (val & 0x20)
{
case 0x00: svga->bpp = 32; break;
case 0x20: svga->bpp = 24; break;
}
break;
case 0: default:
svga->bpp = 16;
break;
}
case 1: default: case 1: default:
break; break;
} }
@@ -66,7 +60,7 @@ void unk_ramdac_out(uint16_t addr, uint8_t val, unk_ramdac_t *ramdac, svga_t *sv
{ {
svga_recalctimings(svga); svga_recalctimings(svga);
} }
// pclog("unk_ramdac: set to %02X (b5 = %i), %i bpp\n", (val&1)|((val&0xC0)>>5), val & 0x20 ? 1 : 0, svga->bpp); pclog("unk_ramdac: set to %02X (b5 = %i) [%02X], %i bpp\n", (val&1)|((val&0xC0)>>5), val & 0x20 ? 1 : 0, val, svga->bpp);
return; return;
} }
ramdac->state = 0; ramdac->state = 0;