80486DX2-66/86Box-fork
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PCI changes.

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This commit is contained in:
OBattler
2021-04-06 07:30:11 +02:00
parent 58b2467d8e
commit e04ebd69a2
2 changed files with 49 additions and 24 deletions
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1
src/include/86box/pci.h
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@@ -104,6 +104,7 @@ extern uint8_t pci_get_int(uint8_t card, uint8_t pci_int);
extern void pci_reset(void);
extern void pci_init(int type);
extern uint8_t pci_register_bus();
extern void pci_set_pmc(uint8_t pmc);
extern void pci_remap_bus(uint8_t bus_index, uint8_t bus_number);
extern void pci_register_slot(int card, int type,
int inta, int intb, int intc, int intd);

72
src/pci.c
View File

@@ -188,6 +188,35 @@ static void pci_type2_write(uint16_t port, uint8_t val, void *priv);
static uint8_t pci_type2_read(uint16_t port, void *priv);
void
pci_set_pmc(uint8_t pmc)
{
pci_reset_regs();
if (!pci_pmc && (pmc & 0x01)) {
io_removehandler(0x0cf8, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
io_removehandler(0x0cfa, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
io_sethandler(0x0cf8, 1,
NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL);
io_sethandler(0x0cfc, 4,
pci_read,NULL,NULL, pci_write,NULL,NULL, NULL);
} else if (pci_pmc && !(pmc & 0x01)) {
io_removehandler(0x0cf8, 1,
NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL);
io_removehandler(0x0cfc, 4,
pci_read,NULL,NULL, pci_write,NULL,NULL, NULL);
io_sethandler(0x0cf8, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
io_sethandler(0x0cfa, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
}
pci_pmc = (pmc & 0x01);
}
static void
pci_type2_write(uint16_t port, uint8_t val, void *priv)
{
@@ -209,29 +238,8 @@ pci_type2_write(uint16_t port, uint8_t val, void *priv)
} else if (port == 0xcfa)
pci_bus = val;
else if (port == 0xcfb) {
pci_reset_regs();
if (!pci_pmc && (val & 0x01)) {
io_removehandler(0x0cf8, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
io_removehandler(0x0cfa, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
io_sethandler(0x0cf8, 1,
NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL);
io_sethandler(0x0cfc, 4,
pci_read,NULL,NULL, pci_write,NULL,NULL, NULL);
} else if (pci_pmc && !(val & 0x01)) {
io_removehandler(0x0cf8, 1,
NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL);
io_removehandler(0x0cfc, 4,
pci_read,NULL,NULL, pci_write,NULL,NULL, NULL);
io_sethandler(0x0cf8, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
io_sethandler(0x0cfa, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
}
pci_pmc = (val & 0x01);
pci_log("Write %02X to port 0CFB\n", val);
pci_set_pmc(val);
} else {
pci_card = (port >> 8) & 0xf;
pci_index = port & 0xff;
@@ -253,6 +261,20 @@ pci_type2_write(uint16_t port, uint8_t val, void *priv)
}
static void
pci_type2_writel(uint16_t port, uint32_t val, void *priv)
{
int i;
for (i = 0; i < 4; i++) {
/* Make sure to have the DWORD write not pass through to PMC if mechanism 1 is in use,
as otherwise, the PCI enable bits clobber it. */
if (!pci_pmc || ((port + i) != 0x0cfb))
pci_type2_write(port + i, val >> 8, priv);
}
}
static uint8_t
pci_type2_read(uint16_t port, void *priv)
{
@@ -761,7 +783,7 @@ pci_init(int type)
pci_pmc = 0x00;
io_sethandler(0x0cfb, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
pci_type2_read,NULL,NULL, pci_type2_write,NULL,pci_type2_writel, NULL);
}
if (type & PCI_NO_IRQ_STEERING) {
@@ -777,11 +799,13 @@ pci_init(int type)
NULL,NULL,pci_cf8_read, NULL,NULL,pci_cf8_write, NULL);
io_sethandler(0x0cfc, 4,
pci_read,NULL,NULL, pci_write,NULL,NULL, NULL);
pci_pmc = 1;
} else {
io_sethandler(0x0cf8, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
io_sethandler(0x0cfa, 1,
pci_type2_read,NULL,NULL, pci_type2_write,NULL,NULL, NULL);
pci_pmc = 0;
}
for (c = 0; c < 4; c++) {