Writes to port 23F of the Logitech Bus mouse with bit 7 clear are now correctly treated as a Port C single bit set/reset operations (and made it so that said bit is no longer treated as a bus mouse activate/deactivate switch, which it is not), fixes MS MOUSE.COM 7.x and later.
This commit is contained in:
@@ -51,7 +51,7 @@
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* Microsoft Windows NT 3.1
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* Microsoft Windows NT 3.1
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* Microsoft Windows 98 SE
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* Microsoft Windows 98 SE
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*
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*
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* Version: @(#)mouse_bus.c 1.0.1 2018/10/02
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* Version: @(#)mouse_bus.c 1.0.2 2018/10/09
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*
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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* Authors: Miran Grca, <mgrca8@gmail.com>
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* Fred N. van Kempen, <decwiz@yahoo.com>
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* Fred N. van Kempen, <decwiz@yahoo.com>
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@@ -197,7 +197,6 @@ lt_read(uint16_t port, void *priv)
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case BUSM_PORT_CONTROL:
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case BUSM_PORT_CONTROL:
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value = dev->control_val;
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value = dev->control_val;
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dev->control_val |= 0x0F;
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dev->control_val |= 0x0F;
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/* If the conditions are right, simulate the flakiness of the correct IRQ bit. */
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/* If the conditions are right, simulate the flakiness of the correct IRQ bit. */
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if (dev->flags & FLAG_TIMER_INT)
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if (dev->flags & FLAG_TIMER_INT)
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dev->control_val = (dev->control_val & ~IRQ_MASK) | (random_generate() & IRQ_MASK);
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dev->control_val = (dev->control_val & ~IRQ_MASK) | (random_generate() & IRQ_MASK);
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@@ -269,6 +268,7 @@ static void
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lt_write(uint16_t port, uint8_t val, void *priv)
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lt_write(uint16_t port, uint8_t val, void *priv)
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{
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{
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mouse_t *dev = (mouse_t *)priv;
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mouse_t *dev = (mouse_t *)priv;
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uint8_t bit;
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bm_log("DEBUG: write to address 0x%04x, value = 0x%02x\n", port, val);
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bm_log("DEBUG: write to address 0x%04x, value = 0x%02x\n", port, val);
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@@ -306,6 +306,8 @@ lt_write(uint16_t port, uint8_t val, void *priv)
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* explains the value:
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* explains the value:
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*
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*
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* D7 = Mode set flag (1 = active)
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* D7 = Mode set flag (1 = active)
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* This indicates the mode of operation of D7:
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* 1 = Mode set, 0 = Bit set/reset
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* D6,D5 = Mode selection (port A)
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* D6,D5 = Mode selection (port A)
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* 00 = Mode 0 = Basic I/O
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* 00 = Mode 0 = Basic I/O
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* 01 = Mode 1 = Strobed I/O
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* 01 = Mode 1 = Strobed I/O
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@@ -322,17 +324,24 @@ lt_write(uint16_t port, uint8_t val, void *priv)
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* port, B is an output port, C is split with upper 4 bits
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* port, B is an output port, C is split with upper 4 bits
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* being an output port and lower 4 bits an input port, and
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* being an output port and lower 4 bits an input port, and
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* enable the sucker. Courtesy Intel 8255 databook. Lars
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* enable the sucker. Courtesy Intel 8255 databook. Lars
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*
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* 1001 1011 9B 1111 Default state
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* 1001 0001 91 1001 Driver-initialized state
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* The only difference is - port C upper and port B go from
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* input to output.
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*/
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*/
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dev->config_val = val;
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if (val & DEVICE_ACTIVE) {
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if (val & DEVICE_ACTIVE) {
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/* Mode set/reset - enable this */
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dev->config_val = val;
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dev->flags |= (FLAG_ENABLED | FLAG_TIMER_INT);
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dev->flags |= (FLAG_ENABLED | FLAG_TIMER_INT);
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dev->control_val = 0x0F & ~IRQ_MASK;
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dev->control_val = 0x0F & ~IRQ_MASK;
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dev->timer = ((int64_t) dev->period) * TIMER_USEC;
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dev->timer_enabled = 1LL;
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} else {
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} else {
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dev->flags &= ~(FLAG_ENABLED | FLAG_TIMER_INT);
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/* Single bit set/reset */
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dev->timer = 0LL;
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bit = 1 << ((val >> 1) & 0x07); /* Bits 3-1 specify the target bit */
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dev->timer_enabled = 0LL;
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if (val & 1)
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dev->control_val |= bit; /* Set */
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else
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dev->control_val &= ~bit; /* Reset */
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}
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}
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break;
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break;
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}
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}
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@@ -612,17 +621,22 @@ bm_init(const device_t *info)
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io_sethandler(dev->base, 4,
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io_sethandler(dev->base, 4,
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ms_read, NULL, NULL, ms_write, NULL, NULL, dev);
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ms_read, NULL, NULL, ms_write, NULL, NULL, dev);
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dev->timer = 0LL;
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dev->timer_enabled = 0LL;
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} else {
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} else {
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dev->control_val = 0x0f; /* the control port value */
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dev->control_val = 0x0f; /* the control port value */
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dev->config_val = 0x0e; /* the config port value */
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dev->config_val = 0x9b; /* the config port value - 0x9b is the
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default state of the 8255: all ports
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are set to input */
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dev->period = 1000000.0 / ((double) device_get_config_int("hz"));
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dev->period = 1000000.0 / ((double) device_get_config_int("hz"));
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io_sethandler(dev->base, 4,
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io_sethandler(dev->base, 4,
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lt_read, NULL, NULL, lt_write, NULL, NULL, dev);
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lt_read, NULL, NULL, lt_write, NULL, NULL, dev);
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}
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dev->timer = 0LL;
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dev->timer = ((int64_t) dev->period) * TIMER_USEC;
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dev->timer_enabled = 0LL;
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dev->timer_enabled = 1LL;
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}
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timer_add(bm_timer, &dev->timer, &dev->timer_enabled, dev);
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timer_add(bm_timer, &dev->timer, &dev->timer_enabled, dev);
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