From 51bbebbfa3edb6eed73554110c46e12873a5a23f Mon Sep 17 00:00:00 2001
From: nerd73 <nerd7b@gmail.com>
Date: Wed, 25 Mar 2020 18:02:25 -0600
Subject: [PATCH 01/11] Changes to the IBM 386/486 and RapidCAD CPUs

- Disabled the 'is486' flag and moved them to 386 timings
- Disabled cache on startup, enable-able later
- RapidCAD fixes (permanently disable L1, correct EDX reset)
---
 src/cpu_common/808x.c             |   7 +-
 src/cpu_common/cpu.c              | 103 +++++++-----------------------
 src/cpu_common/cpu.h              |   3 +-
 src/cpu_common/cpu_table.c        |  34 +++++-----
 src/cpu_common/x86_ops_atomic.h   |  84 ------------------------
 src/cpu_common/x86_ops_flag.h     |   4 +-
 src/cpu_common/x86_ops_misc.h     |  10 ---
 src/cpu_common/x86_ops_mov_ctrl.h |  14 ++--
 src/cpu_common/x86_ops_pmode.h    |   4 +-
 9 files changed, 53 insertions(+), 210 deletions(-)

diff --git a/src/cpu_common/808x.c b/src/cpu_common/808x.c
index abee70e26..28a96a73b 100644
--- a/src/cpu_common/808x.c
+++ b/src/cpu_common/808x.c
@@ -918,14 +918,11 @@ reset_common(int hard)
     stack32 = 0;
     msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) |  (1 << 16) | (1 << 19) | (1 << 21);
     msw = 0;
-    if (is486)
+    if (hascache)
 	cr0 = 1 << 30;
     else
 	cr0 = 0;
-    if (isibmcpu)
-        cpu_cache_int_enabled = 1;
-    else
-	cpu_cache_int_enabled = 0;
+    cpu_cache_int_enabled = 0;
     cpu_update_waitstates();
     cr4 = 0;
     cpu_state.eflags = 0;
diff --git a/src/cpu_common/cpu.c b/src/cpu_common/cpu.c
index 1cd856236..3727fa857 100644
--- a/src/cpu_common/cpu.c
+++ b/src/cpu_common/cpu.c
@@ -159,7 +159,8 @@ int		is286,
 		is486 = 1,
 		is486sx, is486dx, is486sx2, is486dx2, isdx4,
 		cpu_iscyrix,
-		isibmcpu,
+		hascache,
+		isibm486,
 		israpidcad,
 		is_pentium;
 
@@ -281,16 +282,17 @@ cpu_set(void)
         is8086       = (cpu_s->cpu_type > CPU_8088);
         is286        = (cpu_s->cpu_type >= CPU_286);
         is386        = (cpu_s->cpu_type >= CPU_386SX);
-	isibmcpu     = (cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL);
 	israpidcad   = (cpu_s->cpu_type == CPU_RAPIDCAD);
-        is486        = (cpu_s->cpu_type >= CPU_i486SX) || (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_RAPIDCAD || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL );
+	isibm486     = (cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL);
+        is486        = (cpu_s->cpu_type >= CPU_i486SX) || (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_RAPIDCAD);
         is486sx      = (cpu_s->cpu_type >= CPU_i486SX) && (cpu_s->cpu_type < CPU_i486SX2);
         is486sx2     = (cpu_s->cpu_type >= CPU_i486SX2) && (cpu_s->cpu_type < CPU_i486DX);
         is486dx      = (cpu_s->cpu_type >= CPU_i486DX) && (cpu_s->cpu_type < CPU_i486DX2);
-        is486dx2     = (cpu_s->cpu_type >= CPU_iDX4) && (cpu_s->cpu_type < CPU_WINCHIP);
-        isdx4        = (cpu_s->cpu_type >= CPU_i486DX2) && (cpu_s->cpu_type < CPU_iDX4);
+        is486dx2     = (cpu_s->cpu_type >= CPU_i486DX2) && (cpu_s->cpu_type < CPU_iDX4);	
+        isdx4        = (cpu_s->cpu_type >= CPU_iDX4) && (cpu_s->cpu_type < CPU_WINCHIP);
         is_pentium   = (cpu_s->cpu_type >= CPU_WINCHIP);
         hasfpu       = (cpu_s->cpu_type >= CPU_i486DX) || (cpu_s->cpu_type == CPU_RAPIDCAD);
+	hascache     = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL);
 #if defined(USE_NEW_DYNAREC) || (defined(DEV_BRANCH) && defined(USE_CYRIX_6X86))
         cpu_iscyrix  = (cpu_s->cpu_type == CPU_486SLC || cpu_s->cpu_type == CPU_486DLC || cpu_s->cpu_type == CPU_Cx486S || cpu_s->cpu_type == CPU_Cx486DX || cpu_s->cpu_type == CPU_Cx5x86 || cpu_s->cpu_type == CPU_Cx6x86 || cpu_s->cpu_type == CPU_Cx6x86MX || cpu_s->cpu_type == CPU_Cx6x86L || cpu_s->cpu_type == CPU_CxGX1);
 #else
@@ -518,7 +520,13 @@ cpu_set(void)
                 timing_jmp_pm      = 23;
                 timing_jmp_pm_gate = 38;
                 break;
-
+		
+                case CPU_IBM486SLC:
+#ifdef USE_DYNAREC
+                x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
+#else
+                x86_setopcodes(ops_386, ops_486_0f);
+#endif
 		case CPU_IBM386SLC:
                 case CPU_386SX:
                 timing_rr  = 2;   /*register dest - register src*/
@@ -550,7 +558,13 @@ cpu_set(void)
                 timing_jmp_pm      = 27;
                 timing_jmp_pm_gate = 45;
                 break;
-
+		
+                case CPU_IBM486BL:
+#ifdef USE_DYNAREC
+                x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
+#else
+                x86_setopcodes(ops_386, ops_486_0f);
+#endif
                 case CPU_386DX:
                 timing_rr  = 2; /*register dest - register src*/
                 timing_rm  = 6; /*register dest - memory src*/
@@ -582,80 +596,7 @@ cpu_set(void)
                 timing_jmp_pm_gate = 45;
                 break;
                 
-                case CPU_IBM486SLC:
-#ifdef USE_DYNAREC
-                x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
-#else
-                x86_setopcodes(ops_386, ops_486_0f);
-#endif
-                timing_rr  = 1; /*register dest - register src*/
-                timing_rm  = 2; /*register dest - memory src*/
-                timing_mr  = 5; /*memory dest   - register src*/
-                timing_mm  = 3;
-                timing_rml = 4; /*register dest - memory src long*/
-                timing_mrl = 5; /*memory dest   - register src long*/
-                timing_mml = 5;
-                timing_bt  = 3-1; /*branch taken*/
-                timing_bnt = 1; /*branch not taken*/
-                timing_int = 4;
-                timing_int_rm       = 26;
-                timing_int_v86      = 82;
-                timing_int_pm       = 44;
-                timing_int_pm_outer = 71;
-                timing_iret_rm       = 15;
-                timing_iret_v86      = 36; /*unknown*/
-                timing_iret_pm       = 20;
-                timing_iret_pm_outer = 36;
-                timing_call_rm = 18;
-                timing_call_pm = 20;
-                timing_call_pm_gate = 35;
-                timing_call_pm_gate_inner = 69;
-                timing_retf_rm       = 13;
-                timing_retf_pm       = 17;
-                timing_retf_pm_outer = 35;
-                timing_jmp_rm      = 17;
-                timing_jmp_pm      = 19;
-                timing_jmp_pm_gate = 32;
-                timing_misaligned = 3;
-                break;
-				
-                case CPU_IBM486BL:
-#ifdef USE_DYNAREC
-                x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
-#else
-                x86_setopcodes(ops_386, ops_486_0f);
-#endif
-                timing_rr  = 1; /*register dest - register src*/
-                timing_rm  = 2; /*register dest - memory src*/
-                timing_mr  = 3; /*memory dest   - register src*/
-                timing_mm  = 3;
-                timing_rml = 2; /*register dest - memory src long*/
-                timing_mrl = 3; /*memory dest   - register src long*/
-                timing_mml = 3;
-                timing_bt  = 3-1; /*branch taken*/
-                timing_bnt = 1; /*branch not taken*/
-                timing_int = 4;
-                timing_int_rm       = 26;
-                timing_int_v86      = 82;
-                timing_int_pm       = 44;
-                timing_int_pm_outer = 71;
-                timing_iret_rm       = 15;
-                timing_iret_v86      = 36; /*unknown*/
-                timing_iret_pm       = 20;
-                timing_iret_pm_outer = 36;
-                timing_call_rm = 18;
-                timing_call_pm = 20;
-                timing_call_pm_gate = 35;
-                timing_call_pm_gate_inner = 69;
-                timing_retf_rm       = 13;
-                timing_retf_pm       = 17;
-                timing_retf_pm_outer = 35;
-                timing_jmp_rm      = 17;
-                timing_jmp_pm      = 19;
-                timing_jmp_pm_gate = 32;
-                timing_misaligned = 3;
-                break;
-                
+		
                 case CPU_RAPIDCAD:
 #ifdef USE_DYNAREC
                 x86_setopcodes(ops_386, ops_486_0f, dynarec_ops_386, dynarec_ops_486_0f);
diff --git a/src/cpu_common/cpu.h b/src/cpu_common/cpu.h
index 92a0cfe9f..636273b75 100644
--- a/src/cpu_common/cpu.h
+++ b/src/cpu_common/cpu.h
@@ -382,7 +382,8 @@ extern int	cpu_cyrix_alignment;	/*Cyrix 5x86/6x86 only has data misalignment
 					  penalties when crossing 8-byte boundaries*/
 
 extern int		is8086,	is286, is386, is486, is486sx, is486dx, is486sx2, is486dx2, isdx4;
-extern int      	isibmcpu;
+extern int      hascache;
+extern int      isibm486;
 extern int		is_rapidcad;
 extern int		hasfpu;
 #define CPU_FEATURE_RDTSC (1 << 0)
diff --git a/src/cpu_common/cpu_table.c b/src/cpu_common/cpu_table.c
index f5f1dca4c..d13877db7 100644
--- a/src/cpu_common/cpu_table.c
+++ b/src/cpu_common/cpu_table.c
@@ -150,9 +150,9 @@ CPU cpus_i386DX[] = {
     {"i386DX/25",    CPU_386DX,     25000000, 1, 0x0308, 0, 0, 0, 4,4,3,3, 3},
     {"i386DX/33",    CPU_386DX,     33333333, 1, 0x0308, 0, 0, 0, 6,6,3,3, 4},
     {"i386DX/40",    CPU_386DX,     40000000, 1, 0x0308, 0, 0, 0, 7,7,3,3, 5},
-    {"RapidCAD/25",  CPU_RAPIDCAD,  25000000, 1, 0x0430, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3, 3},
-    {"RapidCAD/33",  CPU_RAPIDCAD,  33333333, 1, 0x0430, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3, 4},
-    {"RapidCAD/40",  CPU_RAPIDCAD,  40000000, 1, 0x0430, 0, 0, CPU_SUPPORTS_DYNAREC, 7,7,3,3, 5},
+    {"RapidCAD/25",  CPU_RAPIDCAD,  25000000, 1, 0x0340, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3, 3},
+    {"RapidCAD/33",  CPU_RAPIDCAD,  33333333, 1, 0x0340, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3, 4},
+    {"RapidCAD/40",  CPU_RAPIDCAD,  40000000, 1, 0x0340, 0, 0, CPU_SUPPORTS_DYNAREC, 7,7,3,3, 5},
     {"",             -1,                   0, 0,      0, 0, 0, 0, 0,0,0,0, 0}
 };
 
@@ -187,30 +187,30 @@ CPU cpus_486SLC[] = {
 
 CPU cpus_IBM386SLC[] = {
     /*IBM 386SLC*/	
-    {"386SLC/16",  CPU_IBM386SLC, 16000000, 1, 0x300, 0, 0, 0, 3,3,3,3, 2},
-    {"386SLC/20",  CPU_IBM386SLC, 20000000, 1, 0x300, 0, 0, 0, 4,4,3,3, 3},
-    {"386SLC/25",  CPU_IBM386SLC, 25000000, 1, 0x300, 0, 0, 0, 4,4,3,3, 3},	
+    {"386SLC/16",  CPU_IBM386SLC, 16000000, 1, 0xA301, 0, 0, 0, 3,3,3,3, 2},
+    {"386SLC/20",  CPU_IBM386SLC, 20000000, 1, 0xA301, 0, 0, 0, 4,4,3,3, 3},
+    {"386SLC/25",  CPU_IBM386SLC, 25000000, 1, 0xA301, 0, 0, 0, 4,4,3,3, 3},	
     {"",           -1,            0,        0,     0, 0, 0, 0, 0,0,0,0, 0}
 };
 
 CPU cpus_IBM486SLC[] = {
     /*IBM 486SLC*/
-    {"486SLC/33",   CPU_IBM486SLC, 33333333,  1, 0x400, 0, 0, 0, 6,6,3,3,    4},
-    {"486SLC2/40",  CPU_IBM486SLC, 40000000,  2, 0x400, 0, 0, 0, 7,7,6,6,    5},
-    {"486SLC2/50",  CPU_IBM486SLC, 50000000,  2, 0x400, 0, 0, 0, 8,8,6,6,    6},
-    {"486SLC2/66",  CPU_IBM486SLC, 66666666,  2, 0x400, 0, 0, 0, 12,12,6,6,  8},
-    {"486SLC3/60",  CPU_IBM486SLC, 60000000,  3, 0x400, 0, 0, 0, 12,12,9,9,  7},
-    {"486SLC3/75",  CPU_IBM486SLC, 75000000,  3, 0x400, 0, 0, 0, 12,12,9,9,  9},
-    {"486SLC3/100", CPU_IBM486SLC, 100000000, 3, 0x400, 0, 0, 0, 18,18,9,9, 12},	
+    {"486SLC/33",   CPU_IBM486SLC, 33333333,  1, 0xA401, 0, 0, 0, 6,6,3,3,    4},
+    {"486SLC2/40",  CPU_IBM486SLC, 40000000,  2, 0xA421, 0, 0, 0, 7,7,6,6,    5},
+    {"486SLC2/50",  CPU_IBM486SLC, 50000000,  2, 0xA421, 0, 0, 0, 8,8,6,6,    6},
+    {"486SLC2/66",  CPU_IBM486SLC, 66666666,  2, 0xA421, 0, 0, 0, 12,12,6,6,  8},
+    {"486SLC3/60",  CPU_IBM486SLC, 60000000,  3, 0xA439, 0, 0, 0, 12,12,9,9,  7},
+    {"486SLC3/75",  CPU_IBM486SLC, 75000000,  3, 0xA439, 0, 0, 0, 12,12,9,9,  9},
+    {"486SLC3/100", CPU_IBM486SLC, 100000000, 3, 0xA439, 0, 0, 0, 18,18,9,9, 12},	
     {"",            -1,            0,         0, 0,     0, 0, 0, 0,0,0,0,    0}
 };
 
 CPU cpus_IBM486BL[] = {
     /*IBM Blue Lightning*/	
-    {"486BL2/50",  CPU_IBM486BL, 50000000,  2, 0x400, 0, 0, 0, 8,8,6,6,    6},
-    {"486BL2/66",  CPU_IBM486BL, 66666666,  2, 0x400, 0, 0, 0, 12,12,6,6,  8},
-    {"486BL3/75",  CPU_IBM486BL, 75000000,  3, 0x400, 0, 0, 0, 12,12,9,9,  9},
-    {"486BL3/100", CPU_IBM486BL, 100000000, 3, 0x400, 0, 0, 0, 18,18,9,9, 12},	
+    {"486BL2/50",  CPU_IBM486BL, 50000000,  2, 0xA439, 0, 0, 0, 8,8,6,6,    6},
+    {"486BL2/66",  CPU_IBM486BL, 66666666,  2, 0xA439, 0, 0, 0, 12,12,6,6,  8},
+    {"486BL3/75",  CPU_IBM486BL, 75000000,  3, 0xA439, 0, 0, 0, 12,12,9,9,  9},
+    {"486BL3/100", CPU_IBM486BL, 100000000, 3, 0xA439, 0, 0, 0, 18,18,9,9, 12},	
     {"",           -1,           0,         0,     0, 0, 0, 0, 0,0,0,0,    0}
 };
 
diff --git a/src/cpu_common/x86_ops_atomic.h b/src/cpu_common/x86_ops_atomic.h
index 4011a0aa4..fca1c244a 100644
--- a/src/cpu_common/x86_ops_atomic.h
+++ b/src/cpu_common/x86_ops_atomic.h
@@ -1,12 +1,6 @@
 static int opCMPXCHG_b_a16(uint32_t fetchdat)
 {
         uint8_t temp, temp2 = AL;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_16(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteab();                        if (cpu_state.abrt) return 1;
@@ -20,12 +14,6 @@ static int opCMPXCHG_b_a16(uint32_t fetchdat)
 static int opCMPXCHG_b_a32(uint32_t fetchdat)
 {
         uint8_t temp, temp2 = AL;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_32(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteab();                        if (cpu_state.abrt) return 1;
@@ -40,12 +28,6 @@ static int opCMPXCHG_b_a32(uint32_t fetchdat)
 static int opCMPXCHG_w_a16(uint32_t fetchdat)
 {
         uint16_t temp, temp2 = AX;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_16(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteaw();                        if (cpu_state.abrt) return 1;
@@ -59,12 +41,6 @@ static int opCMPXCHG_w_a16(uint32_t fetchdat)
 static int opCMPXCHG_w_a32(uint32_t fetchdat)
 {
         uint16_t temp, temp2 = AX;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_32(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteaw();                        if (cpu_state.abrt) return 1;
@@ -79,12 +55,6 @@ static int opCMPXCHG_w_a32(uint32_t fetchdat)
 static int opCMPXCHG_l_a16(uint32_t fetchdat)
 {
         uint32_t temp, temp2 = EAX;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_16(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteal();                        if (cpu_state.abrt) return 1;
@@ -98,12 +68,6 @@ static int opCMPXCHG_l_a16(uint32_t fetchdat)
 static int opCMPXCHG_l_a32(uint32_t fetchdat)
 {
         uint32_t temp, temp2 = EAX;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_32(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteal();                        if (cpu_state.abrt) return 1;
@@ -118,12 +82,6 @@ static int opCMPXCHG_l_a32(uint32_t fetchdat)
 static int opCMPXCHG8B_a16(uint32_t fetchdat)
 {
         uint32_t temp, temp_hi, temp2 = EAX, temp2_hi = EDX;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 0;
-        }
         fetch_ea_16(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteal();
@@ -150,12 +108,6 @@ static int opCMPXCHG8B_a16(uint32_t fetchdat)
 static int opCMPXCHG8B_a32(uint32_t fetchdat)
 {
         uint32_t temp, temp_hi, temp2 = EAX, temp2_hi = EDX;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 0;
-        }
         fetch_ea_32(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteal();
@@ -183,12 +135,6 @@ static int opCMPXCHG8B_a32(uint32_t fetchdat)
 static int opXADD_b_a16(uint32_t fetchdat)
 {
         uint8_t temp;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_16(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteab();                        if (cpu_state.abrt) return 1;
@@ -201,12 +147,6 @@ static int opXADD_b_a16(uint32_t fetchdat)
 static int opXADD_b_a32(uint32_t fetchdat)
 {
         uint8_t temp;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_32(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteab();                        if (cpu_state.abrt) return 1;
@@ -220,12 +160,6 @@ static int opXADD_b_a32(uint32_t fetchdat)
 static int opXADD_w_a16(uint32_t fetchdat)
 {
         uint16_t temp;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_16(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteaw();                        if (cpu_state.abrt) return 1;
@@ -238,12 +172,6 @@ static int opXADD_w_a16(uint32_t fetchdat)
 static int opXADD_w_a32(uint32_t fetchdat)
 {
         uint16_t temp;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_32(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteaw();                        if (cpu_state.abrt) return 1;
@@ -257,12 +185,6 @@ static int opXADD_w_a32(uint32_t fetchdat)
 static int opXADD_l_a16(uint32_t fetchdat)
 {
         uint32_t temp;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_16(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteal();                        if (cpu_state.abrt) return 1;
@@ -275,12 +197,6 @@ static int opXADD_l_a16(uint32_t fetchdat)
 static int opXADD_l_a32(uint32_t fetchdat)
 {
         uint32_t temp;
-        if (!is486)
-        {
-                cpu_state.pc = cpu_state.oldpc;
-                x86illegal();
-                return 1;
-        }
         fetch_ea_32(fetchdat);
         SEG_CHECK_WRITE(cpu_state.ea_seg);
         temp = geteal();                        if (cpu_state.abrt) return 1;
diff --git a/src/cpu_common/x86_ops_flag.h b/src/cpu_common/x86_ops_flag.h
index 099f2e35f..0d9db70a7 100644
--- a/src/cpu_common/x86_ops_flag.h
+++ b/src/cpu_common/x86_ops_flag.h
@@ -264,11 +264,11 @@ static int opPOPFD(uint32_t fetchdat)
         else if (IOPLp)           cpu_state.flags = (cpu_state.flags & 0x3000) | (templ & 0x4fd5) | 2;
         else                      cpu_state.flags = (cpu_state.flags & 0x3200) | (templ & 0x4dd5) | 2;
         
-        templ &= is486 ? 0x3c0000 : 0;
+        templ &= (is486 || isibm486) ? 0x3c0000 : 0;
         templ |= ((cpu_state.eflags&3) << 16);
         if (cpu_CR4_mask & CR4_VME) cpu_state.eflags = (templ >> 16) & 0x3f;
         else if (CPUID)             cpu_state.eflags = (templ >> 16) & 0x27;
-        else if (is486)             cpu_state.eflags = (templ >> 16) & 7;
+        else if (is486 || isibm486) cpu_state.eflags = (templ >> 16) & 7;
         else                        cpu_state.eflags = (templ >> 16) & 3;
         
         flags_extract();
diff --git a/src/cpu_common/x86_ops_misc.h b/src/cpu_common/x86_ops_misc.h
index 91118211b..91994785e 100644
--- a/src/cpu_common/x86_ops_misc.h
+++ b/src/cpu_common/x86_ops_misc.h
@@ -741,22 +741,12 @@ static int opCLTS(uint32_t fetchdat)
 
 static int opINVD(uint32_t fetchdat)
 {
-        if (!is486) 
-        {
-                x86illegal();
-                return 1;
-        }
         CLOCK_CYCLES(1000);
         CPU_BLOCK_END();
         return 0;
 }
 static int opWBINVD(uint32_t fetchdat)
 {
-        if (!is486) 
-        {
-                x86illegal();
-                return 1;
-        }
         CLOCK_CYCLES(10000);
         CPU_BLOCK_END();
         return 0;
diff --git a/src/cpu_common/x86_ops_mov_ctrl.h b/src/cpu_common/x86_ops_mov_ctrl.h
index 06a89884b..569fb4dce 100644
--- a/src/cpu_common/x86_ops_mov_ctrl.h
+++ b/src/cpu_common/x86_ops_mov_ctrl.h
@@ -10,7 +10,7 @@ static int opMOV_r_CRx_a16(uint32_t fetchdat)
         {
                 case 0:
                 cpu_state.regs[cpu_rm].l = cr0;
-                if (is486)
+                if (is486 || isibm486)
                         cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/
                 break;
                 case 2:
@@ -46,7 +46,7 @@ static int opMOV_r_CRx_a32(uint32_t fetchdat)
         {
                 case 0:
                 cpu_state.regs[cpu_rm].l = cr0;
-                if (is486)
+                if (is486 || isibm486)
                         cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/
                 break;
                 case 2:
@@ -118,13 +118,11 @@ static int opMOV_CRx_r_a16(uint32_t fetchdat)
                         cr0 |= 0x10;
                 if (!(cr0 & 0x80000000))
                         mmu_perm=4;
-                if (is486 && !(cr0 & (1 << 30)))
+                if (hascache && !(cr0 & (1 << 30)))
                         cpu_cache_int_enabled = 1;
-				else if (isibmcpu)
-                        cpu_cache_int_enabled = 1;	
 				else
 						cpu_cache_int_enabled = 0;
-				if (is486 && ((cr0 ^ old_cr0) & (1 << 30)))
+				if (hascache && ((cr0 ^ old_cr0) & (1 << 30)))
                         cpu_update_waitstates();
                 if (cr0 & 1)
                         cpu_cur_status |= CPU_STATUS_PMODE;
@@ -174,11 +172,11 @@ static int opMOV_CRx_r_a32(uint32_t fetchdat)
                         cr0 |= 0x10;
                 if (!(cr0 & 0x80000000))
                         mmu_perm=4;
-                if (is486 && !(cr0 & (1 << 30)))
+                if (hascache && !(cr0 & (1 << 30)))
                         cpu_cache_int_enabled = 1;
                 else
                         cpu_cache_int_enabled = 0;
-                if (is486 && ((cr0 ^ old_cr0) & (1 << 30)))
+                if (hascache && ((cr0 ^ old_cr0) & (1 << 30)))
                         cpu_update_waitstates();
                 if (cr0 & 1)
                         cpu_cur_status |= CPU_STATUS_PMODE;
diff --git a/src/cpu_common/x86_ops_pmode.h b/src/cpu_common/x86_ops_pmode.h
index 7fe5d4938..26bdc3a11 100644
--- a/src/cpu_common/x86_ops_pmode.h
+++ b/src/cpu_common/x86_ops_pmode.h
@@ -370,7 +370,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
                 case 0x20: /*SMSW*/
                 if (cpu_mod != 3)
                         SEG_CHECK_WRITE(cpu_state.ea_seg);
-                if (is486)      seteaw(msw);
+                if (is486 || isibm486)      seteaw(msw);
                 else if (is386) seteaw(msw | 0xFF00);
                 else            seteaw(msw | 0xFFF0);
                 CLOCK_CYCLES(2);
@@ -401,7 +401,7 @@ static int op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
                 break;
 
                 case 0x38: /*INVLPG*/
-                if (is486)
+                if (is486 || isibm486)
                 {
                         if ((CPL || cpu_state.eflags&VM_FLAG) && (cr0&1))
                         {

From d1be6a014fb20788071649ee542f884120cb076c Mon Sep 17 00:00:00 2001
From: RichardG867 <richardg867@gmail.com>
Date: Wed, 25 Mar 2020 21:35:35 -0300
Subject: [PATCH 02/11] Implement SPD

---
 src/machine/m_at_socket8.c |   5 +
 src/spd.c                  | 281 +++++++++++++++++++++++++++++++++++++
 src/spd.h                  |  73 ++++++++++
 src/win/Makefile.mingw     |   2 +-
 src/win/Makefile_ndr.mingw |   2 +-
 5 files changed, 361 insertions(+), 2 deletions(-)
 create mode 100644 src/spd.c
 create mode 100644 src/spd.h

diff --git a/src/machine/m_at_socket8.c b/src/machine/m_at_socket8.c
index dcac383a6..2c2a15a12 100644
--- a/src/machine/m_at_socket8.c
+++ b/src/machine/m_at_socket8.c
@@ -35,6 +35,7 @@
 #include "sio.h"
 #include "sst_flash.h"
 #include "hwm.h"
+#include "spd.h"
 #include "video.h"
 #include "cpu.h"
 #include "machine.h"
@@ -134,6 +135,7 @@ machine_at_6abx3_init(const machine_t *model)
     // device_add(&intel_flash_bxt_device);
     // device_add(&sst_flash_29ee020_device);
     device_add(&intel_flash_bxt_device);
+    spd_register(SPD_TYPE_SDRAM, 0xF, 256);
 
     return ret;
 }
@@ -166,6 +168,7 @@ machine_at_p2bls_init(const machine_t *model)
     device_add(&keyboard_ps2_pci_device);
     device_add(&w83977ef_device);
     device_add(&sst_flash_39sf020_device);
+    spd_register(SPD_TYPE_SDRAM, 0xF, 256);
 
     hwm_values_t machine_hwm = {
     	{    /* fan speeds */
@@ -225,6 +228,7 @@ machine_at_p6bxt_init(const machine_t *model)
     device_add(&w83977tf_device);
     device_add(&keyboard_ps2_pci_device);
     device_add(&intel_flash_bxt_device);
+    spd_register(SPD_TYPE_SDRAM, 0x7, 256);
 
     return ret;
 }
@@ -260,6 +264,7 @@ machine_at_63a_init(const machine_t *model)
     device_add(&w83977tf_device);
     device_add(&keyboard_ps2_pci_device);
     device_add(&intel_flash_bxt_device);
+    spd_register(SPD_TYPE_SDRAM, 0x3, 128);
 
     return ret;
 }
diff --git a/src/spd.c b/src/spd.c
new file mode 100644
index 000000000..b0d3ca2bd
--- /dev/null
+++ b/src/spd.c
@@ -0,0 +1,281 @@
+/*
+ * 86Box	A hypervisor and IBM PC system emulator that specializes in
+ *		running old operating systems and software designed for IBM
+ *		PC systems and compatibles from 1981 through fairly recent
+ *		system designs based on the PCI bus.
+ *
+ *		This file is part of the 86Box distribution.
+ *
+ *		Emulation of SPD (Serial Presence Detect) devices.
+ *
+ * Version:	@(#)spd.c	1.0.0	2020/03/24
+ *
+ * Authors:	RichardG, <richardg867@gmail.com>
+ *
+ *		Copyright 2020 RichardG.
+ */
+#include <stdarg.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <wchar.h>
+#define HAVE_STDARG_H
+#include "86box.h"
+#include "device.h"
+#include "smbus.h"
+#include "spd.h"
+
+
+#define SPD_MAX_SLOTS	8
+#define SPD_DATA_SIZE	256
+
+#define MIN(a, b) ((a) < (b) ? (a) : (b))
+
+
+typedef struct _spd_ {
+    uint8_t	slot;
+    uint8_t	addr_register;
+} spd_t;
+
+
+device_t	*spd_devices[SPD_MAX_SLOTS];
+uint8_t		spd_data[SPD_MAX_SLOTS][SPD_DATA_SIZE];
+
+
+static uint8_t	spd_read_byte(uint8_t addr, void *priv);
+static uint8_t	spd_read_byte_cmd(uint8_t addr, uint8_t cmd, void *priv);
+static void	spd_write_byte(uint8_t addr, uint8_t val, void *priv);
+
+
+#define ENABLE_SPD_LOG 1
+#ifdef ENABLE_SPD_LOG
+int spd_do_log = ENABLE_SPD_LOG;
+
+
+static void
+spd_log(const char *fmt, ...)
+{
+    va_list ap;
+
+    if (spd_do_log) {
+    	va_start(ap, fmt);
+    	pclog_ex(fmt, ap);
+    	va_end(ap);
+    }
+}
+#else
+#define spd_log(fmt, ...)
+#endif
+
+
+uint8_t
+spd_read_byte(uint8_t addr, void *priv)
+{
+    spd_t *dev = (spd_t *) priv;
+    return spd_read_byte_cmd(addr, dev->addr_register, priv);
+}
+
+
+uint8_t
+spd_read_byte_cmd(uint8_t addr, uint8_t cmd, void *priv)
+{
+    spd_t *dev = (spd_t *) priv;
+    uint8_t ret = *(spd_data[dev->slot] + cmd);
+    spd_log("SPD: read(%02x, %02x) = %02x\n", addr, cmd, ret);
+    return ret;
+}
+
+
+void
+spd_write_byte(uint8_t addr, uint8_t val, void *priv)
+{
+    spd_t *dev = (spd_t *) priv;
+    dev->addr_register = val;
+}
+
+
+static void
+spd_close(void *priv)
+{
+    spd_t *dev = (spd_t *) priv;
+
+    spd_log("SPD: closing slot %d (SMBus %02Xh)\n", dev->slot, SPD_BASE_ADDR + dev->slot);
+
+    smbus_removehandler(SPD_BASE_ADDR + dev->slot, 1,
+    			spd_read_byte, spd_read_byte_cmd, NULL, NULL,
+    			spd_write_byte, NULL, NULL, NULL,
+    			dev);
+
+    free(dev);
+}
+
+
+static void *
+spd_init(const device_t *info)
+{
+    spd_t *dev = (spd_t *) malloc(sizeof(spd_t));
+    memset(dev, 0, sizeof(spd_t));
+
+    dev->slot = info->local;
+
+    spd_log("SPD: initializing slot %d (SMBus %02Xh)\n", dev->slot, SPD_BASE_ADDR + dev->slot);
+
+    smbus_sethandler(SPD_BASE_ADDR + dev->slot, 1,
+    			spd_read_byte, spd_read_byte_cmd, NULL, NULL,
+    			spd_write_byte, NULL, NULL, NULL,
+    			dev);
+
+    return dev;
+}
+
+
+uint8_t
+log2_ui16(uint16_t i)
+{
+    uint8_t ret = 0;
+    while ((i >>= 1))
+    	ret++;
+    return ret;
+}
+
+
+int
+comp_ui16_rev(const void *elem1, const void *elem2)
+{
+    uint16_t a = *((uint16_t *)elem1);
+    uint16_t b = *((uint16_t *)elem2);
+    return ((a > b) ? -1 : ((a < b) ? 1 : 0));
+}
+
+
+void
+spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
+{
+    uint8_t slot, slot_count, vslot, next_empty_vslot, i, split;
+    uint16_t min_size, total_size, vslots[SPD_MAX_SLOTS];
+    spd_sdram_t *sdram_data;
+
+    /* determine the minimum module size for this RAM type */
+    switch (ram_type) {
+    	case SPD_TYPE_SDRAM:
+    		min_size = SPD_MIN_SIZE_SDRAM;
+    		break;
+
+	default:
+    		spd_log("SPD: unknown RAM type 0x%02X\n", ram_type);
+    		return;
+    }
+
+    /* count how many (real) slots are enabled */
+    slot_count = 0;
+    for (slot = 0; slot < SPD_MAX_SLOTS; slot++) {
+    	vslots[slot] = 0;
+    	if (slot_mask & (1 << slot)) {
+    		slot_count++;
+    	}
+    }
+
+    /* populate vslots with modules in power-of-2 capacities */
+    total_size = mem_size / 1024;
+    for (vslot = 0; vslot < slot_count && total_size; vslot++) {
+    	/* populate slot */
+    	vslots[vslot] = (1 << log2_ui16(MIN(total_size, max_module_size)));
+    	spd_log("SPD: assigning %d MB to vslot %d\n", vslots[vslot], vslot);
+    	total_size -= vslots[vslot];
+    }
+
+    if (total_size > 0) /* did we populate everything? */
+    	spd_log("SPD: not enough RAM slots (%d) to cover memory (%d MB short)\n", slot_count, total_size);
+
+    /* populate empty vslots by splitting modules while possible */
+    split = 1;
+    while (split) {
+    	/* look for a module to split */
+    	split = 0;
+    	for (vslot = 0; vslot < slot_count; vslot++) {
+    		if (vslots[vslot] < (min_size * 2))
+    			continue; /* no module here or module is too small to be split */
+
+    		/* find next empty vslot */
+    		next_empty_vslot = 0;
+    		for (i = vslot + 1; i < slot_count && !next_empty_vslot; i++) {
+    			if (!vslots[i])
+    				next_empty_vslot = i;
+    		}
+    		if (!next_empty_vslot)
+    			break; /* no empty vslots left */
+
+    		/* split the module into its own vslot and the next empty vslot */
+    		spd_log("SPD: splitting vslot %d (%d MB) into %d and %d (%d MB each)\n", vslot, vslots[vslot], vslot, next_empty_vslot, vslots[vslot] >> 1);
+    		vslots[vslot] = vslots[next_empty_vslot] = vslots[vslot] >> 1;
+    		split = 1;
+    	}
+
+    	/* re-sort vslots by descending capacity if any modules were split */
+    	if (split)
+    		qsort(vslots, slot_count, sizeof(uint16_t), comp_ui16_rev);
+    }
+
+    /* register SPD devices and populate their data according to the vslots */
+    vslot = 0;
+    for (slot = 0; slot < SPD_MAX_SLOTS; slot++) {
+    	if (!(slot_mask & (1 << slot)))
+    		continue; /* slot disabled */
+
+    	if (!vslots[vslot])
+    		break; /* no slots left to fill */
+
+    	spd_log("SPD: registering slot %d = %d MB\n", slot, vslots[vslot]);
+
+    	spd_devices[slot] = (device_t *)malloc(sizeof(device_t));
+    	memset(spd_devices[slot], 0, sizeof(device_t));
+    	spd_devices[slot]->name = "Serial Presence Detect ROM";
+    	spd_devices[slot]->local = slot;
+    	spd_devices[slot]->init = spd_init;
+    	spd_devices[slot]->close = spd_close;
+
+    	switch (ram_type) {
+    		case SPD_TYPE_SDRAM:
+    			sdram_data = (spd_sdram_t *)&spd_data[slot];
+    			memset(sdram_data, 0, sizeof(spd_sdram_t));
+
+    			sdram_data->bytes_used = 0x80;
+    			sdram_data->spd_size = 0x08;
+    			sdram_data->mem_type = ram_type;
+    			sdram_data->row_bits = 5 + log2_ui16(vslots[vslot]);
+    			sdram_data->col_bits = 9;
+    			sdram_data->rows = 2;
+    			sdram_data->data_width_lsb = 64;
+    			sdram_data->data_width_msb = 0;
+    			sdram_data->signal_level = SPD_SDR_SIGNAL_LVTTL;
+    			sdram_data->tclk = sdram_data->tac = 0x10;
+    			sdram_data->config = 0;
+    			sdram_data->refresh_rate = SPD_SDR_REFRESH_SELF | SPD_SDR_REFRESH_NORMAL;
+    			sdram_data->sdram_width = 8;
+    			sdram_data->tccd = 1;
+    			sdram_data->burst = SPD_SDR_BURST_PAGE | 1 | 2 | 4 | 8;
+    			sdram_data->banks = 4;
+    			sdram_data->cas = sdram_data->cs = sdram_data->we = 0x7F;
+    			sdram_data->dev_attr = SPD_SDR_ATTR_EARLY_RAS | SPD_SDR_ATTR_AUTO_PC | SPD_SDR_ATTR_PC_ALL | SPD_SDR_ATTR_W1R_BURST;
+    			sdram_data->tclk2 = sdram_data->tac2 = 0x10;
+    			sdram_data->trp = sdram_data->trrd = sdram_data->trcd = sdram_data->tras = 1;
+    			sdram_data->bank_density = 1 << (log2_ui16(vslots[vslot] >> 1) - 2);
+    			sdram_data->ca_setup = sdram_data->data_setup = 0x15;
+    			sdram_data->ca_hold = sdram_data->data_hold = 0x08;
+    			sdram_data->spd_rev = 0x12;
+    			sprintf(sdram_data->part_no, "86Box-SDR-%03dM", vslots[vslot]);
+    			sdram_data->mfg_year = 0x20;
+    			sdram_data->mfg_week = 0x01;
+    			sdram_data->freq = 100;
+    			sdram_data->features = 0xFF;
+
+    			for (i = 0; i < 63; i++)
+    				sdram_data->checksum += spd_data[slot][i];
+    			break;
+    	}
+
+    	device_add(spd_devices[slot]);
+    	vslot++;
+    }
+}
diff --git a/src/spd.h b/src/spd.h
new file mode 100644
index 000000000..3cbc7a7a3
--- /dev/null
+++ b/src/spd.h
@@ -0,0 +1,73 @@
+/*
+ * 86Box	A hypervisor and IBM PC system emulator that specializes in
+ *		running old operating systems and software designed for IBM
+ *		PC systems and compatibles from 1981 through fairly recent
+ *		system designs based on the PCI bus.
+ *
+ *		This file is part of the 86Box distribution.
+ *
+ *		Emulation of SPD (Serial Presence Detect) devices.
+ *
+ * Version:	@(#)spd.h	1.0.0	2020/03/24
+ *
+ * Authors:	RichardG, <richardg867@gmail.com>
+ *
+ *		Copyright 2020 RichardG.
+ */
+#ifndef EMU_SPD_H
+# define EMU_SPD_H
+
+
+#define SPD_BASE_ADDR		0x50
+
+#define SPD_TYPE_EDO		0x02
+#define SPD_TYPE_SDRAM		0x04
+
+#define SPD_MIN_SIZE_SDRAM	8
+
+#define SPD_SDR_SIGNAL_LVTTL	0x01
+
+#define SPD_SDR_REFRESH_NORMAL	0x00
+#define SPD_SDR_REFRESH_SELF	0x80
+
+#define SPD_SDR_BURST_PAGE	0x80
+
+#define SPD_SDR_ATTR_BUFFERED	0x01
+#define SPD_SDR_ATTR_REGISTERED	0x02
+
+#define SPD_SDR_ATTR_EARLY_RAS	0x01
+#define SPD_SDR_ATTR_AUTO_PC	0x02
+#define SPD_SDR_ATTR_PC_ALL	0x04
+#define SPD_SDR_ATTR_W1R_BURST	0x08
+#define SPD_SDR_ATTR_VCC_LOW_5	0x10
+#define SPD_SDR_ATTR_VCC_HI_5	0x20
+
+
+typedef struct _spd_sdram_ {
+    uint8_t	bytes_used, spd_size, mem_type,
+    		row_bits, col_bits, rows,
+    		data_width_lsb, data_width_msb,
+    		signal_level, tclk, tac,
+    		config, refresh_rate,
+    		sdram_width, ecc_width,
+    		tccd, burst, banks, cas, cs, we,
+    		mod_attr, dev_attr,
+    		tclk2, tac2, tclk3, tac3,
+    		trp, trrd, trcd, tras,
+    		bank_density,
+    		ca_setup, ca_hold, data_setup, data_hold,
+    		reserved[26],
+    		spd_rev, checksum,
+    		mfg_jedec[8], mfg_loc;
+    char	part_no[18];
+    uint8_t	rev_code[2],
+    		mfg_year, mfg_week, serial[4], mfg_specific[27],
+    		freq, features,
+    		other_data[128];
+} spd_sdram_t;
+
+
+extern void spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size);
+
+
+#endif	/*EMU_SPD_H*/
diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw
index bcc10bbd2..6f16e2cbe 100644
--- a/src/win/Makefile.mingw
+++ b/src/win/Makefile.mingw
@@ -605,7 +605,7 @@ DEVOBJ		:= bugger.o hwm.o hwm_w83781d.o ibm_5161.o isamem.o isartc.o lpt.o postc
 		    sio_w83787f.o \
 		    sio_w83877f.o sio_w83977f.o \
 		    sio_um8669f.o \
-		    smbus.o \
+		    smbus.o spd.o \
 		   keyboard.o \
 		    keyboard_xt.o keyboard_at.o \
 		   gameport.o \
diff --git a/src/win/Makefile_ndr.mingw b/src/win/Makefile_ndr.mingw
index 23466a8f6..e8d74a888 100644
--- a/src/win/Makefile_ndr.mingw
+++ b/src/win/Makefile_ndr.mingw
@@ -610,7 +610,7 @@ DEVOBJ		:= bugger.o hwm.o hwm_w83781d.o ibm_5161.o isamem.o isartc.o lpt.o postc
 		    sio_w83787f.o \
 		    sio_w83877f.o sio_w83977f.o \
 		    sio_um8669f.o \
-		    smbus.o \
+		    smbus.o spd.o \
 		   keyboard.o \
 		    keyboard_xt.o keyboard_at.o \
 		   gameport.o \

From 6a9106050fb19e762429943ce97978334bb23a68 Mon Sep 17 00:00:00 2001
From: RichardG867 <richardg867@gmail.com>
Date: Wed, 25 Mar 2020 21:38:38 -0300
Subject: [PATCH 03/11] Add SPD to the Bora Pro

---
 src/machine/m_at_socket8.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/machine/m_at_socket8.c b/src/machine/m_at_socket8.c
index 931b7a553..100835144 100644
--- a/src/machine/m_at_socket8.c
+++ b/src/machine/m_at_socket8.c
@@ -231,6 +231,7 @@ machine_at_borapro_init(const machine_t *model)
     device_add(&w83977ef_device);
     device_add(&keyboard_ps2_ami_pci_device);
     device_add(&intel_flash_bxt_device);
+    spd_register(SPD_TYPE_SDRAM, 0x3, 256);
 
     return ret;
 }

From b734fd00fb59922e1cc99d2dd537897b2ccc6410 Mon Sep 17 00:00:00 2001
From: RichardG867 <richardg867@gmail.com>
Date: Wed, 25 Mar 2020 21:39:42 -0300
Subject: [PATCH 04/11] 440ZX supports 512MB the same way 440BX supports 1GB:
 unofficially

---
 src/machine/m_at_socket8.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/machine/m_at_socket8.c b/src/machine/m_at_socket8.c
index 100835144..3c94216b2 100644
--- a/src/machine/m_at_socket8.c
+++ b/src/machine/m_at_socket8.c
@@ -299,7 +299,7 @@ machine_at_63a_init(const machine_t *model)
     device_add(&w83977tf_device);
     device_add(&keyboard_ps2_pci_device);
     device_add(&intel_flash_bxt_device);
-    spd_register(SPD_TYPE_SDRAM, 0x3, 128);
+    spd_register(SPD_TYPE_SDRAM, 0x3, 256);
 
     return ret;
 }

From 8d17595fff9c66516a7180a0512d6bda7c9cbc28 Mon Sep 17 00:00:00 2001
From: RichardG867 <richardg867@gmail.com>
Date: Wed, 25 Mar 2020 21:50:41 -0300
Subject: [PATCH 05/11] Machine table fixes

---
 src/machine/machine_table.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c
index 1cecfce3c..6c96ff783 100644
--- a/src/machine/machine_table.c
+++ b/src/machine/machine_table.c
@@ -233,13 +233,14 @@ const machine_t machines[] = {
     { "[Socket 8 FX] Tyan Titan-Pro AT",	"440fx",		{{"Intel", cpus_PentiumPro},  {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 1024,   8, 127,	       machine_at_i440fx_init, NULL			},
     { "[Socket 8 FX] Tyan Titan-Pro ATX",	"tpatx",		{{"Intel", cpus_PentiumPro},  {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 1024,   8, 127,		machine_at_s1668_init, NULL			},
 
-    { "[Slot 1 BX] Lucky Star 6ABX3",		"6abx3",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron},	 {"VIA", cpus_Cyrix3}, {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  	  8,  768,   8, 255,		machine_at_6abx3_init, NULL			},
+    { "[Slot 1 BX] Lucky Star 6ABX3",		"6abx3",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron},	 {"VIA", cpus_Cyrix3}, {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  768,   8, 255,		machine_at_6abx3_init, NULL			},
+    { "[Slot 1 BX] ASUS P2B-LS",		"p2bls",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron},	 {"VIA", cpus_Cyrix3}, {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8, 1024,   8, 255,		machine_at_p2bls_init, NULL			},
 #else
-    { "[Slot 1 BX] Lucky Star 6ABX3",		"6abx3",		{{"VIA", cpus_Cyrix3},        {"",    NULL},	     {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  		  8,  768,   8, 255,		machine_at_6abx3_init, NULL			},	
+    { "[Slot 1 BX] Lucky Star 6ABX3",		"6abx3",		{{"VIA", cpus_Cyrix3},        {"",    NULL},	     {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  768,   8, 255,		machine_at_6abx3_init, NULL			},	
+    { "[Slot 1 BX] ASUS P2B-LS",		"p2bls",		{{"VIA", cpus_Cyrix3},        {"",    NULL},	     {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 1024,   8, 255,		machine_at_p2bls_init, NULL			},
 #endif
 #if defined(DEV_BRANCH) && defined(USE_I686)
-    { "[Slot 1 BX] ASUS P2B-LS",		    "p2bls",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron}, {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 1024,   8, 255,		machine_at_p2bls_init, NULL			},
-    { "[Slot 1 ZX] Packard Bell Bora Pro",	"borapro",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron},  {"VIA", cpus_Cyrix3},   {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,				  8, 256,    8, 255,		machine_at_borapro_init, NULL		},
+    { "[Slot 1 ZX] Packard Bell Bora Pro",	"borapro",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron}, {"VIA", cpus_Cyrix3},   {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8, 256,    8, 255,		machine_at_borapro_init, NULL			},
 
     { "[Socket 370 BX] ECS P6BXT-A+",		"p6bxt",		{{"Intel", cpus_Celeron},     {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 1024,   8, 255,		machine_at_p6bxt_init, NULL			},
     { "[Socket 370 ZX] Soltek SL-63A1",		"63a",			{{"Intel", cpus_Celeron},     {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 256,    8, 255,		machine_at_63a_init, NULL			},

From 9446b2e4138e722560019e89fffe65c28c0ee42a Mon Sep 17 00:00:00 2001
From: RichardG867 <richardg867@gmail.com>
Date: Wed, 25 Mar 2020 21:52:14 -0300
Subject: [PATCH 06/11] Machine table fixes, part 2

---
 src/machine/machine_table.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c
index 6c96ff783..68292d74f 100644
--- a/src/machine/machine_table.c
+++ b/src/machine/machine_table.c
@@ -240,10 +240,10 @@ const machine_t machines[] = {
     { "[Slot 1 BX] ASUS P2B-LS",		"p2bls",		{{"VIA", cpus_Cyrix3},        {"",    NULL},	     {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 1024,   8, 255,		machine_at_p2bls_init, NULL			},
 #endif
 #if defined(DEV_BRANCH) && defined(USE_I686)
-    { "[Slot 1 ZX] Packard Bell Bora Pro",	"borapro",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron}, {"VIA", cpus_Cyrix3},   {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8, 256,    8, 255,		machine_at_borapro_init, NULL			},
+    { "[Slot 1 ZX] Packard Bell Bora Pro",	"borapro",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron}, {"VIA", cpus_Cyrix3},   {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  512,   8, 255,		machine_at_borapro_init, NULL			},
 
-    { "[Socket 370 BX] ECS P6BXT-A+",		"p6bxt",		{{"Intel", cpus_Celeron},     {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 1024,   8, 255,		machine_at_p6bxt_init, NULL			},
-    { "[Socket 370 ZX] Soltek SL-63A1",		"63a",			{{"Intel", cpus_Celeron},     {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 256,    8, 255,		machine_at_63a_init, NULL			},
+    { "[Socket 370 BX] ECS P6BXT-A+",		"p6bxt",		{{"Intel", cpus_Celeron},     {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  768,   8, 255,		machine_at_p6bxt_init, NULL			},
+    { "[Socket 370 ZX] Soltek SL-63A1",		"63a",			{{"Intel", cpus_Celeron},     {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  512,   8, 255,		machine_at_63a_init, NULL			},
 #endif
     { NULL,					NULL,			{{"",      0},                {"",    0},            {"",      0},           {"",         0},     {"",      0}},    0,                                                                                                    0,    0,   0,   0,				 NULL, NULL			}
 };

From 661335f0cc3cd926d2f02306909837912d21141d Mon Sep 17 00:00:00 2001
From: RichardG867 <richardg867@gmail.com>
Date: Wed, 25 Mar 2020 22:38:34 -0300
Subject: [PATCH 07/11] Export P2B-LS to non-dev builds

---
 src/machine/machine.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/machine/machine.h b/src/machine/machine.h
index b9c28a908..5a5a52975 100644
--- a/src/machine/machine.h
+++ b/src/machine/machine.h
@@ -311,8 +311,8 @@ extern int	machine_at_s1668_init(const machine_t *);
 #endif
 
 extern int	machine_at_6abx3_init(const machine_t *);
-#if defined(DEV_BRANCH) && defined(USE_I686) /*P2B-LS has no VIA C3 BIOS support, so further investigation may be needed*/
 extern int  machine_at_p2bls_init(const machine_t *);
+#if defined(DEV_BRANCH) && defined(USE_I686)
 extern int	machine_at_borapro_init(const machine_t *);
 
 extern int	machine_at_p6bxt_init(const machine_t *);

From 80f1493d73d64957b0181626bcf2205e2bc211f4 Mon Sep 17 00:00:00 2001
From: RichardG867 <richardg867@gmail.com>
Date: Wed, 25 Mar 2020 22:45:18 -0300
Subject: [PATCH 08/11] Actually move the P2B-LS code to non-dev builds

---
 src/machine/m_at_socket8.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/machine/m_at_socket8.c b/src/machine/m_at_socket8.c
index 3c94216b2..578d9ae8a 100644
--- a/src/machine/m_at_socket8.c
+++ b/src/machine/m_at_socket8.c
@@ -139,7 +139,7 @@ machine_at_6abx3_init(const machine_t *model)
 
     return ret;
 }
-#if defined(DEV_BRANCH) && defined(USE_I686)
+
 int
 machine_at_p2bls_init(const machine_t *model)
 {
@@ -199,7 +199,7 @@ machine_at_p2bls_init(const machine_t *model)
 
     return ret;
 }
-
+#if defined(DEV_BRANCH) && defined(USE_I686)
 int
 machine_at_borapro_init(const machine_t *model)
 {

From fb4db7aaf96e080569929a53ded40630f469f7be Mon Sep 17 00:00:00 2001
From: RichardG867 <richardg867@gmail.com>
Date: Wed, 25 Mar 2020 22:48:47 -0300
Subject: [PATCH 09/11] Only check for Klamath on dev branch

---
 src/machine/m_at_socket8.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/machine/m_at_socket8.c b/src/machine/m_at_socket8.c
index 578d9ae8a..1442711fd 100644
--- a/src/machine/m_at_socket8.c
+++ b/src/machine/m_at_socket8.c
@@ -192,8 +192,10 @@ machine_at_p2bls_init(const machine_t *model)
     		0
     	}
     };
+#if defined(DEV_BRANCH) && defined(USE_I686)
     if (model->cpu[cpu_manufacturer].cpus[cpu_effective].cpu_type == CPU_PENTIUM2)
     	machine_hwm.voltages[0] = 2800; /* set higher VCORE (2.8V) for Klamath */
+#endif
     hwm_set_values(machine_hwm);
     device_add(&as99127f_device);
 

From a14429dbeed91a60b6d586f47be0a18541cf4c36 Mon Sep 17 00:00:00 2001
From: nerd73 <nerd7b@gmail.com>
Date: Wed, 25 Mar 2020 21:10:14 -0600
Subject: [PATCH 10/11] Machine table revisions

- Fixes maximum RAM amounts on some motherboards
- Adds finalized 430TX roster
- Removes VLB from all PCI boards as none of our emulated PCI boards have VLB
---
 src/machine/m_at_socket7_s7.c |  45 ++++++++++--
 src/machine/m_at_socket8.c    |   7 +-
 src/machine/machine.h         |  12 ++-
 src/machine/machine_table.c   | 133 ++++++++++++++++++----------------
 src/video/vid_s3.c            |   2 +-
 5 files changed, 117 insertions(+), 82 deletions(-)

diff --git a/src/machine/m_at_socket7_s7.c b/src/machine/m_at_socket7_s7.c
index 5898fb908..3601093cc 100644
--- a/src/machine/m_at_socket7_s7.c
+++ b/src/machine/m_at_socket7_s7.c
@@ -492,11 +492,11 @@ machine_at_j656vxd_init(const machine_t *model)
 
 
 int
-machine_at_5tx52_init(const machine_t *model)
+machine_at_p55xb2_init(const machine_t *model)
 {
     int ret;
 
-    ret = bios_load_linear(L"roms/machines/5tx52/5itw002.bin",
+    ret = bios_load_linear(L"roms/machines/p55xb2/XB20721.BIN",
 			   0x000e0000, 131072, 0);
 
     if (bios_only || !ret)
@@ -514,7 +514,7 @@ machine_at_5tx52_init(const machine_t *model)
     device_add(&i430tx_device);
     device_add(&piix4_device);
     device_add(&keyboard_ps2_pci_device);
-    device_add(&w83877tf_acorp_device);
+//  device_add(&ali_m513x_device);
     device_add(&intel_flash_bxt_device);
 
     return ret;
@@ -522,11 +522,11 @@ machine_at_5tx52_init(const machine_t *model)
 
 
 int
-machine_at_txp4_init(const machine_t *model)
+machine_at_tx97_init(const machine_t *model)
 {
     int ret;
 
-    ret = bios_load_linear(L"roms/machines/txp4/0112L.001",
+    ret = bios_load_linear(L"roms/machines/tx97/0112.001",
 			   0x000e0000, 131072, 0);
 
     if (bios_only || !ret)
@@ -586,11 +586,11 @@ machine_at_ym430tx_init(const machine_t *model)
 
 
 int
-machine_at_sp586tx_init(const machine_t *model)
+machine_at_586t2_init(const machine_t *model)
 {
     int ret;
 
-    ret = bios_load_linear(L"roms/machines/sp586tx/Txa6-32gb.bin",
+    ret = bios_load_linear(L"roms/machines/586t2/5itw001.bin",
 			   0x000e0000, 131072, 0);
 
     if (bios_only || !ret)
@@ -608,7 +608,36 @@ machine_at_sp586tx_init(const machine_t *model)
     device_add(&i430tx_device);
     device_add(&piix4_device);
     device_add(&keyboard_ps2_pci_device);
-    device_add(&w83977tf_device);
+    device_add(&um8669f_device); /*Placeholder for ITE 8679*/
+    device_add(&sst_flash_29ee010_device);
+
+    return ret;
+}
+
+int
+machine_at_807ds_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear(L"roms/machines/807ds/Tx0212g.rom",
+			   0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+	return ret;
+
+    machine_at_common_init_ex(model, 2);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
+    pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1);
+    pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2);
+    pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3);
+    pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);	/* PIIX4 */
+    device_add(&i430tx_device);
+    device_add(&piix4_device);
+    device_add(&keyboard_ps2_pci_device);
+    device_add(&um8669f_device); /*Placeholder for ITE 8679*/
     device_add(&intel_flash_bxt_device);
 
     return ret;
diff --git a/src/machine/m_at_socket8.c b/src/machine/m_at_socket8.c
index 1442711fd..32a4ec981 100644
--- a/src/machine/m_at_socket8.c
+++ b/src/machine/m_at_socket8.c
@@ -201,7 +201,7 @@ machine_at_p2bls_init(const machine_t *model)
 
     return ret;
 }
-#if defined(DEV_BRANCH) && defined(USE_I686)
+
 int
 machine_at_borapro_init(const machine_t *model)
 {
@@ -237,7 +237,7 @@ machine_at_borapro_init(const machine_t *model)
 
     return ret;
 }
-
+#if defined(DEV_BRANCH) && defined(USE_I686)
 int
 machine_at_p6bxt_init(const machine_t *model)
 {
@@ -269,7 +269,7 @@ machine_at_p6bxt_init(const machine_t *model)
 
     return ret;
 }
-
+#endif
 
 int
 machine_at_63a_init(const machine_t *model)
@@ -305,4 +305,3 @@ machine_at_63a_init(const machine_t *model)
 
     return ret;
 }
-#endif
diff --git a/src/machine/machine.h b/src/machine/machine.h
index 5a5a52975..ed4180989 100644
--- a/src/machine/machine.h
+++ b/src/machine/machine.h
@@ -293,10 +293,11 @@ extern int	machine_at_i430vx_init(const machine_t *);
 extern int	machine_at_p55va_init(const machine_t *);
 extern int	machine_at_j656vxd_init(const machine_t *);
 
-extern int	machine_at_5tx52_init(const machine_t *);
-extern int	machine_at_txp4_init(const machine_t *);
+extern int	machine_at_p55xb2_init(const machine_t *);
+extern int	machine_at_tx97_init(const machine_t *);
 extern int	machine_at_ym430tx_init(const machine_t *);
-extern int	machine_at_sp586tx_init(const machine_t *);
+extern int	machine_at_586t2_init(const machine_t *);
+extern int	machine_at_807ds_init(const machine_t *);
 
 extern int	machine_at_mvp3_init(const machine_t *);
 
@@ -308,16 +309,13 @@ extern const device_t	*at_pb640_get_device(void);
 #if defined(DEV_BRANCH) && defined(USE_I686)
 extern int	machine_at_i440fx_init(const machine_t *);
 extern int	machine_at_s1668_init(const machine_t *);
+extern int	machine_at_p6bxt_init(const machine_t *); /*BIOS doesn't work correctly with VIA C3*/
 #endif
 
 extern int	machine_at_6abx3_init(const machine_t *);
 extern int  machine_at_p2bls_init(const machine_t *);
-#if defined(DEV_BRANCH) && defined(USE_I686)
 extern int	machine_at_borapro_init(const machine_t *);
-
-extern int	machine_at_p6bxt_init(const machine_t *);
 extern int	machine_at_63a_init(const machine_t *);
-#endif
 
 /* m_at_t3100e.c */
 extern int	machine_at_t3100e_init(const machine_t *);
diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c
index 68292d74f..9765f334c 100644
--- a/src/machine/machine_table.c
+++ b/src/machine/machine_table.c
@@ -135,116 +135,125 @@ const machine_t machines[] = {
     { "[386SX ISA] Amstrad MegaPC",		"megapc",		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO | MACHINE_HDC,				  1,   32,   1, 127,	      machine_at_wd76c10_init, NULL			},
     { "[386SX ISA] Commodore SL386SX",		"cbm_sl386sx25",	{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO | MACHINE_HDC,				1024, 8192, 512, 127,	machine_at_commodore_sl386sx_init, at_commodore_sl386sx_get_device	},  
     { "[386SX ISA] DTK 386SX clone",		"dtk386",		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,								512, 8192, 128, 127,		 machine_at_neat_init, NULL			},
-    { "[386SX ISA] IBM PS/1 model 2121",	"ibmps1_2121",		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO | MACHINE_VIDEO_FIXED,		  1,    6,   1,  63,	       machine_ps1_m2121_init, NULL			},
-    { "[386SX ISA] IBM PS/1 m.2121+ISA",	"ibmps1_2121_isa",	{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO,				  1,    6,   1,  63,	       machine_ps1_m2121_init, NULL			},
+    { "[386SX ISA] IBM PS/1 model 2121",	"ibmps1_2121",		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO | MACHINE_VIDEO_FIXED,		  2,    6,   1,  63,	       machine_ps1_m2121_init, NULL			},
+    { "[386SX ISA] IBM PS/1 m.2121+ISA",	"ibmps1_2121_isa",	{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO,				  2,    6,   1,  63,	       machine_ps1_m2121_init, NULL			},
     { "[386SX ISA] KMX-C-02",			"kmxc02",		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,										512,16384, 512, 127,	       machine_at_kmxc02_init, NULL			},
 
     { "[386SX ISA] Goldstar 386",		"goldstar386",		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,								512, 8192, 128, 127,	  machine_at_goldstar386_init, NULL			},
-    { "[386SX ISA] Micronics 09-00021",		"micronics386",		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,								512, 8192, 128, 127,	 machine_at_micronics386_init, NULL			},
 
     { "[386SX MCA] IBM PS/2 model 55SX",	"ibmps2_m55sx",		{{"Intel", cpus_i386SX},      {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM",cpus_IBM486SLC},{"",    NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO,						  1,    8,   1,  63,	  machine_ps2_model_55sx_init, NULL			},
 
-    { "[386DX ISA] ECS 386/32",			"ecs386",		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}},MACHINE_ISA | MACHINE_AT,										512,16384, 512, 127,	       machine_at_ecs386_init, NULL			},		
-    { "[386DX ISA] Dataexpert SX495 (386DX)",	"ami386dx",		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	  machine_at_opti495_ami_init, NULL			},
-    { "[386DX ISA] Award 386DX clone",		"award386dx",		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	      machine_at_opti495_init, NULL			},
-#if defined(DEV_BRANCH) && defined(USE_MR495)
-    { "[386DX ISA] MR 386DX clone",		"mr386dx",		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	   machine_at_opti495_mr_init, NULL			},
-#endif
     { "[386DX ISA] Compaq Portable III (386)",  "portableiii386",       {{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO,			  			  1,   14,   1, 127,   machine_at_portableiii386_init, at_cpqiii_get_device	},
+    { "[386DX ISA] ECS 386/32",			"ecs386",		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT,										512,16384, 512, 127,	       machine_at_ecs386_init, NULL			},		
+    { "[386DX ISA] Micronics 386 clone",	"micronics386",		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC,								512, 8192, 128, 127,	 machine_at_micronics386_init, NULL			},
+
+    { "[386DX VLB] Award 386DX clone",		"award386dx",		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	      machine_at_opti495_init, NULL			},
+    { "[386DX VLB] Dataexpert SX495 (386DX)",	"ami386dx",		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	  machine_at_opti495_ami_init, NULL			},
+#if defined(DEV_BRANCH) && defined(USE_MR495)
+    { "[386DX VLB] MR 386DX clone",		"mr386dx",		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	   machine_at_opti495_mr_init, NULL			},
+#endif
 
     { "[386DX MCA] IBM PS/2 model 70 (type 3)",	"ibmps2_m70_type3",	{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"IBM",cpus_IBM486BL},{"",     NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO,						  2,   16,   2,  63,  machine_ps2_model_70_type3_init, NULL			},
     { "[386DX MCA] IBM PS/2 model 80",		"ibmps2_m80",		{{"Intel", cpus_i386DX},      {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"IBM",cpus_IBM486BL},{"",     NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO,						  1,   12,   1,  63,	    machine_ps2_model_80_init, NULL			},
 
-    { "[486 ISA] Dataexpert SX495 (486)",	"ami486",		{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	  machine_at_opti495_ami_init, NULL			},
-    { "[486 ISA] Olystar LIL1429",		"ali1429",		{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	      machine_at_ali1429_init, NULL			},
-    { "[486 ISA] AMI SiS 471",			"ami471",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   64,   1, 127,	       machine_at_ami471_init, NULL			},
-    { "[486 ISA] AMI WinBIOS 486",		"win486",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	  machine_at_winbios1429_init, NULL			},
-    { "[486 ISA] AMI WinBIOS SiS 471",		"win471",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   64,   1, 127,	       machine_at_win471_init, NULL			},
-    { "[486 ISA] Award 486 clone",		"award486",		{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	      machine_at_opti495_init, NULL			},
-    { "[486 ISA] DTK PKM-0038S E-2",		"dtk486",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   64,   1, 127,	       machine_at_dtk486_init, NULL			},
+    { "[486 ISA] Packard Bell PB410A",		"pb410a",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO,			  	  4,   36,   1, 127,	       machine_at_pb410a_init, NULL			},    
+
+    { "[486 VLB] Award 486 clone",		"award486",		{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	      machine_at_opti495_init, NULL			},    
+    { "[486 VLB] Dataexpert SX495 (486)",	"ami486",		{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	  machine_at_opti495_ami_init, NULL			},
+    { "[486 VLB] Olystar LIL1429",		"ali1429",		{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	      machine_at_ali1429_init, NULL			},
 #if defined(DEV_BRANCH) && defined(USE_PS1M2133)
-    { "[486 ISA] IBM PS/1 model 2133",		"ibmps1_2133",		{{"Intel", cpus_i486S1},    {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_NONMI,			  1,   64,   1, 127,	       machine_ps1_m2133_init, NULL			},
+    { "[486 VLB] IBM PS/1 model 2133",		"ibmps1_2133",		{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_NONMI,			  1,   64,   1, 127,	       machine_ps1_m2133_init, NULL			},
 #endif
+    { "[486 VLB] AMI SiS 471",			"ami471",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   64,   1, 127,	       machine_at_ami471_init, NULL			},
+    { "[486 VLB] AMI WinBIOS 486",		"win486",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	  machine_at_winbios1429_init, NULL			},
+    { "[486 VLB] AMI WinBIOS SiS 471",		"win471",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   64,   1, 127,	       machine_at_win471_init, NULL			},
+    { "[486 VLB] DTK PKM-0038S E-2",		"dtk486",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   64,   1, 127,	       machine_at_dtk486_init, NULL			},
+
 #if defined(DEV_BRANCH) && defined(USE_MR495)
-    { "[486 ISA] MR 486 clone",			"mr486",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	   machine_at_opti495_mr_init, NULL			},
+    { "[486 VLB] MR 486 clone",			"mr486",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,   32,   1, 127,	   machine_at_opti495_mr_init, NULL			},
 #endif
-    { "[486 ISA] Packard Bell PB410A",		"pb410a",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO,			  1,   64,   1, 127,	       machine_at_pb410a_init, NULL			},
-    { "[486 ISA] Phoenix SiS 471",		"px471",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,  128,   1, 127,	        machine_at_px471_init, NULL			},
+    { "[486 VLB] Phoenix SiS 471",		"px471",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,						  1,  128,   1, 127,	        machine_at_px471_init, NULL			},
 
 #if defined(DEV_BRANCH) && defined(USE_PS2M70T4)
     { "[486 MCA] IBM PS/2 model 70 (type 4)",	"ibmps2_m70_type4",	{{"Intel", cpus_i486S1},      {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"",      NULL},     {"",      NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO,						  2,   16,   2,  63,  machine_ps2_model_70_type4_init, NULL			},
 #endif
 
-    { "[486 PCI] Intel Classic/PCI",		"alfredo",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  2,  128,   2, 127,	      machine_at_alfredo_init, NULL			},
-    { "[486 PCI] Lucky Star LS-486E",		"ls486e",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,					  1,  255,   1, 127,	       machine_at_ls486e_init, NULL			},
-    { "[486 PCI] Rise Computer R418",		"r418",			{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,					  1,  255,   1, 127,		 machine_at_r418_init, NULL			},
-    { "[486 PCI] Zida 4DPS",			"4dps",			{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,					  1,  255,   1, 127,		 machine_at_4dps_init, NULL			},
-    { "[486 PCI] ASUS P/I-486SP3G",		"486sp3g",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,					  1,  255,   1, 127,	      machine_at_486sp3g_init, NULL			},
+    { "[486 PCI] Intel Classic/PCI",		"alfredo",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  		  2,  128,   2, 127,	      machine_at_alfredo_init, NULL			},
+    { "[486 PCI] Lucky Star LS-486E",		"ls486e",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC,						  1,  128,   1, 127,	       machine_at_ls486e_init, NULL			},
+    { "[486 PCI] Rise Computer R418",		"r418",			{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC,						  1,  255,   1, 127,		 machine_at_r418_init, NULL			},
+    { "[486 PCI] ASUS PCI/I-486SP3G",		"486sp3g",		{{"Intel", cpus_i486},        {"AMD", cpus_Am486},   {"Cyrix", cpus_Cx486},  {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC,						  1,  128,   1, 127,	      machine_at_486sp3g_init, NULL			},
 
-    { "[Socket 4 LX] Intel Premiere/PCI",	"revenge",		{{"Intel", cpus_Pentium5V},   {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  2,  128,   2, 127,	       machine_at_batman_init, NULL			},
-    { "[Socket 4 LX] IBM Ambra DP60 PCI",	"ambradp60",		{{"Intel", cpus_Pentium5V},   {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  2,  128,   2, 127,	    machine_at_ambradp60_init, NULL			},
+    { "[Socket 4 LX] IBM Ambra DP60 PCI",	"ambradp60",		{{"Intel", cpus_Pentium5V},   {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  2,  128,   2, 127,	    machine_at_ambradp60_init, NULL			},
 #if defined(DEV_BRANCH) && defined(USE_VPP60)
-    { "[Socket 4 LX] IBM PS/ValuePoint P60",	"valuepointp60",	{{"Intel", cpus_Pentium5V},   {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  2,  128,   2, 127,	machine_at_valuepointp60_init, NULL			},
+    { "[Socket 4 LX] IBM PS/ValuePoint P60",	"valuepointp60",	{{"Intel", cpus_Pentium5V},   {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  2,  128,   2, 127,	machine_at_valuepointp60_init, NULL			},
 #endif
-    { "[Socket 4 LX] Micro Star 586MC1",	"586mc1",		{{"Intel", cpus_Pentium5V},   {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  2,  128,   2, 127,	       machine_at_586mc1_init, NULL			},
+    { "[Socket 4 LX] Intel Premiere/PCI",	"revenge",		{{"Intel", cpus_Pentium5V},   {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  2,  128,   2, 127,	       machine_at_batman_init, NULL			},
+    { "[Socket 4 LX] Micro Star 586MC1",	"586mc1",		{{"Intel", cpus_Pentium5V},   {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  2,  128,   2, 127,	       machine_at_586mc1_init, NULL			},
 
-    { "[Socket 5 NX] Intel Premiere/PCI II",	"plato",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  2,  128,   2, 127,		machine_at_plato_init, NULL			},
-    { "[Socket 5 NX] IBM Ambra DP90 PCI",	"ambradp90",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  2,  128,   2, 127,	    machine_at_ambradp90_init, NULL			},
-    { "[Socket 5 NX] Gigabyte GA-586IP",	"430nx",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  2,  128,   2, 127,		machine_at_430nx_init, NULL			},
+    { "[Socket 5 NX] Intel Premiere/PCI II",	"plato",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  2,  128,   2, 127,		machine_at_plato_init, NULL			},
+    { "[Socket 5 NX] IBM Ambra DP90 PCI",	"ambradp90",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  2,  128,   2, 127,	    machine_at_ambradp90_init, NULL			},
+    { "[Socket 5 NX] Gigabyte GA-586IP",	"430nx",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  2,  128,   2, 127,		machine_at_430nx_init, NULL			},
 
-    { "[Socket 5 FX] ASUS P/I-P54TP4XE",	"p54tp4xe",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,					  8,  128,   8, 127,	     machine_at_p54tp4xe_init, NULL			},
+    { "[Socket 5 FX] ASUS P/I-P54TP4XE",	"p54tp4xe",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC,						  8,  128,   8, 127,	     machine_at_p54tp4xe_init, NULL			},
 #if defined(DEV_BRANCH) && defined(USE_VECTRA54)
-    { "[Socket 5 FX] HP Vectra VL 5 Series 4",  "vectra54",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,					  8,  128,   8, 255,	     machine_at_vectra54_init, NULL			},
+    { "[Socket 5 FX] HP Vectra VL 5 Series 4",  "vectra54",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC,						  8,  128,   8, 767,	     machine_at_vectra54_init, NULL			},
 #endif
-    { "[Socket 5 FX] Intel Advanced/ZP",	"zappa",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  128,   8, 127,		machine_at_zappa_init, NULL			},
-    { "[Socket 5 FX] PC Partner MB500N",	"mb500n",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,					  8,  128,   8, 127,	       machine_at_mb500n_init, NULL			},
-    { "[Socket 5 FX] President Award 430FX PCI","president",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC,					  8,  128,   8, 127,	    machine_at_president_init, NULL			},
+    { "[Socket 5 FX] Intel Advanced/ZP",	"zappa",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  128,   8, 127,		machine_at_zappa_init, NULL			},
+    { "[Socket 5 FX] PC Partner MB500N",	"mb500n",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC,						  8,  128,   8, 127,	       machine_at_mb500n_init, NULL			},
+    { "[Socket 5 FX] President Award 430FX PCI","president",		MACHINE_CPUS_PENTIUM_S5,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC,						  8,  128,   8, 127,	    machine_at_president_init, NULL			},
 
-    { "[Socket 7 FX] Intel Advanced/ATX",	"thor",			MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  128,   8, 127,		 machine_at_thor_init, NULL			},
+    { "[Socket 7-3V FX] Intel Advanced/ATX",	"thor",			MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  128,   8, 127,		 machine_at_thor_init, NULL			},
 #if defined(DEV_BRANCH) && defined(USE_MRTHOR)
-    { "[Socket 7 FX] MR Intel Advanced/ATX",	"mrthor",		MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  128,   8, 127,	       machine_at_mrthor_init, NULL			},
+    { "[Socket 7-3V FX] MR Intel Advanced/ATX",	"mrthor",		MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  8,  128,   8, 127,	       machine_at_mrthor_init, NULL			},
 #endif
-    { "[Socket 7 FX] Intel Advanced/EV",	"endeavor",		MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO,	  8,  128,   8, 127,	     machine_at_endeavor_init, at_endeavor_get_device	},
-    { "[Socket 7 FX] Packard Bell PB640",	"pb640",		MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO,	  8,  128,   8, 127,		machine_at_pb640_init, at_pb640_get_device	},
+    { "[Socket 7-3V FX] Intel Advanced/EV",	"endeavor",		MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO,			  8,  128,   8, 127,	     machine_at_endeavor_init, at_endeavor_get_device	},
+    { "[Socket 7-3V FX] Packard Bell PB640",	"pb640",		MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO,	 		  8,  128,   8, 127,		machine_at_pb640_init, at_pb640_get_device	},
 
-    { "[Socket 7 HX] Acer M3a",			"acerm3a",		MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  192,   8, 127,	      machine_at_acerm3a_init, NULL			},
-    { "[Socket 7 HX] Acer V35n",		"acerv35n",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  192,   8, 127,	     machine_at_acerv35n_init, NULL			},
-    { "[Socket 7 HX] AOpen AP53",		"ap53",			MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  512,   8, 127,		 machine_at_ap53_init, NULL			},
-    { "[Socket 7 HX] ASUS P/I-P55T2P4",		"p55t2p4",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  256,   8, 127,	      machine_at_p55t2p4_init, NULL			},
-    { "[Socket 7 HX] SuperMicro Super P55T2S",	"p55t2s",		MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  768,   8, 127,	       machine_at_p55t2s_init, NULL			},
+    { "[Socket 7-3V HX] Acer M3a",		"acerm3a",		MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  192,   8, 127,	      machine_at_acerm3a_init, NULL			},
+    { "[Socket 7-3V HX] AOpen AP53",		"ap53",			MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  8,  512,   8, 127,		 machine_at_ap53_init, NULL			},    
+    { "[Socket 7-3V HX] SuperMicro Super P55T2S","p55t2s",		MACHINE_CPUS_PENTIUM_S73V,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  768,   8, 127,	       machine_at_p55t2s_init, NULL			},
+
+    { "[Socket 7 HX] Acer V35n",		"acerv35n",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  192,   8, 127,	     machine_at_acerv35n_init, NULL			},
+    { "[Socket 7 HX] ASUS P/I-P55T2P4",		"p55t2p4",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  256,   8, 127,	      machine_at_p55t2p4_init, NULL			},
 #if defined(DEV_BRANCH) && defined(USE_TC430HX)
-    { "[Socket 7 HX] TC430HX",			"tc430hx",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  128,   8, 255,	      machine_at_tc430hx_init, NULL			},
-    { "[Socket 7 HX] Toshiba Equium 5200D",	"equium5200",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  128,   8, 127,	   machine_at_equium5200_init, NULL			},
+    { "[Socket 7 HX] TC430HX",			"tc430hx",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  		  8,  128,   8, 255,	      machine_at_tc430hx_init, NULL			},
+    { "[Socket 7 HX] Toshiba Equium 5200D",	"equium5200",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  		  8,  128,   8, 127,	   machine_at_equium5200_init, NULL			},
 #endif
 
-    { "[Socket 7 VX] ASUS P/I-P55TVP4",		"p55tvp4",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  128,   8, 127,	      machine_at_p55tvp4_init, NULL			},
-    { "[Socket 7 VX] Epox P55-VA",		"p55va",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  128,   8, 127,		machine_at_p55va_init, NULL			},
-    { "[Socket 7 VX] Jetway J656VXD",		"j656vxd",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  128,   8, 127,	      machine_at_j656vxd_init, NULL			},
-    { "[Socket 7 VX] Shuttle HOT-557",		"430vx",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  128,   8, 127,	       machine_at_i430vx_init, NULL			},
+    { "[Socket 7 VX] ASUS P/I-P55TVP4",		"p55tvp4",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  8,  128,   8, 127,	      machine_at_p55tvp4_init, NULL			},
+    { "[Socket 7 VX] Epox P55-VA",		"p55va",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  		  8,  128,   8, 127,		machine_at_p55va_init, NULL			},
+    { "[Socket 7 VX] Jetway J656VXD",		"j656vxd",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  		  8,  128,   8, 127,	      machine_at_j656vxd_init, NULL			},
+    { "[Socket 7 VX] Shuttle HOT-557",		"430vx",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  128,   8, 127,	       machine_at_i430vx_init, NULL			},
 
-    { "[Socket 7 TX] Acorp 5TX52",		"5tx52",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  256,   8, 255,	        machine_at_5tx52_init, NULL			},
-    { "[Socket 7 TX] ASUS TXP4",		"txp4",			MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  256,   8, 255,	         machine_at_txp4_init, NULL			},
-    { "[Socket 7 TX] Intel YM430TX",		"ym430tx",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  256,   8, 255,	      machine_at_ym430tx_init, NULL			},
-    { "[Socket 7 TX] San-LI/Superpower SP-586TX","sp586tx",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  256,   8, 255,	      machine_at_sp586tx_init, NULL			},
-
-    { "[Super Socket 7] FIC VA-503+",		"ficva503p",		MACHINE_CPUS_PENTIUM_SS7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  512,   8, 255,	         machine_at_mvp3_init, NULL			},
+    { "[Socket 7 TX] ASUS TX97",		"txp4",			MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  256,   8, 255,	         machine_at_tx97_init, NULL			},
+    { "[Socket 7 TX] Gigabyte GA-586T2",        "586t2",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  256,   8, 255,	        machine_at_586t2_init, NULL			},
+    { "[Socket 7 TX] Intel YM430TX",		"ym430tx",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  256,   8, 255,	      machine_at_ym430tx_init, NULL			},
+    { "[Socket 7 TX] Iwill P55XB2",		"p55xb2",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  256,   8, 255,	       machine_at_p55xb2_init, NULL			},
+    { "[Socket 7 TX] PC Partner TXA807DS",	"807ds",		MACHINE_CPUS_PENTIUM_S7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  256,   8, 255,	        machine_at_807ds_init, NULL			},
+    
+    { "[Super 7 MVP3] FIC VA-503+",		"ficva503p",		MACHINE_CPUS_PENTIUM_SS7,											    MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  512,   8, 255,	         machine_at_mvp3_init, NULL			},
 
 #if defined(DEV_BRANCH) && defined(USE_I686)
     { "[Socket 8 FX] Tyan Titan-Pro AT",	"440fx",		{{"Intel", cpus_PentiumPro},  {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 1024,   8, 127,	       machine_at_i440fx_init, NULL			},
     { "[Socket 8 FX] Tyan Titan-Pro ATX",	"tpatx",		{{"Intel", cpus_PentiumPro},  {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 1024,   8, 127,		machine_at_s1668_init, NULL			},
 
-    { "[Slot 1 BX] Lucky Star 6ABX3",		"6abx3",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron},	 {"VIA", cpus_Cyrix3}, {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  768,   8, 255,		machine_at_6abx3_init, NULL			},
-    { "[Slot 1 BX] ASUS P2B-LS",		"p2bls",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron},	 {"VIA", cpus_Cyrix3}, {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8, 1024,   8, 255,		machine_at_p2bls_init, NULL			},
+    { "[Slot 1 BX] Lucky Star 6ABX3",		"6abx3",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron},{"VIA", cpus_Cyrix3},{"",      NULL},{"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  		  8,  768,   8, 255,		machine_at_6abx3_init, NULL			},
+    { "[Slot 1 BX] ASUS P2B-LS",		"p2bls",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron},{"VIA", cpus_Cyrix3},{"",      NULL},{"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  8, 1024,   8, 255,		machine_at_p2bls_init, NULL			},
 #else
     { "[Slot 1 BX] Lucky Star 6ABX3",		"6abx3",		{{"VIA", cpus_Cyrix3},        {"",    NULL},	     {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  768,   8, 255,		machine_at_6abx3_init, NULL			},	
     { "[Slot 1 BX] ASUS P2B-LS",		"p2bls",		{{"VIA", cpus_Cyrix3},        {"",    NULL},	     {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8, 1024,   8, 255,		machine_at_p2bls_init, NULL			},
 #endif
 #if defined(DEV_BRANCH) && defined(USE_I686)
-    { "[Slot 1 ZX] Packard Bell Bora Pro",	"borapro",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron}, {"VIA", cpus_Cyrix3},   {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			  8,  512,   8, 255,		machine_at_borapro_init, NULL			},
+    { "[Slot 1 ZX] Packard Bell Bora Pro",	"borapro",		{{"Intel", cpus_PentiumII},   {"Intel/PGA370", cpus_Celeron},{"VIA", cpus_Cyrix3},{"",      NULL},{"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  8,  512,   8, 255,	      machine_at_borapro_init, NULL			},
 
     { "[Socket 370 BX] ECS P6BXT-A+",		"p6bxt",		{{"Intel", cpus_Celeron},     {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  768,   8, 255,		machine_at_p6bxt_init, NULL			},
-    { "[Socket 370 ZX] Soltek SL-63A1",		"63a",			{{"Intel", cpus_Celeron},     {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  512,   8, 255,		machine_at_63a_init, NULL			},
+    { "[Socket 370 ZX] Soltek SL-63A1",		"63a",			{{"Intel", cpus_Celeron},     {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  512,   8, 255,		  machine_at_63a_init, NULL			},
+#else
+    { "[Slot 1 ZX] Packard Bell Bora Pro",	"borapro",		{{"VIA", cpus_Cyrix3},        {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,			 		  8,  512,   8, 255,	      machine_at_borapro_init, NULL			},
+
+    { "[Socket 370 ZX] Soltek SL-63A1",		"63a",			{{"VIA", cpus_Cyrix3},        {"",    NULL},         {"",      NULL},        {"",      NULL},     {"",      NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC,					  8,  512,   8, 255,		  machine_at_63a_init, NULL			},	
 #endif
+
     { NULL,					NULL,			{{"",      0},                {"",    0},            {"",      0},           {"",         0},     {"",      0}},    0,                                                                                                    0,    0,   0,   0,				 NULL, NULL			}
 };
 
diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c
index 96e3b00fe..5f568875b 100644
--- a/src/video/vid_s3.c
+++ b/src/video/vid_s3.c
@@ -4028,7 +4028,7 @@ const device_t s3_phoenix_vision864_pci_device =
 const device_t s3_diamond_stealth64_vlb_device =
 {
 	"S3 Trio64 (Diamond Stealth64 DRAM) VLB",
-	DEVICE_PCI,
+	DEVICE_VLB,
 	S3_DIAMOND_STEALTH64_764,
 	s3_init,
 	s3_close,

From 80356a9b8510378d506beabc816f9ba090e77bb8 Mon Sep 17 00:00:00 2001
From: Daniel Gurney <dgurney99@gmail.com>
Date: Thu, 26 Mar 2020 12:50:18 +0200
Subject: [PATCH 11/11] Nightly doesn't reflect the truth

---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index bc5246d72..7175a8f0f 100644
--- a/README.md
+++ b/README.md
@@ -52,7 +52,7 @@ guide:
 If you encounter issues at any step or have additional questions, please join
 the IRC channel or the appropriate channel on our Discord server and wait patiently for someone to help you.
 
-Nightly builds
+Automatic builds
 --------------
 For your convenience, we compile a number of 86Box builds per revision on our
 Jenkins instance.