From e3296f452964d462519868ac9db70a3188634efd Mon Sep 17 00:00:00 2001 From: OBattler Date: Thu, 23 Apr 2020 02:23:59 +0200 Subject: [PATCH] Split USB and Distributed DMA into their own files in preparation for the overhaul of the VIA southbridges. --- src/ddma.c | 200 +++++++++++++++++++++++++++++ src/include/86box/ddma.h | 56 ++++++++ src/include/86box/usb.h | 86 +++++++------ src/intel_piix.c | 253 +++---------------------------------- src/usb.c | 196 +++++++++++++++++++++++----- src/win/Makefile.mingw | 6 +- src/win/Makefile_ndr.mingw | 6 +- 7 files changed, 496 insertions(+), 307 deletions(-) create mode 100644 src/ddma.c create mode 100644 src/include/86box/ddma.h diff --git a/src/ddma.c b/src/ddma.c new file mode 100644 index 000000000..98e4da293 --- /dev/null +++ b/src/ddma.c @@ -0,0 +1,200 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Distributed DMA emulation. + * + * + * + * Authors: Miran Grca, + * + * Copyright 2020 Miran Grca. + */ +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include <86box/device.h> +#include <86box/mem.h> +#include <86box/io.h> +#include <86box/pci.h> +#include <86box/pic.h> +#include <86box/timer.h> +#include <86box/keyboard.h> +#include <86box/nvr.h> +#include <86box/pit.h> +#include <86box/dma.h> +#include <86box/ddma.h> + + +#ifdef ENABLE_DDMA_LOG +int ddma_do_log = ENABLE_DDMA_LOG; + + +static void +ddma_log(const char *fmt, ...) +{ + va_list ap; + + if (ddma_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define ddma_log(fmt, ...) +#endif + +static uint8_t +ddma_reg_read(uint16_t addr, void *p) +{ + ddma_channel_t *dev = (ddma_channel_t *) p; + uint8_t ret = 0xff; + int ch = dev->channel; + int dmab = (ch >= 4) ? 0xc0 : 0x00; + + switch (addr & 0x0f) { + case 0x00: + ret = dma[ch].ac & 0xff; + break; + case 0x01: + ret = (dma[ch].ac >> 8) & 0xff; + break; + case 0x02: + ret = dma[ch].page; + break; + case 0x04: + ret = dma[ch].cc & 0xff; + break; + case 0x05: + ret = (dma[ch].cc >> 8) & 0xff; + break; + case 0x09: + ret = inb(dmab + 0x08); + break; + } + + return ret; +} + + +static void +ddma_reg_write(uint16_t addr, uint8_t val, void *p) +{ + ddma_channel_t *dev = (ddma_channel_t *) p; + int ch = dev->channel; + int page_regs[4] = { 7, 3, 1, 2 }; + int i, dmab = (ch >= 4) ? 0xc0 : 0x00; + + switch (addr & 0x0f) { + case 0x00: + dma[ch].ab = (dma[ch].ab & 0xffff00) | val; + dma[ch].ac = dma[ch].ab; + break; + case 0x01: + dma[ch].ab = (dma[ch].ab & 0xff00ff) | (val << 8); + dma[ch].ac = dma[ch].ab; + break; + case 0x02: + if (ch >= 4) + outb(0x88 + page_regs[ch], val); + else + outb(0x80 + page_regs[ch], val); + break; + case 0x04: + dma[ch].cb = (dma[ch].cb & 0xffff00) | val; + dma[ch].cc = dma[ch].cb; + break; + case 0x05: + dma[ch].cb = (dma[ch].cb & 0xff00ff) | (val << 8); + dma[ch].cc = dma[ch].cb; + break; + case 0x08: + outb(dmab + 0x08, val); + break; + case 0x09: + outb(dmab + 0x09, val); + break; + case 0x0a: + outb(dmab + 0x0a, val); + break; + case 0x0b: + outb(dmab + 0x0b, val); + break; + case 0x0d: + outb(dmab + 0x0d, val); + break; + case 0x0e: + for (i = 0; i < 4; i++) + outb(dmab + 0x0a, i); + break; + case 0x0f: + outb(dmab + 0x0a, (val << 2) | (ch & 3)); + break; + } +} + + +void +ddma_update_io_mapping(ddma_t *dev, int ch, uint8_t base_l, uint8_t base_h, int enable) +{ + if (dev->channels[ch].enable && (dev->channels[ch].io_base != 0x0000)) + io_removehandler(dev->channels[ch].io_base, 0x10, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->channels[ch]); + + dev->channels[ch].io_base = base_l | (base_h << 8); + dev->channels[ch].enable = enable; + + if (dev->channels[ch].enable && (dev->channels[ch].io_base != 0x0000)) + io_sethandler(dev->channels[ch].io_base, 0x10, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->channels[ch]); +} + + +static void +ddma_close(void *priv) +{ + ddma_t *dev = (ddma_t *) priv; + + free(dev); +} + + +static void * +ddma_init(const device_t *info) +{ + ddma_t *dev; + int i; + + dev = (ddma_t *)malloc(sizeof(ddma_t)); + if (dev == NULL) return(NULL); + memset(dev, 0x00, sizeof(ddma_t)); + + for (i = 0; i < 8; i++) + dev->channels[i].channel = i; + + return dev; +} + + +const device_t ddma_device = +{ + "Distributed DMA", + DEVICE_PCI, + 0, + ddma_init, + ddma_close, + NULL, + NULL, + NULL, + NULL, + NULL +}; diff --git a/src/include/86box/ddma.h b/src/include/86box/ddma.h new file mode 100644 index 000000000..2d0a9f8d9 --- /dev/null +++ b/src/include/86box/ddma.h @@ -0,0 +1,56 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the ISA Bus (de)Bugger expansion card + * sold as a DIY kit in the late 1980's in The Netherlands. + * This card was a assemble-yourself 8bit ISA addon card for + * PC and AT systems that had several tools to aid in low- + * level debugging (mostly for faulty BIOSes, bootloaders + * and system kernels...) + * + * Definitions for the Distributed DMA emulation. + * + * + * + * Authors: Miran Grca, + * + * Copyright 2020 Miran Grca. + */ +#ifndef DDMA_H +# define DDMA_H + + +#ifdef __cplusplus +extern "C" { +#endif + +typedef struct +{ + uint16_t io_base; + int channel, enable; +} ddma_channel_t; + +typedef struct +{ + ddma_channel_t channels[8]; +} ddma_t; + + +/* Global variables. */ +extern const device_t ddma_device; + + +/* Functions. */ +extern void ddma_update_io_mapping(ddma_t *dev, int ch, uint8_t base_l, uint8_t base_h, int enable); + +#ifdef __cplusplus +} +#endif + + +#endif /*DDMA_H*/ diff --git a/src/include/86box/usb.h b/src/include/86box/usb.h index 69adcf96b..b027796a2 100644 --- a/src/include/86box/usb.h +++ b/src/include/86box/usb.h @@ -1,41 +1,55 @@ -/* Copyright holders: Melissa Goad - see COPYING for more details -*/ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the ISA Bus (de)Bugger expansion card + * sold as a DIY kit in the late 1980's in The Netherlands. + * This card was a assemble-yourself 8bit ISA addon card for + * PC and AT systems that had several tools to aid in low- + * level debugging (mostly for faulty BIOSes, bootloaders + * and system kernels...) + * + * Definitions for the Distributed DMA emulation. + * + * + * + * Authors: Miran Grca, + * + * Copyright 2020 Miran Grca. + */ +#ifndef USB_H +# define USB_H + + +#ifdef __cplusplus +extern "C" { +#endif typedef struct { - uint8_t pid; //low 4 bits are the real pid, top 4 bits are just ~pid - uint8_t dev_addr; - uint8_t dev_endpoint; - int crc5; - uint16_t crc16; - uint8_t data[1024]; - int len; - void* device; -} usb_packet_t; + uint8_t ohci_mmio[4096]; + uint16_t uhci_io_base; + int uhci_enable, ohci_enable; + uint32_t ohci_mem_base; + mem_mapping_t ohci_mmio_mapping; +} usb_t; -typedef enum -{ - USB_DEV_TYPE_NONE = 0, - USB_DEV_TYPE_MOUSE, - USB_DEV_TYPE_TABLET, - USB_DEV_TYPE_KEYPAD, - USB_DEV_TYPE_DISK, - USB_DEV_TYPE_CDROM, - USB_DEV_TYPE_HUB, - USB_DEV_TYPE_PRINTER -} usb_device_type_t; -typedef enum -{ - USB_PID_TOKEN_STALL = 0x1e, - USB_PID_TOKEN_SETUP = 0x2d, - USB_PID_TOKEN_PRE = 0x3c, - USB_PID_TOKEN_DATA1 = 0x4b, - USB_PID_TOKEN_NAK = 0x5a, - USB_PID_TOKEN_IN = 0x69, - USB_PID_TOKEN_SOF = 0xa5, - USB_PID_TOKEN_DATA0 = 0xc3, - USB_PID_TOKEN_ACK = 0xd2, - USB_PID_TOKEN_OUT = 0xe1 -} usb_pid_type_t; \ No newline at end of file +/* Global variables. */ +extern const device_t usb_device; + + +/* Functions. */ +extern void uhci_update_io_mapping(usb_t *dev, uint8_t base_l, uint8_t base_h, int enable); +extern void ohci_update_mem_mapping(usb_t *dev, uint8_t base1, uint8_t base2, uint8_t base3, int enable); + +#ifdef __cplusplus +} +#endif + + +#endif /*USB_H*/ diff --git a/src/intel_piix.c b/src/intel_piix.c index 8e83e0f0e..33061c4dd 100644 --- a/src/intel_piix.c +++ b/src/intel_piix.c @@ -40,6 +40,7 @@ #include <86box/timer.h> #include <86box/nvr.h> #include <86box/acpi.h> +#include <86box/ddma.h> #include <86box/pci.h> #include <86box/pic.h> #include <86box/pit.h> @@ -47,19 +48,13 @@ #include <86box/hdc.h> #include <86box/hdc_ide.h> #include <86box/hdc_ide_sff8038i.h> +#include <86box/usb.h> #include <86box/zip.h> #include <86box/machine.h> #include <86box/smbus_piix4.h> #include <86box/piix.h> -typedef struct -{ - uint16_t io_base; - int base_channel; -} ddma_t; - - typedef struct { uint8_t cur_readout_reg, rev, @@ -68,15 +63,14 @@ typedef struct regs[4][256], readout_regs[256], board_config[2]; uint16_t func0_id, nvr_io_base, - usb_io_base, acpi_io_base; + acpi_io_base; double fast_off_period; - uint8_t *usb_smsc_mmio; - mem_mapping_t usb_smsc_mmio_mapping; sff8038i_t *bm[2]; - ddma_t ddma[2]; smbus_piix4_t * smbus; apm_t * apm; nvr_t * nvr; + ddma_t * ddma; + usb_t * usb; acpi_t * acpi; port_92_t * port_92; pc_timer_t fast_off_timer; @@ -246,200 +240,6 @@ kbc_alias_update_io_mapping(piix_t *dev) } -static uint8_t -ddma_reg_read(uint16_t addr, void *p) -{ - ddma_t *dev = (ddma_t *) p; - uint8_t ret = 0xff; - int rel_ch = (addr & 0x30) >> 4; - int ch = dev->base_channel + rel_ch; - int dmab = (ch >= 4) ? 0xc0 : 0x00; - - switch (addr & 0x0f) { - case 0x00: - ret = dma[ch].ac & 0xff; - break; - case 0x01: - ret = (dma[ch].ac >> 8) & 0xff; - break; - case 0x02: - ret = dma[ch].page; - break; - case 0x04: - ret = dma[ch].cc & 0xff; - break; - case 0x05: - ret = (dma[ch].cc >> 8) & 0xff; - break; - case 0x09: - ret = inb(dmab + 0x08); - break; - } - - return ret; -} - - -static void -ddma_reg_write(uint16_t addr, uint8_t val, void *p) -{ - ddma_t *dev = (ddma_t *) p; - int rel_ch = (addr & 0x30) >> 4; - int ch = dev->base_channel + rel_ch; - int page_regs[4] = { 7, 3, 1, 2 }; - int i, dmab = (ch >= 4) ? 0xc0 : 0x00; - - switch (addr & 0x0f) { - case 0x00: - dma[ch].ab = (dma[ch].ab & 0xffff00) | val; - dma[ch].ac = dma[ch].ab; - break; - case 0x01: - dma[ch].ab = (dma[ch].ab & 0xff00ff) | (val << 8); - dma[ch].ac = dma[ch].ab; - break; - case 0x02: - if (ch >= 4) - outb(0x88 + page_regs[rel_ch], val); - else - outb(0x80 + page_regs[rel_ch], val); - break; - case 0x04: - dma[ch].cb = (dma[ch].cb & 0xffff00) | val; - dma[ch].cc = dma[ch].cb; - break; - case 0x05: - dma[ch].cb = (dma[ch].cb & 0xff00ff) | (val << 8); - dma[ch].cc = dma[ch].cb; - break; - case 0x08: - outb(dmab + 0x08, val); - break; - case 0x09: - outb(dmab + 0x09, val); - break; - case 0x0a: - outb(dmab + 0x0a, val); - break; - case 0x0b: - outb(dmab + 0x0b, val); - break; - case 0x0d: - outb(dmab + 0x0d, val); - break; - case 0x0e: - for (i = 0; i < 4; i++) - outb(dmab + 0x0a, i); - break; - case 0x0f: - outb(dmab + 0x0a, (val << 2) | rel_ch); - break; - } -} - - -static void -ddma_update_io_mapping(piix_t *dev, int n) -{ - int base_reg = 0x92 + (n << 1); - - if (dev->ddma[n].io_base != 0x0000) - io_removehandler(dev->ddma[n].io_base, 0x40, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->ddma[n]); - - dev->ddma[n].io_base = (dev->regs[0][base_reg] & ~0x3f) | (dev->regs[0][base_reg + 1] << 8); - - if (dev->ddma[n].io_base != 0x0000) - io_sethandler(dev->ddma[n].io_base, 0x40, ddma_reg_read, NULL, NULL, ddma_reg_write, NULL, NULL, &dev->ddma[n]); -} - - -static uint8_t -usb_reg_read(uint16_t addr, void *p) -{ - uint8_t ret = 0xff; - - switch (addr & 0x1f) { - case 0x10: case 0x11: case 0x12: case 0x13: - /* Port status */ - ret = 0x00; - break; - } - - return ret; -} - - -static void -usb_reg_write(uint16_t addr, uint8_t val, void *p) -{ -} - - -static void -usb_update_io_mapping(piix_t *dev) -{ - if (dev->usb_io_base != 0x0000) - io_removehandler(dev->usb_io_base, 0x20, usb_reg_read, NULL, NULL, usb_reg_write, NULL, NULL, dev); - - dev->usb_io_base = (dev->regs[2][0x20] & ~0x1f) | (dev->regs[2][0x21] << 8); - - if ((dev->regs[2][PCI_REG_COMMAND] & PCI_COMMAND_IO) && (dev->usb_io_base != 0x0000)) - io_sethandler(dev->usb_io_base, 0x20, usb_reg_read, NULL, NULL, usb_reg_write, NULL, NULL, dev); -} - - -static void -usb_smsc_update_mem_mapping(piix_t *dev) -{ - uint32_t usb_bar; - - mem_mapping_disable(&dev->usb_smsc_mmio_mapping); - - usb_bar = ((dev->regs[2][0x11] << 8) | (dev->regs[2][0x12] << 16) | (dev->regs[2][0x13] << 24)) & 0xfffff000; - - if ((dev->regs[2][0x04] & 0x02) && (usb_bar != 0x00000000)) - mem_mapping_set_addr(&dev->usb_smsc_mmio_mapping, usb_bar, 0x1000); -} - - -static uint8_t -usb_smsc_mmio_read(uint32_t addr, void *p) -{ - piix_t *dev = (piix_t *) p; - uint8_t ret = 0x00; - - addr &= 0x00000fff; - - ret = dev->usb_smsc_mmio[addr]; - - return ret; -} - - -static void -usb_smsc_mmio_write(uint32_t addr, uint8_t val, void *p) -{ - piix_t *dev = (piix_t *) p; - - addr &= 0x00000fff; - - switch (addr) { - case 0x08: /* HCCOMMANDSTATUS */ - /* bit HostControllerReset must be cleared for the controller to be seen as initialized */ - val &= ~0x01; - - /* bit OwnershipChangeRequest triggers an ownership change (SMM <-> OS) */ - if (val & 0x0f) { - dev->usb_smsc_mmio[0x0f] = 0x40; - dev->usb_smsc_mmio[0x05] &= ~(dev->usb_smsc_mmio[0x05] & 0x01); - } - break; - } - - dev->usb_smsc_mmio[addr] = val; -} - - static void smbus_update_io_mapping(piix_t *dev) { @@ -480,6 +280,7 @@ piix_write(int func, int addr, uint8_t val, void *priv) { piix_t *dev = (piix_t *) priv; uint8_t *fregs; + int i; /* Return on unsupported function. */ if (dev->max_func > 0) { @@ -643,10 +444,12 @@ piix_write(int func, int addr, uint8_t val, void *priv) case 0x92: case 0x93: case 0x94: case 0x95: if (dev->type > 3) { if (addr & 0x01) - fregs[addr] = val & 0xc0; - else fregs[addr] = val & 0xff; - ddma_update_io_mapping(dev, (addr >> 2) & 1); + else + fregs[addr] = val & 0xc0; + + for (i = 0; i < 4; i++) + ddma_update_io_mapping(dev->ddma, (addr & 4) + i, fregs[addr & 0xfe] + (i << 4), fregs[addr | 0x01], 1); } break; case 0xa0: @@ -886,10 +689,10 @@ piix_write(int func, int addr, uint8_t val, void *priv) case 0x04: if (dev->type > 4) { fregs[0x04] = (val & 7); - usb_smsc_update_mem_mapping(dev); + ohci_update_mem_mapping(dev->usb, fregs[0x11], fregs[0x12], fregs[0x13], fregs[PCI_REG_COMMAND] & PCI_COMMAND_MEM); } else { fregs[0x04] = (val & 5); - usb_update_io_mapping(dev); + uhci_update_io_mapping(dev->usb, fregs[0x20] & ~0x1f, fregs[0x21], fregs[PCI_REG_COMMAND] & PCI_COMMAND_IO); } break; case 0x07: @@ -917,25 +720,25 @@ piix_write(int func, int addr, uint8_t val, void *priv) case 0x11: if (dev->type > 4) { fregs[addr] = val & 0xf0; - usb_smsc_update_mem_mapping(dev); + ohci_update_mem_mapping(dev->usb, fregs[0x11], fregs[0x12], fregs[0x13], fregs[PCI_REG_COMMAND] & PCI_COMMAND_MEM); } break; case 0x12: case 0x13: if (dev->type > 4) { fregs[addr] = val; - usb_smsc_update_mem_mapping(dev); + ohci_update_mem_mapping(dev->usb, fregs[0x11], fregs[0x12], fregs[0x13], fregs[PCI_REG_COMMAND] & PCI_COMMAND_MEM); } break; case 0x20: if (dev->type < 5) { fregs[0x20] = (val & 0xe0) | 1; - usb_update_io_mapping(dev); + uhci_update_io_mapping(dev->usb, fregs[0x20] & ~0x1f, fregs[0x21], fregs[PCI_REG_COMMAND] & PCI_COMMAND_IO); } break; case 0x21: if (dev->type < 5) { fregs[0x21] = val; - usb_update_io_mapping(dev); + uhci_update_io_mapping(dev->usb, fregs[0x20] & ~0x1f, fregs[0x21], fregs[PCI_REG_COMMAND] & PCI_COMMAND_IO); } break; case 0x3c: @@ -1263,14 +1066,6 @@ piix_reset_hard(piix_t *dev) fregs[0xff] = (dev->type > 3) ? 0x10 : 0x00; } dev->max_func = 1; /* It starts with USB disabled, then enables it. */ - - /* SMSC OHCI memory-mapped registers */ - if (dev->usb_smsc_mmio) { - memset(dev->usb_smsc_mmio, 0, 4096); - dev->usb_smsc_mmio[0x00] = 0x10; - dev->usb_smsc_mmio[0x01] = 0x01; - dev->usb_smsc_mmio[0x48] = 0x02; - } } /* Function 3: Power Management */ @@ -1394,20 +1189,12 @@ static void dev->acpi = device_add(&acpi_device); acpi_set_slot(dev->acpi, dev->pci_slot); acpi_set_nvr(dev->acpi, dev->nvr); + + dev->ddma = device_add(&ddma_device); + dev->usb = device_add(&usb_device); } else timer_add(&dev->fast_off_timer, piix_fast_off_count, dev, 0); - if (dev->type > 4) { - dev->usb_smsc_mmio = (uint8_t *) malloc(4096); - memset(dev->usb_smsc_mmio, 0x00, 4096); - - mem_mapping_add(&dev->usb_smsc_mmio_mapping, 0, 0, - usb_smsc_mmio_read, NULL, NULL, - usb_smsc_mmio_write, NULL, NULL, - NULL, MEM_MAPPING_EXTERNAL, dev); - mem_mapping_disable(&dev->usb_smsc_mmio_mapping); - } - piix_reset_hard(dev); piix_log("Maximum function: %i\n", dev->max_func); cpu_fast_off_flags = 0x00000000; diff --git a/src/usb.c b/src/usb.c index 721289afb..9b04c0383 100644 --- a/src/usb.c +++ b/src/usb.c @@ -1,53 +1,185 @@ -/* Copyright holders: Melissa Goad - see COPYING for more details -*/ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Universal Serial Bus emulation (currently dummy UHCI and + * OHCI). + * + * + * + * Authors: Miran Grca, + * + * Copyright 2020 Miran Grca. + */ +#include #include #include +#include #include #include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include <86box/device.h> #include <86box/io.h> #include <86box/mem.h> #include <86box/usb.h> -void *usb_priv[32]; -static int usb_min_card, usb_max_card; +#ifdef ENABLE_USB_LOG +int usb_do_log = ENABLE_USB_LOG; -void (*usb_packet_handle[32])(usb_packet_t* packet, void *priv); - - -void usb_init(int min_card, int max_card) +static void +usb_log(const char *fmt, ...) { - int c; - - for (c = 0; c < 32; c++) - usb_packet_handle[c] = usb_priv[c] = NULL; - - usb_min_card = min_card; - usb_max_card = max_card; + va_list ap; + + if (usb_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define usb_log(fmt, ...) +#endif + + +static uint8_t +uhci_reg_read(uint16_t addr, void *p) +{ + uint8_t ret = 0xff; + + switch (addr & 0x1f) { + case 0x10: case 0x11: case 0x12: case 0x13: + /* Port status */ + ret = 0x00; + break; + } + + return ret; } -void usb_add_specific(int card, void (*packet_handle)(usb_packet_t *packet, void *priv), void *priv) +static void +uhci_reg_write(uint16_t addr, uint8_t val, void *p) { - usb_packet_handle[card] = packet_handle; - usb_priv[card] = priv; } -void usb_add(void (*packet_handle)(usb_packet_t *packet, void *priv), void *priv) +void +uhci_update_io_mapping(usb_t *dev, uint8_t base_l, uint8_t base_h, int enable) { - int c; - - for (c = usb_min_card; c <= usb_max_card; c++) - { - if (!usb_packet_handle[c]) - { - usb_packet_handle[c] = packet_handle; - usb_priv[c] = priv; - // pclog("USB device added to card: %i\n", c); - return; - } - } + if (dev->uhci_enable && (dev->uhci_io_base != 0x0000)) + io_removehandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, NULL, NULL, dev); + + dev->uhci_io_base = base_l | (base_h << 8); + dev->uhci_enable = enable; + + if (dev->uhci_enable && (dev->uhci_io_base != 0x0000)) + io_sethandler(dev->uhci_io_base, 0x20, uhci_reg_read, NULL, NULL, uhci_reg_write, NULL, NULL, dev); } + + +static uint8_t +ohci_mmio_read(uint32_t addr, void *p) +{ + usb_t *dev = (usb_t *) p; + uint8_t ret = 0x00; + + addr &= 0x00000fff; + + ret = dev->ohci_mmio[addr]; + + return ret; +} + + +static void +ohci_mmio_write(uint32_t addr, uint8_t val, void *p) +{ + usb_t *dev = (usb_t *) p; + + addr &= 0x00000fff; + + switch (addr) { + case 0x08: /* HCCOMMANDSTATUS */ + /* bit HostControllerReset must be cleared for the controller to be seen as initialized */ + val &= ~0x01; + + /* bit OwnershipChangeRequest triggers an ownership change (SMM <-> OS) */ + if (val & 0x0f) { + dev->ohci_mmio[0x0f] = 0x40; + dev->ohci_mmio[0x05] &= ~(dev->ohci_mmio[0x05] & 0x01); + } + break; + } + + dev->ohci_mmio[addr] = val; +} + + +void +ohci_update_mem_mapping(usb_t *dev, uint8_t base1, uint8_t base2, uint8_t base3, int enable) +{ + if (dev->ohci_enable && (dev->ohci_mem_base != 0x00000000)) + mem_mapping_disable(&dev->ohci_mmio_mapping); + + dev->ohci_mem_base = ((base1 << 8) | (base2 << 16) | (base3 << 24)) & 0xfffff000; + dev->ohci_enable = enable; + + if (dev->ohci_enable && (dev->ohci_mem_base != 0x00000000)) + mem_mapping_set_addr(&dev->ohci_mmio_mapping, dev->ohci_mem_base, 0x1000); +} + + +static void +usb_close(void *priv) +{ + usb_t *dev = (usb_t *) priv; + + free(dev); +} + + +static void * +usb_init(const device_t *info) +{ + usb_t *dev; + + dev = (usb_t *)malloc(sizeof(usb_t)); + if (dev == NULL) return(NULL); + memset(dev, 0x00, sizeof(usb_t)); + + memset(dev->ohci_mmio, 0x00, 4096); + dev->ohci_mmio[0x00] = 0x10; + dev->ohci_mmio[0x01] = 0x01; + dev->ohci_mmio[0x48] = 0x02; + + mem_mapping_add(&dev->ohci_mmio_mapping, 0, 0, + ohci_mmio_read, NULL, NULL, + ohci_mmio_write, NULL, NULL, + NULL, MEM_MAPPING_EXTERNAL, dev); + mem_mapping_disable(&dev->ohci_mmio_mapping); + + return dev; +} + + +const device_t usb_device = +{ + "Universal Serial Bus", + DEVICE_PCI, + 0, + usb_init, + usb_close, + NULL, + NULL, + NULL, + NULL, + NULL +}; diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index f48318b7d..f8044ddd5 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -512,9 +512,9 @@ CXXFLAGS := $(CFLAGS) ######################################################################### # Create the (final) list of objects to build. # ######################################################################### -MAINOBJ := pc.o config.o random.o timer.o io.o acpi.o apm.o dma.o nmi.o \ - pic.o pit.o port_92.o ppi.o pci.o mca.o mcr.o mem.o \ - rom.o device.o nvr.o nvr_at.o nvr_ps2.o sst_flash.o via_vt82c586b.o \ +MAINOBJ := pc.o config.o random.o timer.o io.o acpi.o apm.o dma.o ddma.o \ + nmi.o pic.o pit.o port_92.o ppi.o pci.o mca.o mcr.o mem.o rom.o \ + usb.o device.o nvr.o nvr_at.o nvr_ps2.o sst_flash.o via_vt82c586b.o \ via_vt82c596b.o $(VNCOBJ) INTELOBJ := intel_flash.o \ diff --git a/src/win/Makefile_ndr.mingw b/src/win/Makefile_ndr.mingw index a5242812d..1a15963e6 100644 --- a/src/win/Makefile_ndr.mingw +++ b/src/win/Makefile_ndr.mingw @@ -516,9 +516,9 @@ CXXFLAGS := $(CFLAGS) ######################################################################### # Create the (final) list of objects to build. # ######################################################################### -MAINOBJ := pc.o config.o random.o timer.o io.o acpi.o apm.o dma.o nmi.o \ - pic.o pit.o port_92.o ppi.o pci.o mca.o mcr.o mem.o \ - rom.o device.o nvr.o nvr_at.o nvr_ps2.o sst_flash.o via_vt82c586b.o \ +MAINOBJ := pc.o config.o random.o timer.o io.o acpi.o apm.o dma.o ddma.o \ + nmi.o pic.o pit.o port_92.o ppi.o pci.o mca.o mcr.o mem.o rom.o \ + usb.o device.o nvr.o nvr_at.o nvr_ps2.o sst_flash.o via_vt82c586b.o \ via_vt82c596b.o $(VNCOBJ) INTELOBJ := intel_flash.o \