Cosmetic changes to SMBus code
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@@ -102,9 +102,9 @@ smbus_piix4_write(uint16_t addr, uint8_t val, void *priv)
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switch (addr - dev->io_base) {
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switch (addr - dev->io_base) {
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case 0x00:
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case 0x00:
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/* some status bits are reset by writing 1 to them */
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/* some status bits are reset by writing 1 to them */
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for (smbus_addr = 0x02; smbus_addr <= 0x10; smbus_addr = smbus_addr << 1) {
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for (smbus_addr = 0x02; smbus_addr <= 0x10; smbus_addr <<= 1) {
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if (val & smbus_addr)
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if (val & smbus_addr)
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dev->stat = dev->stat & ~smbus_addr;
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dev->stat &= ~smbus_addr;
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}
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}
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break;
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break;
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case 0x02:
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case 0x02:
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@@ -150,7 +150,7 @@ smbus_piix4_write(uint16_t addr, uint8_t val, void *priv)
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dev->data0 = (temp & 0xFF);
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dev->data0 = (temp & 0xFF);
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dev->data1 = (temp >> 8);
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dev->data1 = (temp >> 8);
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} else {
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} else {
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temp = (dev->data1 << 8) | dev->data0;
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temp = ((dev->data1 << 8) | dev->data0);
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smbus_write_word_cmd(smbus_addr, dev->cmd, temp);
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smbus_write_word_cmd(smbus_addr, dev->cmd, temp);
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}
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}
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dev->next_stat = 0x2;
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dev->next_stat = 0x2;
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@@ -216,7 +216,7 @@ smbus_piix4_remap(smbus_piix4_t *dev, uint16_t new_io_base, uint8_t enable)
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dev->io_base = new_io_base;
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dev->io_base = new_io_base;
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smbus_piix4_log("SMBus PIIX4: remap to %04Xh\n", dev->io_base);
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smbus_piix4_log("SMBus PIIX4: remap to %04Xh\n", dev->io_base);
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if (enable && (dev->io_base != 0x0000))
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if ((enable) && (dev->io_base != 0x0000))
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io_sethandler(dev->io_base, 0x10, smbus_piix4_read, NULL, NULL, smbus_piix4_write, NULL, NULL, dev);
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io_sethandler(dev->io_base, 0x10, smbus_piix4_read, NULL, NULL, smbus_piix4_write, NULL, NULL, dev);
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}
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}
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