From 388825377c31f7462418514c7cbba635ac19693f Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Mon, 29 Jun 2020 16:26:18 +0300 Subject: [PATCH 1/4] Implemented the OPTi 895 Similar the OPTi 495 & 802G. It's a 486 ISA/VLB chipset used by many known boards. One being the PB450. --- src/chipset/opti895.c | 184 +++++++++++++++++++++++++++++++++++ src/include/86box/chipset.h | 1 + src/include/86box/machine.h | 2 + src/machine/m_at_386dx_486.c | 25 ++++- src/machine/machine_table.c | 1 + 5 files changed, 212 insertions(+), 1 deletion(-) create mode 100644 src/chipset/opti895.c diff --git a/src/chipset/opti895.c b/src/chipset/opti895.c new file mode 100644 index 000000000..0b5548f72 --- /dev/null +++ b/src/chipset/opti895.c @@ -0,0 +1,184 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the OPTi 82C802G/82C895 chipset. + * + * + * Note: The shadowing of the chipset is enough to get the current machine + * to work. Getting anything other to work will require excessive amount + * of rewrites and improvements. Also, considering the similarities with the + * 82C495XLC & 82C802G it can be merged with opti495.c and also get 82C802G + * implemented. + * + * Copyright 2020 Tiseno100. + */ + +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include <86box/timer.h> +#include <86box/io.h> +#include <86box/device.h> +#include <86box/keyboard.h> +#include <86box/mem.h> +#include <86box/fdd.h> +#include <86box/fdc.h> +#include <86box/port_92.h> +#include <86box/chipset.h> + + +typedef struct +{ + uint8_t idx, + regs[256], + scratch[2]; +} opti895_t; + +static void +opti895_recalc(opti895_t *dev) +{ + uint32_t base; + uint32_t i, shflags = 0; + + shadowbios = 0; + shadowbios_write = 0; + + for (i = 0; i < 8; i++) { + if(dev->regs[0x22] & (i << 8) && (i==7)){ + shadowbios = 1; + shadowbios_write = 1; + mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); + } + else if(!(dev->regs[0x22] & (i << 8)) && (i==7)) { + shadowbios = 0; + shadowbios_write = 0; + mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } + + /* + We'll ignore it for now + base = 0xc0000 + (i << 14); + if (dev->regs[0x26] & (1 << i) && (i<=3)) { + shflags = (dev->regs[0x26] & 0x20) ? (MEM_READ_INTERNAL | MEM_WRITE_DISABLED) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + mem_set_mem_state(base, 0x4000, shflags); + } else mem_set_mem_state(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + */ + + base = 0xd0000 + (i << 14); + if (dev->regs[0x23] & (1 << i)) { + if(base < 0xe0000) + shflags = (dev->regs[0x22] & 0x10) ? (MEM_READ_INTERNAL | MEM_WRITE_DISABLED) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + else + shflags = (dev->regs[0x22] & 0x08) ? (MEM_READ_INTERNAL | MEM_WRITE_DISABLED) : (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + mem_set_mem_state(base, 0x4000, shflags); + } else mem_set_mem_state(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + } + + flushmmucache(); +} + +static void +opti895_write(uint16_t addr, uint8_t val, void *priv) +{ + opti895_t *dev = (opti895_t *) priv; + + switch (addr) { + case 0x22: + dev->idx = val; + break; + case 0x24: + dev->regs[dev->idx] = val; + pclog("dev->regs[%04x] = %08x\n", dev->idx, val); + switch(dev->idx){ + case 0x21: + if(dev->regs[0x21] & 0x10){ + cpu_cache_ext_enabled = 1; + cpu_update_waitstates(); + } + break; + + case 0x22: + case 0x23: + case 0x26: + opti895_recalc(dev); + break; + + } + + break; + + case 0xe1: + case 0xe2: + dev->scratch[addr] = val; + break; + } +} + + +static uint8_t +opti895_read(uint16_t addr, void *priv) +{ + uint8_t ret = 0xff; + opti895_t *dev = (opti895_t *) priv; + + switch (addr) { + case 0x24: + ret = dev->regs[dev->idx]; + break; + case 0xe1: + case 0xe2: + ret = dev->scratch[addr]; + break; + } + + return ret; +} + + +static void +opti895_close(void *priv) +{ + opti895_t *dev = (opti895_t *) priv; + + free(dev); +} + + +static void * +opti895_init(const device_t *info) +{ + opti895_t *dev = (opti895_t *) malloc(sizeof(opti895_t)); + memset(dev, 0, sizeof(opti895_t)); + + device_add(&port_92_device); + + io_sethandler(0x0022, 0x0001, opti895_read, NULL, NULL, opti895_write, NULL, NULL, dev); + io_sethandler(0x0024, 0x0001, opti895_read, NULL, NULL, opti895_write, NULL, NULL, dev); + + dev->scratch[0] = dev->scratch[1] = 0xff; + + io_sethandler(0x00e1, 0x0002, opti895_read, NULL, NULL, opti895_write, NULL, NULL, dev); + + return dev; +} + + +const device_t opti895_device = { + "OPTi 82C895", + 0, + 0, + opti895_init, opti895_close, NULL, + NULL, NULL, NULL, + NULL +}; diff --git a/src/include/86box/chipset.h b/src/include/86box/chipset.h index defc595ae..2a0d00f1a 100644 --- a/src/include/86box/chipset.h +++ b/src/include/86box/chipset.h @@ -61,6 +61,7 @@ extern const device_t ioapic_device; /* OPTi */ extern const device_t opti495_device; +extern const device_t opti895_device; extern const device_t opti5x7_device; /* C&T */ diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index b0b4fa054..360ed7cda 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -262,6 +262,8 @@ extern int machine_at_opti495_init(const machine_t *); extern int machine_at_opti495_ami_init(const machine_t *); extern int machine_at_opti495_mr_init(const machine_t *); +extern int machine_at_403tg_init(const machine_t *); + extern int machine_at_vli486sv2g_init(const machine_t *); extern int machine_at_ami471_init(const machine_t *); extern int machine_at_dtk486_init(const machine_t *); diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index 6946dffa2..43cd7ca16 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -272,6 +272,26 @@ machine_at_opti495_mr_init(const machine_t *model) return ret; } +int +machine_at_403tg_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/403tg/403TG.BIN", + 0x000f0000, 65536, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_ide_init(model); + + device_add(&opti895_device); + + device_add(&keyboard_at_device); + device_add(&fdc_at_device); + + return ret; +} static void machine_at_sis_85c471_common_init(const machine_t *model) @@ -404,7 +424,8 @@ machine_at_r418_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_common_init_ex(model, 2); + machine_at_common_init_ex(model, 2) + machine_at_sis_85c496_common_init(model); device_add(&sis_85c496_device); pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4); @@ -431,6 +452,7 @@ machine_at_ls486e_init(const machine_t *model) return ret; machine_at_common_init_ex(model, 2); + machine_at_sis_85c496_common_init(model); device_add(&sis_85c496_ls486e_device); pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4); @@ -457,6 +479,7 @@ machine_at_4dps_init(const machine_t *model) return ret; machine_at_common_init_ex(model, 2); + machine_at_sis_85c496_common_init(model); device_add(&sis_85c496_device); pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 5c89a6eb1..e81c33071 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -200,6 +200,7 @@ const machine_t machines[] = { { "[OPTi 495] Award 486 clone", "award486", MACHINE_TYPE_486, {{"Intel", cpus_i486S1}, {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_init, NULL }, { "[OPTi 495] MR 486 clone", "mr486", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_mr_init, NULL }, { "[OPTi 495] Dataexpert SX495 (486)", "ami486", MACHINE_TYPE_486, {{"Intel", cpus_i486S1}, {"AMD", cpus_Am486S1}, {"Cyrix", cpus_Cx486S1},{"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 32, 1, 127, machine_at_opti495_ami_init, NULL }, + { "[OPTi 895] Jetway J-403TG", "403tg", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT, 1, 64, 1, 127, machine_at_403tg_init, NULL }, { "[SiS 471] ASUS VL/I-486SV2G (GX4)", "vli486sv2g", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_vli486sv2g_init, NULL }, { "[SiS 471] AMI 486 Clone", "ami471", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ami471_init, NULL }, #if defined(DEV_BRANCH) && defined(USE_WIN471) From 0b17c4ef315eee2955a0f614e5abb588e51a32f2 Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Mon, 29 Jun 2020 16:28:22 +0300 Subject: [PATCH 2/4] Fixed a small inconsistency --- src/machine/m_at_386dx_486.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index 43cd7ca16..0f47126ee 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -424,7 +424,7 @@ machine_at_r418_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_common_init_ex(model, 2) + machine_at_common_init_ex(model, 2); machine_at_sis_85c496_common_init(model); device_add(&sis_85c496_device); From cd840c4c02b9d73bc23ad885ca8ac0e20e06f7f8 Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Mon, 29 Jun 2020 16:38:26 +0300 Subject: [PATCH 3/4] Added the OPTi 895 in Makefile --- src/win/Makefile.mingw | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index cea2187e3..b21ecfd44 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -559,9 +559,9 @@ CPUOBJ := cpu.o cpu_table.o \ x86seg.o x87.o x87_timings.o \ $(DYNARECOBJ) -CHIPSETOBJ := acc2168.o cs8230.o ali1429.o headland.o i82335.o \ +CHIPSETOBJ := acc2168.o acer_m3a.o cs8230.o ali1429.o headland.o i82335.o \ intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \ - neat.o opti495.o opti5x7.o scamp.o scat.o \ + neat.o opti495.o opti895.o opti5x7.o scamp.o scat.o \ sis_85c310.o sis_85c471.o sis_85c496.o \ via_apollo.o via_vpx.o via_vt82c586b.o via_vt82c596b.o wd76c10.o vl82c480.o \ amd640.o From 672b0bbef70a9c11d48a00a35fa1a9055be029a1 Mon Sep 17 00:00:00 2001 From: tiseno100 <58827426+tiseno100@users.noreply.github.com> Date: Mon, 29 Jun 2020 16:39:30 +0300 Subject: [PATCH 4/4] Deleted the Acer off the Makefile It's not needed anymore. --- src/win/Makefile.mingw | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index b21ecfd44..7e5479f8b 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -559,7 +559,7 @@ CPUOBJ := cpu.o cpu_table.o \ x86seg.o x87.o x87_timings.o \ $(DYNARECOBJ) -CHIPSETOBJ := acc2168.o acer_m3a.o cs8230.o ali1429.o headland.o i82335.o \ +CHIPSETOBJ := acc2168.o cs8230.o ali1429.o headland.o i82335.o \ intel_420ex.o intel_4x0.o intel_sio.o intel_piix.o ioapic.o \ neat.o opti495.o opti895.o opti5x7.o scamp.o scat.o \ sis_85c310.o sis_85c471.o sis_85c496.o \