SoftFloat MMX:

Added softfloat versions of the MMX instructions while preserving the non-softfloat ones.

src/cpu/x86_ops_mmx.h

@@ -5,6 +5,9 @@
 
 #define MMX_GETSRC()                               \
     if (cpu_mod == 3) {                            \
+        if (fpu_softfloat) \
+            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction; \
+        else \
             src = cpu_state.MM[cpu_rm];                \
         CLOCK_CYCLES(1);                           \
     } else {                                       \

src/cpu/x86_ops_mmx_cmp.h

@@ -1,13 +1,31 @@
 static int
 opPCMPEQB_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.b[0] = (dst.b[0] == src.b[0]) ? 0xff : 0;
+        dst.b[1] = (dst.b[1] == src.b[1]) ? 0xff : 0;
+        dst.b[2] = (dst.b[2] == src.b[2]) ? 0xff : 0;
+        dst.b[3] = (dst.b[3] == src.b[3]) ? 0xff : 0;
+        dst.b[4] = (dst.b[4] == src.b[4]) ? 0xff : 0;
+        dst.b[5] = (dst.b[5] == src.b[5]) ? 0xff : 0;
+        dst.b[6] = (dst.b[6] == src.b[6]) ? 0xff : 0;
+        dst.b[7] = (dst.b[7] == src.b[7]) ? 0xff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0;
@@ -16,19 +34,37 @@ opPCMPEQB_a16(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0;
-
+    }
     return 0;
 }
 static int
 opPCMPEQB_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.b[0] = (dst.b[0] == src.b[0]) ? 0xff : 0;
+        dst.b[1] = (dst.b[1] == src.b[1]) ? 0xff : 0;
+        dst.b[2] = (dst.b[2] == src.b[2]) ? 0xff : 0;
+        dst.b[3] = (dst.b[3] == src.b[3]) ? 0xff : 0;
+        dst.b[4] = (dst.b[4] == src.b[4]) ? 0xff : 0;
+        dst.b[5] = (dst.b[5] == src.b[5]) ? 0xff : 0;
+        dst.b[6] = (dst.b[6] == src.b[6]) ? 0xff : 0;
+        dst.b[7] = (dst.b[7] == src.b[7]) ? 0xff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0;
@@ -37,20 +73,38 @@ opPCMPEQB_a32(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0;
-
+    }
     return 0;
 }
 
 static int
 opPCMPGTB_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.b[0] = (dst.sb[0] > src.sb[0]) ? 0xff : 0;
+        dst.b[1] = (dst.sb[1] > src.sb[1]) ? 0xff : 0;
+        dst.b[2] = (dst.sb[2] > src.sb[2]) ? 0xff : 0;
+        dst.b[3] = (dst.sb[3] > src.sb[3]) ? 0xff : 0;
+        dst.b[4] = (dst.sb[4] > src.sb[4]) ? 0xff : 0;
+        dst.b[5] = (dst.sb[5] > src.sb[5]) ? 0xff : 0;
+        dst.b[6] = (dst.sb[6] > src.sb[6]) ? 0xff : 0;
+        dst.b[7] = (dst.sb[7] > src.sb[7]) ? 0xff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0;
@@ -59,19 +113,37 @@ opPCMPGTB_a16(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0;
-
+    }
     return 0;
 }
 static int
 opPCMPGTB_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.b[0] = (dst.sb[0] > src.sb[0]) ? 0xff : 0;
+        dst.b[1] = (dst.sb[1] > src.sb[1]) ? 0xff : 0;
+        dst.b[2] = (dst.sb[2] > src.sb[2]) ? 0xff : 0;
+        dst.b[3] = (dst.sb[3] > src.sb[3]) ? 0xff : 0;
+        dst.b[4] = (dst.sb[4] > src.sb[4]) ? 0xff : 0;
+        dst.b[5] = (dst.sb[5] > src.sb[5]) ? 0xff : 0;
+        dst.b[6] = (dst.sb[6] > src.sb[6]) ? 0xff : 0;
+        dst.b[7] = (dst.sb[7] > src.sb[7]) ? 0xff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0;
@@ -80,138 +152,242 @@ opPCMPGTB_a32(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0;
         cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0;
-
+    }
     return 0;
 }
 
 static int
 opPCMPEQW_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.w[0] = (dst.w[0] == src.w[0]) ? 0xffff : 0;
+        dst.w[1] = (dst.w[1] == src.w[1]) ? 0xffff : 0;
+        dst.w[2] = (dst.w[2] == src.w[2]) ? 0xffff : 0;
+        dst.w[3] = (dst.w[3] == src.w[3]) ? 0xffff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0;
-
+    }
     return 0;
 }
 static int
 opPCMPEQW_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.w[0] = (dst.w[0] == src.w[0]) ? 0xffff : 0;
+        dst.w[1] = (dst.w[1] == src.w[1]) ? 0xffff : 0;
+        dst.w[2] = (dst.w[2] == src.w[2]) ? 0xffff : 0;
+        dst.w[3] = (dst.w[3] == src.w[3]) ? 0xffff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0;
-
+    }
     return 0;
 }
 
 static int
 opPCMPGTW_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.w[0] = (dst.sw[0] > src.sw[0]) ? 0xffff : 0;
+        dst.w[1] = (dst.sw[1] > src.sw[1]) ? 0xffff : 0;
+        dst.w[2] = (dst.sw[2] > src.sw[2]) ? 0xffff : 0;
+        dst.w[3] = (dst.sw[3] > src.sw[3]) ? 0xffff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0;
-
+    }
     return 0;
 }
 static int
 opPCMPGTW_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.w[0] = (dst.sw[0] > src.sw[0]) ? 0xffff : 0;
+        dst.w[1] = (dst.sw[1] > src.sw[1]) ? 0xffff : 0;
+        dst.w[2] = (dst.sw[2] > src.sw[2]) ? 0xffff : 0;
+        dst.w[3] = (dst.sw[3] > src.sw[3]) ? 0xffff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0;
         cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0;
-
+    }
     return 0;
 }
 
 static int
 opPCMPEQD_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.l[0] = (dst.l[0] == src.l[0]) ? 0xffffffff : 0;
+        dst.l[1] = (dst.l[1] == src.l[1]) ? 0xffffffff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0;
         cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0;
-
+    }
     return 0;
 }
 static int
 opPCMPEQD_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.l[0] = (dst.l[0] == src.l[0]) ? 0xffffffff : 0;
+        dst.l[1] = (dst.l[1] == src.l[1]) ? 0xffffffff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0;
         cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0;
-
+    }
     return 0;
 }
 
 static int
 opPCMPGTD_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.l[0] = (dst.sl[0] > src.sl[0]) ? 0xffffffff : 0;
+        dst.l[1] = (dst.sl[1] > src.sl[1]) ? 0xffffffff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0;
         cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0;
-
+    }
     return 0;
 }
 static int
 opPCMPGTD_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
-
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.l[0] = (dst.sl[0] > src.sl[0]) ? 0xffffffff : 0;
+        dst.l[1] = (dst.sl[1] > src.sl[1]) ? 0xffffffff : 0;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0;
         cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0;
-
+    }
     return 0;
 }

src/cpu/x86_ops_mmx_logic.h

@@ -1,99 +1,203 @@
 static int
 opPAND_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.q &= src.q;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else
         cpu_state.MM[cpu_reg].q &= src.q;
+
     return 0;
 }
 static int
 opPAND_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.q &= src.q;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else
         cpu_state.MM[cpu_reg].q &= src.q;
+
     return 0;
 }
 
 static int
 opPANDN_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.q = ~dst.q & src.q;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else
         cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q;
+
     return 0;
 }
 static int
 opPANDN_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.q = ~dst.q & src.q;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else
         cpu_state.MM[cpu_reg].q = ~cpu_state.MM[cpu_reg].q & src.q;
+
     return 0;
 }
 
 static int
 opPOR_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.q |= src.q;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else
         cpu_state.MM[cpu_reg].q |= src.q;
+
     return 0;
 }
 static int
 opPOR_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.q |= src.q;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else
         cpu_state.MM[cpu_reg].q |= src.q;
+
     return 0;
 }
 
 static int
 opPXOR_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.q ^= src.q;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else
         cpu_state.MM[cpu_reg].q ^= src.q;
+
     return 0;
 }
 static int
 opPXOR_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.q ^= src.q;
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else
         cpu_state.MM[cpu_reg].q ^= src.q;
+
     return 0;
 }

src/cpu/x86_ops_mmx_mov.h

@@ -1,58 +1,124 @@
 static int
 opMOVD_l_mm_a16(uint32_t fetchdat)
 {
+    uint32_t dst;
+    MMX_REG op;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        if (cpu_mod == 3) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            op.l[0] = cpu_state.regs[cpu_rm].l;
+            op.l[1] = 0;
+            fpu_state.st_space[cpu_reg].fraction = op.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(1);
+        } else {
+            SEG_CHECK_READ(cpu_state.ea_seg);
+            dst = readmeml(easeg, cpu_state.eaaddr);
+            if (cpu_state.abrt)
+                return 1;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            op.l[0] = dst;
+            op.l[1] = 0;
+            fpu_state.st_space[cpu_reg].fraction = op.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(2);
+        }
+    } else {
         if (cpu_mod == 3) {
             cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l;
             cpu_state.MM[cpu_reg].l[1] = 0;
             CLOCK_CYCLES(1);
         } else {
-        uint32_t dst;
-
             SEG_CHECK_READ(cpu_state.ea_seg);
             dst = readmeml(easeg, cpu_state.eaaddr);
             if (cpu_state.abrt)
                 return 1;
             cpu_state.MM[cpu_reg].l[0] = dst;
             cpu_state.MM[cpu_reg].l[1] = 0;
-
             CLOCK_CYCLES(2);
         }
+    }
     return 0;
 }
 static int
 opMOVD_l_mm_a32(uint32_t fetchdat)
 {
+    uint32_t dst;
+    MMX_REG op;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        if (cpu_mod == 3) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            op.l[0] = cpu_state.regs[cpu_rm].l;
+            op.l[1] = 0;
+            fpu_state.st_space[cpu_reg].fraction = op.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(1);
+        } else {
+            SEG_CHECK_READ(cpu_state.ea_seg);
+            dst = readmeml(easeg, cpu_state.eaaddr);
+            if (cpu_state.abrt)
+                return 1;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            op.l[0] = dst;
+            op.l[1] = 0;
+            fpu_state.st_space[cpu_reg].fraction = op.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(2);
+        }
+    } else {
         if (cpu_mod == 3) {
             cpu_state.MM[cpu_reg].l[0] = cpu_state.regs[cpu_rm].l;
             cpu_state.MM[cpu_reg].l[1] = 0;
             CLOCK_CYCLES(1);
         } else {
-        uint32_t dst;
-
             SEG_CHECK_READ(cpu_state.ea_seg);
             dst = readmeml(easeg, cpu_state.eaaddr);
             if (cpu_state.abrt)
                 return 1;
             cpu_state.MM[cpu_reg].l[0] = dst;
             cpu_state.MM[cpu_reg].l[1] = 0;
-
             CLOCK_CYCLES(2);
         }
+    }
     return 0;
 }
 
 static int
 opMOVD_mm_l_a16(uint32_t fetchdat)
 {
+    MMX_REG op;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        if (cpu_mod == 3) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+            cpu_state.regs[cpu_rm].l = op.l[0];
+            CLOCK_CYCLES(1);
+        } else {
+            SEG_CHECK_WRITE(cpu_state.ea_seg);
+            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
+            op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+            writememl(easeg, cpu_state.eaaddr, op.l[0]);
+            if (cpu_state.abrt)
+                return 1;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            CLOCK_CYCLES(2);
+        }
+    } else {
         if (cpu_mod == 3) {
             cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
             CLOCK_CYCLES(1);
@@ -64,14 +130,35 @@ opMOVD_mm_l_a16(uint32_t fetchdat)
                 return 1;
             CLOCK_CYCLES(2);
         }
+    }
     return 0;
 }
 static int
 opMOVD_mm_l_a32(uint32_t fetchdat)
 {
+    MMX_REG op;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        if (cpu_mod == 3) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+            cpu_state.regs[cpu_rm].l = op.l[0];
+            CLOCK_CYCLES(1);
+        } else {
+            SEG_CHECK_WRITE(cpu_state.ea_seg);
+            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 3);
+            op = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+            writememl(easeg, cpu_state.eaaddr, op.l[0]);
+            if (cpu_state.abrt)
+                return 1;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            CLOCK_CYCLES(2);
+        }
+    } else {
         if (cpu_mod == 3) {
             cpu_state.regs[cpu_rm].l = cpu_state.MM[cpu_reg].l[0];
             CLOCK_CYCLES(1);
@@ -83,6 +170,7 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
                 return 1;
             CLOCK_CYCLES(2);
         }
+    }
     return 0;
 }
 
@@ -137,15 +225,37 @@ opMOVD_mm_l_a32_cx(uint32_t fetchdat)
 static int
 opMOVQ_q_mm_a16(uint32_t fetchdat)
 {
+    uint64_t dst;
+    MMX_REG src, op;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        if (cpu_mod == 3) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
+            op.q = src.q;
+            fpu_state.st_space[cpu_reg].fraction = op.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(1);
+        } else {
+            SEG_CHECK_READ(cpu_state.ea_seg);
+            dst = readmemq(easeg, cpu_state.eaaddr);
+            if (cpu_state.abrt)
+                return 1;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            op.q = dst;
+            fpu_state.st_space[cpu_reg].fraction = op.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(2);
+        }
+    } else {
         if (cpu_mod == 3) {
             cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q;
             CLOCK_CYCLES(1);
         } else {
-        uint64_t dst;
-
             SEG_CHECK_READ(cpu_state.ea_seg);
             dst = readmemq(easeg, cpu_state.eaaddr);
             if (cpu_state.abrt)
@@ -153,20 +263,43 @@ opMOVQ_q_mm_a16(uint32_t fetchdat)
             cpu_state.MM[cpu_reg].q = dst;
             CLOCK_CYCLES(2);
         }
+    }
     return 0;
 }
 static int
 opMOVQ_q_mm_a32(uint32_t fetchdat)
 {
+    uint64_t dst;
+    MMX_REG src, op;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        if (cpu_mod == 3) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
+            op.q = src.q;
+            fpu_state.st_space[cpu_reg].fraction = op.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(1);
+        } else {
+            SEG_CHECK_READ(cpu_state.ea_seg);
+            dst = readmemq(easeg, cpu_state.eaaddr);
+            if (cpu_state.abrt)
+                return 1;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            op.q = dst;
+            fpu_state.st_space[cpu_reg].fraction = op.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(2);
+        }
+    } else {
         if (cpu_mod == 3) {
             cpu_state.MM[cpu_reg].q = cpu_state.MM[cpu_rm].q;
             CLOCK_CYCLES(1);
         } else {
-        uint64_t dst;
-
             SEG_CHECK_READ(cpu_state.ea_seg);
             dst = readmemq(easeg, cpu_state.eaaddr);
             if (cpu_state.abrt)
@@ -174,6 +307,7 @@ opMOVQ_q_mm_a32(uint32_t fetchdat)
             cpu_state.MM[cpu_reg].q = dst;
             CLOCK_CYCLES(2);
         }
+    }
     return 0;
 }
 
@@ -183,6 +317,23 @@ opMOVQ_mm_q_a16(uint32_t fetchdat)
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        if (cpu_mod == 3) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            fpu_state.st_space[cpu_rm].fraction = fpu_state.st_space[cpu_reg].fraction;
+            CLOCK_CYCLES(1);
+        } else {
+            SEG_CHECK_WRITE(cpu_state.ea_seg);
+            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
+            writememq(easeg, cpu_state.eaaddr, fpu_state.st_space[cpu_reg].fraction);
+            if (cpu_state.abrt)
+                return 1;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            CLOCK_CYCLES(2);
+        }
+    } else {
         if (cpu_mod == 3) {
             cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q;
             CLOCK_CYCLES(1);
@@ -194,6 +345,7 @@ opMOVQ_mm_q_a16(uint32_t fetchdat)
                 return 1;
             CLOCK_CYCLES(2);
         }
+    }
     return 0;
 }
 static int
@@ -202,6 +354,23 @@ opMOVQ_mm_q_a32(uint32_t fetchdat)
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        if (cpu_mod == 3) {
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            fpu_state.st_space[cpu_rm].fraction = fpu_state.st_space[cpu_reg].fraction;
+            CLOCK_CYCLES(1);
+        } else {
+            SEG_CHECK_WRITE(cpu_state.ea_seg);
+            CHECK_WRITE_COMMON(cpu_state.ea_seg, cpu_state.eaaddr, cpu_state.eaaddr + 7);
+            writememq(easeg, cpu_state.eaaddr, fpu_state.st_space[cpu_reg].fraction);
+            if (cpu_state.abrt)
+                return 1;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            CLOCK_CYCLES(2);
+        }
+    } else {
         if (cpu_mod == 3) {
             cpu_state.MM[cpu_rm].q = cpu_state.MM[cpu_reg].q;
             CLOCK_CYCLES(1);
@@ -213,5 +382,6 @@ opMOVQ_mm_q_a32(uint32_t fetchdat)
                 return 1;
             CLOCK_CYCLES(2);
         }
+    }
     return 0;
 }

src/cpu/x86_ops_mmx_pack.h

@@ -1,86 +1,175 @@
 static int
 opPUNPCKLDQ_a16(uint32_t fetchdat)
 {
+    uint32_t usrc;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        if (cpu_mod == 3) {
+            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            dst.l[1] = src.l[0];
+            fpu_state.st_space[cpu_reg].fraction = dst.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(1);
+        } else {
+            SEG_CHECK_READ(cpu_state.ea_seg);
+            src.l[0] = readmeml(easeg, cpu_state.eaaddr);
+            if (cpu_state.abrt)
+                return 1;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            dst.l[1] = src.l[0];
+            fpu_state.st_space[cpu_reg].fraction = dst.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(2);
+        }
+    } else {
         if (cpu_mod == 3) {
             cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0];
             CLOCK_CYCLES(1);
         } else {
-        uint32_t src;
-
             SEG_CHECK_READ(cpu_state.ea_seg);
-        src = readmeml(easeg, cpu_state.eaaddr);
+            usrc = readmeml(easeg, cpu_state.eaaddr);
             if (cpu_state.abrt)
                 return 0;
-        cpu_state.MM[cpu_reg].l[1] = src;
+            cpu_state.MM[cpu_reg].l[1] = usrc;
 
             CLOCK_CYCLES(2);
         }
+    }
     return 0;
 }
 static int
 opPUNPCKLDQ_a32(uint32_t fetchdat)
 {
+    uint32_t usrc;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        if (cpu_mod == 3) {
+            src = *(MMX_REG *)&fpu_state.st_space[cpu_rm].fraction;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            dst.l[1] = src.l[0];
+            fpu_state.st_space[cpu_reg].fraction = dst.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(1);
+        } else {
+            SEG_CHECK_READ(cpu_state.ea_seg);
+            src.l[0] = readmeml(easeg, cpu_state.eaaddr);
+            if (cpu_state.abrt)
+                return 1;
+            fpu_state.tag = 0;
+            fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+            dst.l[1] = src.l[0];
+            fpu_state.st_space[cpu_reg].fraction = dst.q;
+            fpu_state.st_space[cpu_reg].exp = 0xffff;
+            CLOCK_CYCLES(2);
+        }
+    } else {
         if (cpu_mod == 3) {
             cpu_state.MM[cpu_reg].l[1] = cpu_state.MM[cpu_rm].l[0];
             CLOCK_CYCLES(1);
         } else {
-        uint32_t src;
-
             SEG_CHECK_READ(cpu_state.ea_seg);
-        src = readmeml(easeg, cpu_state.eaaddr);
+            usrc = readmeml(easeg, cpu_state.eaaddr);
             if (cpu_state.abrt)
                 return 0;
-        cpu_state.MM[cpu_reg].l[1] = src;
+            cpu_state.MM[cpu_reg].l[1] = usrc;
 
             CLOCK_CYCLES(2);
         }
+    }
     return 0;
 }
 
 static int
 opPUNPCKHDQ_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
     MMX_GETSRC();
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.l[0] = dst.l[1];
+        dst.l[1] = src.l[1];
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1];
         cpu_state.MM[cpu_reg].l[1] = src.l[1];
-
+    }
     return 0;
 }
 static int
 opPUNPCKHDQ_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
     MMX_GETSRC();
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.l[0] = dst.l[1];
+        dst.l[1] = src.l[1];
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].l[0] = cpu_state.MM[cpu_reg].l[1];
         cpu_state.MM[cpu_reg].l[1] = src.l[1];
-
+    }
     return 0;
 }
 
 static int
 opPUNPCKLBW_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.b[7] = src.b[3];
+        dst.b[6] = dst.b[3];
+        dst.b[5] = src.b[2];
+        dst.b[4] = dst.b[2];
+        dst.b[3] = src.b[1];
+        dst.b[2] = dst.b[1];
+        dst.b[1] = src.b[0];
+        dst.b[0] = dst.b[0];
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].b[7] = src.b[3];
         cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3];
         cpu_state.MM[cpu_reg].b[5] = src.b[2];
@@ -89,18 +178,35 @@ opPUNPCKLBW_a16(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1];
         cpu_state.MM[cpu_reg].b[1] = src.b[0];
         cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0];
-
+    }
     return 0;
 }
 static int
 opPUNPCKLBW_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.b[7] = src.b[3];
+        dst.b[6] = dst.b[3];
+        dst.b[5] = src.b[2];
+        dst.b[4] = dst.b[2];
+        dst.b[3] = src.b[1];
+        dst.b[2] = dst.b[1];
+        dst.b[1] = src.b[0];
+        dst.b[0] = dst.b[0];
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].b[7] = src.b[3];
         cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[3];
         cpu_state.MM[cpu_reg].b[5] = src.b[2];
@@ -109,19 +215,36 @@ opPUNPCKLBW_a32(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[1];
         cpu_state.MM[cpu_reg].b[1] = src.b[0];
         cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[0];
-
+    }
     return 0;
 }
 
 static int
 opPUNPCKHBW_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.b[0] = dst.b[4];
+        dst.b[1] = src.b[4];
+        dst.b[2] = dst.b[5];
+        dst.b[3] = src.b[5];
+        dst.b[4] = dst.b[6];
+        dst.b[5] = src.b[6];
+        dst.b[6] = dst.b[7];
+        dst.b[7] = src.b[7];
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4];
         cpu_state.MM[cpu_reg].b[1] = src.b[4];
         cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5];
@@ -130,18 +253,35 @@ opPUNPCKHBW_a16(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].b[5] = src.b[6];
         cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7];
         cpu_state.MM[cpu_reg].b[7] = src.b[7];
-
+    }
     return 0;
 }
 static int
 opPUNPCKHBW_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.b[0] = dst.b[4];
+        dst.b[1] = src.b[4];
+        dst.b[2] = dst.b[5];
+        dst.b[3] = src.b[5];
+        dst.b[4] = dst.b[6];
+        dst.b[5] = src.b[6];
+        dst.b[6] = dst.b[7];
+        dst.b[7] = src.b[7];
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].b[0] = cpu_state.MM[cpu_reg].b[4];
         cpu_state.MM[cpu_reg].b[1] = src.b[4];
         cpu_state.MM[cpu_reg].b[2] = cpu_state.MM[cpu_reg].b[5];
@@ -150,73 +290,125 @@ opPUNPCKHBW_a32(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].b[5] = src.b[6];
         cpu_state.MM[cpu_reg].b[6] = cpu_state.MM[cpu_reg].b[7];
         cpu_state.MM[cpu_reg].b[7] = src.b[7];
-
+    }
     return 0;
 }
 
 static int
 opPUNPCKLWD_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.w[3] = src.w[1];
+        dst.w[2] = dst.w[1];
+        dst.w[1] = src.w[0];
+        dst.w[0] = dst.w[0];
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].w[3] = src.w[1];
         cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1];
         cpu_state.MM[cpu_reg].w[1] = src.w[0];
         cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0];
-
+    }
     return 0;
 }
 static int
 opPUNPCKLWD_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.w[3] = src.w[1];
+        dst.w[2] = dst.w[1];
+        dst.w[1] = src.w[0];
+        dst.w[0] = dst.w[0];
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].w[3] = src.w[1];
         cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[1];
         cpu_state.MM[cpu_reg].w[1] = src.w[0];
         cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[0];
-
+    }
     return 0;
 }
 
 static int
 opPUNPCKHWD_a16(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.w[0] = dst.w[2];
+        dst.w[1] = src.w[2];
+        dst.w[2] = dst.w[3];
+        dst.w[3] = src.w[3];
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2];
         cpu_state.MM[cpu_reg].w[1] = src.w[2];
         cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3];
         cpu_state.MM[cpu_reg].w[3] = src.w[3];
-
+    }
     return 0;
 }
 static int
 opPUNPCKHWD_a32(uint32_t fetchdat)
 {
-    MMX_REG src;
+    MMX_REG src, dst;
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat)
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
     MMX_GETSRC();
 
+    if (fpu_softfloat) {
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.w[0] = dst.w[2];
+        dst.w[1] = src.w[2];
+        dst.w[2] = dst.w[3];
+        dst.w[3] = src.w[3];
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         cpu_state.MM[cpu_reg].w[0] = cpu_state.MM[cpu_reg].w[2];
         cpu_state.MM[cpu_reg].w[1] = src.w[2];
         cpu_state.MM[cpu_reg].w[2] = cpu_state.MM[cpu_reg].w[3];
         cpu_state.MM[cpu_reg].w[3] = src.w[3];
-
+    }
     return 0;
 }
 
@@ -228,6 +420,24 @@ opPACKSSWB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
     MMX_GETSRC();
+
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.sb[0] = SSATB(dst.sw[0]);
+        dst.sb[1] = SSATB(dst.sw[1]);
+        dst.sb[2] = SSATB(dst.sw[2]);
+        dst.sb[3] = SSATB(dst.sw[3]);
+        dst.sb[4] = SSATB(src.sw[0]);
+        dst.sb[5] = SSATB(src.sw[1]);
+        dst.sb[6] = SSATB(src.sw[2]);
+        dst.sb[7] = SSATB(src.sw[3]);
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         dst = cpu_state.MM[cpu_reg];
 
         cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]);
@@ -238,7 +448,7 @@ opPACKSSWB_a16(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]);
         cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]);
         cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]);
-
+    }
     return 0;
 }
 static int
@@ -249,6 +459,24 @@ opPACKSSWB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
     MMX_GETSRC();
+
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.sb[0] = SSATB(dst.sw[0]);
+        dst.sb[1] = SSATB(dst.sw[1]);
+        dst.sb[2] = SSATB(dst.sw[2]);
+        dst.sb[3] = SSATB(dst.sw[3]);
+        dst.sb[4] = SSATB(src.sw[0]);
+        dst.sb[5] = SSATB(src.sw[1]);
+        dst.sb[6] = SSATB(src.sw[2]);
+        dst.sb[7] = SSATB(src.sw[3]);
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         dst = cpu_state.MM[cpu_reg];
 
         cpu_state.MM[cpu_reg].sb[0] = SSATB(dst.sw[0]);
@@ -259,7 +487,7 @@ opPACKSSWB_a32(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].sb[5] = SSATB(src.sw[1]);
         cpu_state.MM[cpu_reg].sb[6] = SSATB(src.sw[2]);
         cpu_state.MM[cpu_reg].sb[7] = SSATB(src.sw[3]);
-
+    }
     return 0;
 }
 
@@ -271,6 +499,24 @@ opPACKUSWB_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
     MMX_GETSRC();
+
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.b[0] = USATB(dst.sw[0]);
+        dst.b[1] = USATB(dst.sw[1]);
+        dst.b[2] = USATB(dst.sw[2]);
+        dst.b[3] = USATB(dst.sw[3]);
+        dst.b[4] = USATB(src.sw[0]);
+        dst.b[5] = USATB(src.sw[1]);
+        dst.b[6] = USATB(src.sw[2]);
+        dst.b[7] = USATB(src.sw[3]);
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         dst = cpu_state.MM[cpu_reg];
 
         cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]);
@@ -281,7 +527,7 @@ opPACKUSWB_a16(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]);
         cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]);
         cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]);
-
+    }
     return 0;
 }
 static int
@@ -292,6 +538,24 @@ opPACKUSWB_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
     MMX_GETSRC();
+
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        dst.b[0] = USATB(dst.sw[0]);
+        dst.b[1] = USATB(dst.sw[1]);
+        dst.b[2] = USATB(dst.sw[2]);
+        dst.b[3] = USATB(dst.sw[3]);
+        dst.b[4] = USATB(src.sw[0]);
+        dst.b[5] = USATB(src.sw[1]);
+        dst.b[6] = USATB(src.sw[2]);
+        dst.b[7] = USATB(src.sw[3]);
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         dst = cpu_state.MM[cpu_reg];
 
         cpu_state.MM[cpu_reg].b[0] = USATB(dst.sw[0]);
@@ -302,7 +566,7 @@ opPACKUSWB_a32(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].b[5] = USATB(src.sw[1]);
         cpu_state.MM[cpu_reg].b[6] = USATB(src.sw[2]);
         cpu_state.MM[cpu_reg].b[7] = USATB(src.sw[3]);
-
+    }
     return 0;
 }
 
@@ -314,13 +578,28 @@ opPACKSSDW_a16(uint32_t fetchdat)
 
     fetch_ea_16(fetchdat);
     MMX_GETSRC();
+
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.sw[0] = SSATW(dst.sl[0]);
+        dst.sw[1] = SSATW(dst.sl[1]);
+        dst.sw[2] = SSATW(src.sl[0]);
+        dst.sw[3] = SSATW(src.sl[1]);
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         dst = cpu_state.MM[cpu_reg];
 
         cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]);
         cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]);
         cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]);
         cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]);
-
+    }
     return 0;
 }
 static int
@@ -331,12 +610,27 @@ opPACKSSDW_a32(uint32_t fetchdat)
 
     fetch_ea_32(fetchdat);
     MMX_GETSRC();
+
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+
+        dst.sw[0] = SSATW(dst.sl[0]);
+        dst.sw[1] = SSATW(dst.sl[1]);
+        dst.sw[2] = SSATW(src.sl[0]);
+        dst.sw[3] = SSATW(src.sl[1]);
+
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         dst = cpu_state.MM[cpu_reg];
 
         cpu_state.MM[cpu_reg].sw[0] = SSATW(dst.sl[0]);
         cpu_state.MM[cpu_reg].sw[1] = SSATW(dst.sl[1]);
         cpu_state.MM[cpu_reg].sw[2] = SSATW(src.sl[0]);
         cpu_state.MM[cpu_reg].sw[3] = SSATW(src.sl[1]);
-
+    }
     return 0;
 }

src/cpu/x86_ops_mmx_shift.h

@@ -16,12 +16,30 @@ opPSxxW_imm(uint32_t fetchdat)
     int reg   = fetchdat & 7;
     int op    = fetchdat & 0x38;
     int shift = (fetchdat >> 8) & 0xff;
+    MMX_REG dst;
 
     cpu_state.pc += 2;
     MMX_ENTER();
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[reg].fraction;
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
     switch (op) {
         case 0x10: /*PSRLW*/
+            if (fpu_softfloat) {
+                if (shift > 15)
+                    dst.q = 0;
+                else {
+                    dst.w[0] >>= shift;
+                    dst.w[1] >>= shift;
+                    dst.w[2] >>= shift;
+                    dst.w[3] >>= shift;
+                }
+                fpu_state.st_space[reg].fraction = dst.q;
+                fpu_state.st_space[reg].exp = 0xffff;
+            } else {
                 if (shift > 15)
                     cpu_state.MM[reg].q = 0;
                 else {
@@ -30,16 +48,40 @@ opPSxxW_imm(uint32_t fetchdat)
                     cpu_state.MM[reg].w[2] >>= shift;
                     cpu_state.MM[reg].w[3] >>= shift;
                 }
+            }
             break;
         case 0x20: /*PSRAW*/
+            if (fpu_softfloat) {
+                if (shift > 15)
+                    shift = 15;
+                dst.sw[0] >>= shift;
+                dst.sw[1] >>= shift;
+                dst.sw[2] >>= shift;
+                dst.sw[3] >>= shift;
+                fpu_state.st_space[reg].fraction = dst.q;
+                fpu_state.st_space[reg].exp = 0xffff;
+            } else {
                 if (shift > 15)
                     shift = 15;
                 cpu_state.MM[reg].sw[0] >>= shift;
                 cpu_state.MM[reg].sw[1] >>= shift;
                 cpu_state.MM[reg].sw[2] >>= shift;
                 cpu_state.MM[reg].sw[3] >>= shift;
+            }
             break;
         case 0x30: /*PSLLW*/
+            if (fpu_softfloat) {
+                if (shift > 15)
+                    dst.q = 0;
+                else {
+                    dst.w[0] <<= shift;
+                    dst.w[1] <<= shift;
+                    dst.w[2] <<= shift;
+                    dst.w[3] <<= shift;
+                }
+                fpu_state.st_space[reg].fraction = dst.q;
+                fpu_state.st_space[reg].exp = 0xffff;
+            } else {
                 if (shift > 15)
                     cpu_state.MM[reg].q = 0;
                 else {
@@ -48,6 +90,7 @@ opPSxxW_imm(uint32_t fetchdat)
                     cpu_state.MM[reg].w[2] <<= shift;
                     cpu_state.MM[reg].w[3] <<= shift;
                 }
+            }
             break;
         default:
             cpu_state.pc = cpu_state.oldpc;
@@ -62,11 +105,30 @@ opPSxxW_imm(uint32_t fetchdat)
 static int
 opPSLLW_a16(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 15) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.w[0] <<= shift;
+            dst.w[1] <<= shift;
+            dst.w[2] <<= shift;
+            dst.w[3] <<= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 15)
@@ -77,17 +139,36 @@ opPSLLW_a16(uint32_t fetchdat)
             cpu_state.MM[cpu_reg].w[2] <<= shift;
             cpu_state.MM[cpu_reg].w[3] <<= shift;
         }
-
+    }
     return 0;
 }
 static int
 opPSLLW_a32(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 15) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.w[0] <<= shift;
+            dst.w[1] <<= shift;
+            dst.w[2] <<= shift;
+            dst.w[3] <<= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 15)
@@ -98,18 +179,37 @@ opPSLLW_a32(uint32_t fetchdat)
             cpu_state.MM[cpu_reg].w[2] <<= shift;
             cpu_state.MM[cpu_reg].w[3] <<= shift;
         }
-
+    }
     return 0;
 }
 
 static int
 opPSRLW_a16(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 15) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.w[0] >>= shift;
+            dst.w[1] >>= shift;
+            dst.w[2] >>= shift;
+            dst.w[3] >>= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 15)
@@ -120,17 +220,36 @@ opPSRLW_a16(uint32_t fetchdat)
             cpu_state.MM[cpu_reg].w[2] >>= shift;
             cpu_state.MM[cpu_reg].w[3] >>= shift;
         }
-
+    }
     return 0;
 }
 static int
 opPSRLW_a32(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 15) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.w[0] >>= shift;
+            dst.w[1] >>= shift;
+            dst.w[2] >>= shift;
+            dst.w[3] >>= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 15)
@@ -141,18 +260,36 @@ opPSRLW_a32(uint32_t fetchdat)
             cpu_state.MM[cpu_reg].w[2] >>= shift;
             cpu_state.MM[cpu_reg].w[3] >>= shift;
         }
-
+    }
     return 0;
 }
 
 static int
 opPSRAW_a16(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 15) {
+            src.q = 15;
+        }
+        shift = src.b[0];
+        dst.sw[0] >>= shift;
+        dst.sw[1] >>= shift;
+        dst.sw[2] >>= shift;
+        dst.sw[3] >>= shift;
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 15)
@@ -162,17 +299,35 @@ opPSRAW_a16(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].sw[1] >>= shift;
         cpu_state.MM[cpu_reg].sw[2] >>= shift;
         cpu_state.MM[cpu_reg].sw[3] >>= shift;
-
+    }
     return 0;
 }
 static int
 opPSRAW_a32(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 15) {
+            src.q = 15;
+        }
+        shift = src.b[0];
+        dst.sw[0] >>= shift;
+        dst.sw[1] >>= shift;
+        dst.sw[2] >>= shift;
+        dst.sw[3] >>= shift;
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 15)
@@ -182,7 +337,7 @@ opPSRAW_a32(uint32_t fetchdat)
         cpu_state.MM[cpu_reg].sw[1] >>= shift;
         cpu_state.MM[cpu_reg].sw[2] >>= shift;
         cpu_state.MM[cpu_reg].sw[3] >>= shift;
-
+    }
     return 0;
 }
 
@@ -192,32 +347,69 @@ opPSxxD_imm(uint32_t fetchdat)
     int reg   = fetchdat & 7;
     int op    = fetchdat & 0x38;
     int shift = (fetchdat >> 8) & 0xff;
+    MMX_REG dst;
 
     cpu_state.pc += 2;
     MMX_ENTER();
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[reg].fraction;
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
     switch (op) {
         case 0x10: /*PSRLD*/
+            if (fpu_softfloat) {
+                if (shift > 31)
+                    dst.q = 0;
+                else {
+                    dst.l[0] >>= shift;
+                    dst.l[1] >>= shift;
+                }
+                fpu_state.st_space[reg].fraction = dst.q;
+                fpu_state.st_space[reg].exp = 0xffff;
+            } else {
                 if (shift > 31)
                     cpu_state.MM[reg].q = 0;
                 else {
                     cpu_state.MM[reg].l[0] >>= shift;
                     cpu_state.MM[reg].l[1] >>= shift;
                 }
+            }
             break;
         case 0x20: /*PSRAD*/
+            if (fpu_softfloat) {
+                if (shift > 31)
+                    shift = 31;
+                dst.sl[0] >>= shift;
+                dst.sl[1] >>= shift;
+                fpu_state.st_space[reg].fraction = dst.q;
+                fpu_state.st_space[reg].exp = 0xffff;
+            } else {
                 if (shift > 31)
                     shift = 31;
                 cpu_state.MM[reg].sl[0] >>= shift;
                 cpu_state.MM[reg].sl[1] >>= shift;
+            }
             break;
         case 0x30: /*PSLLD*/
+            if (fpu_softfloat) {
+                if (shift > 31)
+                    dst.q = 0;
+                else {
+                    dst.l[0] <<= shift;
+                    dst.l[1] <<= shift;
+                }
+                fpu_state.st_space[reg].fraction = dst.q;
+                fpu_state.st_space[reg].exp = 0xffff;
+            } else {
                 if (shift > 31)
                     cpu_state.MM[reg].q = 0;
                 else {
                     cpu_state.MM[reg].l[0] <<= shift;
                     cpu_state.MM[reg].l[1] <<= shift;
                 }
+            }
             break;
         default:
             cpu_state.pc = cpu_state.oldpc;
@@ -232,11 +424,28 @@ opPSxxD_imm(uint32_t fetchdat)
 static int
 opPSLLD_a16(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 31) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.l[0] <<= shift;
+            dst.l[1] <<= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 31)
@@ -245,17 +454,34 @@ opPSLLD_a16(uint32_t fetchdat)
             cpu_state.MM[cpu_reg].l[0] <<= shift;
             cpu_state.MM[cpu_reg].l[1] <<= shift;
         }
-
+    }
     return 0;
 }
 static int
 opPSLLD_a32(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 31) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.l[0] <<= shift;
+            dst.l[1] <<= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 31)
@@ -264,18 +490,35 @@ opPSLLD_a32(uint32_t fetchdat)
             cpu_state.MM[cpu_reg].l[0] <<= shift;
             cpu_state.MM[cpu_reg].l[1] <<= shift;
         }
-
+    }
     return 0;
 }
 
 static int
 opPSRLD_a16(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 31) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.l[0] >>= shift;
+            dst.l[1] >>= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 31)
@@ -284,17 +527,34 @@ opPSRLD_a16(uint32_t fetchdat)
             cpu_state.MM[cpu_reg].l[0] >>= shift;
             cpu_state.MM[cpu_reg].l[1] >>= shift;
         }
-
+    }
     return 0;
 }
 static int
 opPSRLD_a32(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 31) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.l[0] >>= shift;
+            dst.l[1] >>= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 31)
@@ -303,18 +563,34 @@ opPSRLD_a32(uint32_t fetchdat)
             cpu_state.MM[cpu_reg].l[0] >>= shift;
             cpu_state.MM[cpu_reg].l[1] >>= shift;
         }
-
+    }
     return 0;
 }
 
 static int
 opPSRAD_a16(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 31) {
+            src.q = 31;
+        }
+        shift = src.b[0];
+        dst.sl[0] >>= shift;
+        dst.sl[1] >>= shift;
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 31)
@@ -322,17 +598,33 @@ opPSRAD_a16(uint32_t fetchdat)
 
         cpu_state.MM[cpu_reg].sl[0] >>= shift;
         cpu_state.MM[cpu_reg].sl[1] >>= shift;
-
+    }
     return 0;
 }
 static int
 opPSRAD_a32(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 31) {
+            src.q = 31;
+        }
+        shift = src.b[0];
+        dst.sl[0] >>= shift;
+        dst.sl[1] >>= shift;
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 31)
@@ -340,7 +632,7 @@ opPSRAD_a32(uint32_t fetchdat)
 
         cpu_state.MM[cpu_reg].sl[0] >>= shift;
         cpu_state.MM[cpu_reg].sl[1] >>= shift;
-
+    }
     return 0;
 }
 
@@ -350,27 +642,59 @@ opPSxxQ_imm(uint32_t fetchdat)
     int reg   = fetchdat & 7;
     int op    = fetchdat & 0x38;
     int shift = (fetchdat >> 8) & 0xff;
+    MMX_REG dst;
 
     cpu_state.pc += 2;
     MMX_ENTER();
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[reg].fraction;
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+    }
 
     switch (op) {
         case 0x10: /*PSRLW*/
+            if (fpu_softfloat) {
+                if (shift > 63)
+                    dst.q = 0;
+                else
+                    dst.q >>= shift;
+
+                fpu_state.st_space[reg].fraction = dst.q;
+                fpu_state.st_space[reg].exp = 0xffff;
+            } else {
                 if (shift > 63)
                     cpu_state.MM[reg].q = 0;
                 else
                     cpu_state.MM[reg].q >>= shift;
+            }
             break;
         case 0x20: /*PSRAW*/
             if (shift > 63)
                 shift = 63;
+
+            if (fpu_softfloat) {
+                dst.sq >>= shift;
+                fpu_state.st_space[reg].fraction = dst.q;
+                fpu_state.st_space[reg].exp = 0xffff;
+            } else
                 cpu_state.MM[reg].sq >>= shift;
             break;
         case 0x30: /*PSLLW*/
+            if (fpu_softfloat) {
+                if (shift > 63)
+                    dst.q = 0;
+                else
+                    dst.q <<= shift;
+
+                fpu_state.st_space[reg].fraction = dst.q;
+                fpu_state.st_space[reg].exp = 0xffff;
+            } else {
                 if (shift > 63)
                     cpu_state.MM[reg].q = 0;
                 else
                     cpu_state.MM[reg].q <<= shift;
+            }
             break;
         default:
             cpu_state.pc = cpu_state.oldpc;
@@ -385,69 +709,133 @@ opPSxxQ_imm(uint32_t fetchdat)
 static int
 opPSLLQ_a16(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 63) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.q <<= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 63)
             cpu_state.MM[cpu_reg].q = 0;
         else
             cpu_state.MM[cpu_reg].q <<= shift;
-
+    }
     return 0;
 }
 static int
 opPSLLQ_a32(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 63) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.q <<= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 63)
             cpu_state.MM[cpu_reg].q = 0;
         else
             cpu_state.MM[cpu_reg].q <<= shift;
-
+    }
     return 0;
 }
 
 static int
 opPSRLQ_a16(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_16(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 63) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.q >>= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 63)
             cpu_state.MM[cpu_reg].q = 0;
         else
             cpu_state.MM[cpu_reg].q >>= shift;
-
+    }
     return 0;
 }
 static int
 opPSRLQ_a32(uint32_t fetchdat)
 {
+    MMX_REG src, dst;
     int shift;
 
     MMX_ENTER();
 
     fetch_ea_32(fetchdat);
+    if (fpu_softfloat) {
+        dst = *(MMX_REG *)&fpu_state.st_space[cpu_reg].fraction;
+        MMX_GETSRC();
+
+        fpu_state.tag = 0;
+        fpu_state.tos = 0; /* reset FPU Top-Of-Stack */
+        if (src.q > 63) {
+            dst.q = 0;
+        } else {
+            shift = src.b[0];
+            dst.q >>= shift;
+        }
+        fpu_state.st_space[cpu_reg].fraction = dst.q;
+        fpu_state.st_space[cpu_reg].exp = 0xffff;
+    } else {
         MMX_GETSHIFT();
 
         if (shift > 63)
             cpu_state.MM[cpu_reg].q = 0;
         else
             cpu_state.MM[cpu_reg].q >>= shift;
-
+    }
     return 0;
 }