From ee315970a1bfaa978b095f84905b5dc5d49ea957 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 9 Aug 2021 07:19:12 +0200 Subject: [PATCH] Correct implementation of the VIA write-only NVR register 0D bit that is read from power management PCI register 42, fixes the FIC VA-503A. --- src/chipset/via_pipc.c | 5 ++--- src/nvr_at.c | 5 +++++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/chipset/via_pipc.c b/src/chipset/via_pipc.c index f62775dc7..5b86c8d59 100644 --- a/src/chipset/via_pipc.c +++ b/src/chipset/via_pipc.c @@ -1122,9 +1122,8 @@ pipc_write(int func, int addr, uint8_t val, void *priv) break; case 0x42: - dev->power_regs[addr] &= ~0x2f; - dev->power_regs[addr] |= val & 0x2f; - acpi_set_irq_line(dev->acpi, dev->power_regs[addr]); + dev->power_regs[addr] = (dev->power_regs[addr] & 0xf0) | (val & 0x0f); + acpi_set_irq_line(dev->acpi, dev->power_regs[addr] & 0x0f); break; case 0x54: diff --git a/src/nvr_at.c b/src/nvr_at.c index bf188dbbf..ff1c6fcb0 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -589,6 +589,9 @@ nvr_reg_write(uint16_t reg, uint8_t val, void *priv) break; case RTC_REGD: /* R/O */ + /* This is needed for VIA, where writing to this register changes a write-only + bit whose value is read from power management register 42. */ + nvr->regs[RTC_REGD] = val & 0x80; break; case 0x2e: @@ -796,6 +799,8 @@ nvr_reset(nvr_t *nvr) nvr->regs[RTC_YEAR] = RTC_BCD(80); if (local->cent != 0xFF) nvr->regs[local->cent] = RTC_BCD(19); + + nvr->regs[RTC_REGD] = REGD_VRT; } /* Process after loading from file. */