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i686 MSR's C1 to C8 are all implemented now.

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OBattler
2016-12-25 23:42:48 +01:00
parent af6c83a59e
commit f01c61b813
1 changed files with 3 additions and 3 deletions
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6
src/cpu.c
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@@ -104,7 +104,7 @@ uint64_t mtrr_fix16k_a000_msr = 0;
uint64_t mtrr_fix4k_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0}; uint64_t mtrr_fix4k_msr[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t pat_msr = 0; uint64_t pat_msr = 0;
uint64_t mtrr_deftype_msr = 0; uint64_t mtrr_deftype_msr = 0;
uint64_t msr_ia32_pmc[4] = {0, 0, 0, 0}; uint64_t msr_ia32_pmc[8] = {0, 0, 0, 0, 0, 0, 0, 0};
uint64_t ecx17_msr = 0; uint64_t ecx17_msr = 0;
uint64_t ecx79_msr = 0; uint64_t ecx79_msr = 0;
uint64_t ecx8x_msr[4] = {0, 0, 0, 0}; uint64_t ecx8x_msr[4] = {0, 0, 0, 0};
@@ -1989,7 +1989,7 @@ void cpu_RDMSR()
EAX = ecx8x_msr[ECX - 0x88] & 0xffffffff; EAX = ecx8x_msr[ECX - 0x88] & 0xffffffff;
EDX = ecx8x_msr[ECX - 0x88] >> 32; EDX = ecx8x_msr[ECX - 0x88] >> 32;
break; break;
case 0xC1 ... 0xC4: case 0xC1 ... 0xC8:
EAX = msr_ia32_pmc[ECX - 0xC1] & 0xffffffff; EAX = msr_ia32_pmc[ECX - 0xC1] & 0xffffffff;
EDX = msr_ia32_pmc[ECX - 0xC1] >> 32; EDX = msr_ia32_pmc[ECX - 0xC1] >> 32;
break; break;
@@ -2192,7 +2192,7 @@ void cpu_WRMSR()
case 0x88 ... 0x8B: case 0x88 ... 0x8B:
ecx8x_msr[ECX - 0x88] = EAX | ((uint64_t)EDX << 32); ecx8x_msr[ECX - 0x88] = EAX | ((uint64_t)EDX << 32);
break; break;
case 0xC1 ... 0xC4: case 0xC1 ... 0xC8:
msr_ia32_pmc[ECX - 0xC1] = EAX | ((uint64_t)EDX << 32); msr_ia32_pmc[ECX - 0xC1] = EAX | ((uint64_t)EDX << 32);
break; break;
case 0xFE: case 0xFE: