diff --git a/src/chipset/stpc.c b/src/chipset/stpc.c
index 441ae487b..6541837cb 100644
--- a/src/chipset/stpc.c
+++ b/src/chipset/stpc.c
@@ -150,7 +150,7 @@ stpc_recalcmapping(stpc_t *dev)
 	}
     }
 
-    flushmmucache();
+    flushmmucache_nopc();
 }
 
 
diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c
index fbb67df1c..099e6d72e 100644
--- a/src/cpu/386_common.c
+++ b/src/cpu/386_common.c
@@ -306,6 +306,7 @@ enum SMMRAM_Fields_AMD_K {
 };
 
 
+#define ENABLE_386_COMMON_LOG 1
 #ifdef ENABLE_386_COMMON_LOG
 int x386_common_do_log = ENABLE_386_COMMON_LOG;
 
diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c
index b8709254a..5da0778ab 100644
--- a/src/cpu/cpu.c
+++ b/src/cpu/cpu.c
@@ -375,7 +375,7 @@ cpu_set(void)
     is_am486dxl  = (cpu_s->cpu_type == CPU_Am486DXL);
 
     cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel");
-    cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix");
+    cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST");
 
     /* SL-Enhanced Intel 486s have the same SMM save state table layout as Pentiums,
        and the WinChip datasheet claims those are Pentium-compatible as well. AMD Am486DXL/DXL2 also has compatible SMM, or would if not for it's different SMBase*/
@@ -385,7 +385,8 @@ cpu_set(void)
     is_k6        = (cpu_s->cpu_type >= CPU_K6) && !strcmp(cpu_f->manufacturer, "AMD");
     /* The Samuel 2 datasheet claims it's Celeron-compatible. */
     is_p6        = (cpu_isintel && (cpu_s->cpu_type >= CPU_PENTIUMPRO)) || !strcmp(cpu_f->manufacturer, "VIA");
-    is_cxsmm     = !strcmp(cpu_f->manufacturer, "Cyrix") && (cpu_s->cpu_type >= CPU_Cx486S);
+    is_cxsmm     = (!strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST")) &&
+		   (cpu_s->cpu_type >= CPU_Cx486S);
 
     hasfpu       = (fpu_type != FPU_NONE);
     hascache     = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC) ||
@@ -2962,7 +2963,7 @@ cpu_read(uint16_t addr, void *priv)
 	if ((cyrix_addr & 0xf0) == 0xc0)
 		return 0xff;
 
-	if (cyrix_addr == 0x20 && cpu_s->cpu_type == CPU_Cx5x86)
+	if (cyrix_addr == 0x20 && (cpu_s->cpu_type == CPU_Cx5x86))
 		return 0xff;
     }
 
diff --git a/src/cpu/cpu_table.c b/src/cpu/cpu_table.c
index 707c9299b..e40d64400 100644
--- a/src/cpu/cpu_table.c
+++ b/src/cpu/cpu_table.c
@@ -586,7 +586,7 @@ const cpu_family_t cpu_families[] = {
 	.name = "STPC-DX2",
 	.internal_name = "stpc_dx2",
 	.cpus = (const CPU[]) {
-		{"133",    CPU_STPC,    fpus_internal, 133333333, 2.0, 3300, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 14,14, 6, 6, 10},
+		{"133",    CPU_STPC,     fpus_internal, 133333333, 2.0, 3300, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 14,14, 6, 6, 10},
 		{"", 0}
 	}
     }, {