From f465066ed2d4c9846fe81b597d89c66a3fce9d07 Mon Sep 17 00:00:00 2001
From: OBattler <oubattler@gmail.com>
Date: Tue, 13 Oct 2020 21:49:55 +0200
Subject: [PATCH] The SMSC southbridge now initializes IDE regiters 0x45 and
 0x46 to the correct values.

---
 src/chipset/intel_piix.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/chipset/intel_piix.c b/src/chipset/intel_piix.c
index 2557c8a80..348cef814 100644
--- a/src/chipset/intel_piix.c
+++ b/src/chipset/intel_piix.c
@@ -1055,6 +1055,8 @@ piix_reset_hard(piix_t *dev)
     if (dev->type == 5) {
 	fregs[0x3c] = 0x0e;
 	fregs[0x3d] = 0x01;
+	fregs[0x45] = 0x55;
+	fregs[0x46] = 0x01;
     }
     if ((dev->type == 1) && (dev->rev == 2))
 	dev->max_func = 0;		/* It starts with IDE disabled, then enables it. */