80486DX2-66/86Box-fork
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Merge branch 'master' of https://github.com/86Box/86Box

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This commit is contained in:
RichardG867
2020-07-07 13:26:49 -03:00
parent 5b0e29d0ff 12167c1bba
commit f7e7359d2f
3 changed files with 39 additions and 38 deletions
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2
.github/FUNDING.yml vendored Normal file
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@@ -0,0 +1,2 @@
patreon: 86box
custom: ["https://paypal.me/86Box"]

3
README.md
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@@ -54,3 +54,6 @@ Donations
--------- ---------
We do not charge you for the emulator but donations are still welcome: We do not charge you for the emulator but donations are still welcome:
https://paypal.me/86Box. https://paypal.me/86Box.
You can now also support the project on Pateron:
https://www.patreon.com/86box.

72
src/chipset/opti283.c
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@@ -35,6 +35,9 @@
#include <86box/port_92.h> #include <86box/port_92.h>
#include <86box/chipset.h> #include <86box/chipset.h>
#define disabled_shadow (MEM_READ_EXTANY | MEM_WRITE_EXTANY)
typedef struct typedef struct
{ {
uint8_t index, uint8_t index,
@@ -43,54 +46,46 @@ typedef struct
static void opti283_shadow_recalc(opti283_t *dev) static void opti283_shadow_recalc(opti283_t *dev)
{ {
uint32_t base; uint32_t base, i;
uint32_t shflags, i = 0; uint32_t shflagsc, shflagsd, shflagse, shflagsf;
shadowbios = 0; shadowbios = !(dev->regs[0x11] & 0x80);
shadowbios_write = 0; shadowbios_write = (dev->regs[0x11] & 0x80);
if(dev->regs[0x11] & 0x10){
shflagsc = MEM_READ_INTERNAL;
shflagsc |= (dev->regs[0x11] & 0x08) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
} else shflagsc = disabled_shadow;
if(dev->regs[0x11] & 0x20){
shflagsd = MEM_READ_INTERNAL;
shflagsd |= (dev->regs[0x11] & 0x08) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
} else shflagsd = disabled_shadow;
if(dev->regs[0x11] & 0x40){
shflagse = MEM_READ_INTERNAL;
shflagse |= (dev->regs[0x11] & 0x08) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY;
} else shflagse = disabled_shadow;
/* F0000 - FFFFF segmentation */
if(!(dev->regs[0x11] & 0x80)){ if(!(dev->regs[0x11] & 0x80)){
shadowbios = 1; shflagsf = MEM_READ_INTERNAL | MEM_WRITE_DISABLED;
shadowbios_write = 0; } else shflagsf = MEM_READ_EXTANY | MEM_WRITE_INTERNAL;
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
} else { mem_set_mem_state_both(0xf0000, 0x10000, shflagsf);
shadowbios = 0;
shadowbios_write = 1;
mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL);
}
/* C0000 - CFFFF segmentation */
for(i = 4; i < 8; i++){ for(i = 4; i < 8; i++){
base = 0xc0000 + ((i-4) << 14); base = 0xc0000 + ((i-4) << 14);
mem_set_mem_state_both(base, 0x4000, (dev->regs[0x13] & (1 << i)) ? shflagsc : disabled_shadow);
if((dev->regs[0x13] & (1 << i)) & (dev->regs[0x11] & 0x10)){
shflags = MEM_READ_INTERNAL;
shflags |= (!(dev->regs[0x11] & 0x01)) ? MEM_WRITE_INTERNAL : MEM_WRITE_DISABLED;
mem_set_mem_state_both(base, 0x4000, shflags);
} else {
mem_set_mem_state_both(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
}
} }
/* D0000 - DFFFF segmentation */
for(i = 0; i < 4; i++){ for(i = 0; i < 4; i++){
base = 0xd0000 + (i << 14); base = 0xd0000 + (i << 14);
if((dev->regs[0x12] & (1 << i)) & (dev->regs[0x11] & 0x20)){ mem_set_mem_state_both(base, 0x4000, (dev->regs[0x12] & (1 << i)) ? shflagsd : disabled_shadow);
shflags = MEM_READ_INTERNAL;
shflags |= (!(dev->regs[0x11] & 0x02)) ? MEM_WRITE_INTERNAL : MEM_WRITE_DISABLED;
mem_set_mem_state(base, 0x4000, shflags);
} else mem_set_mem_state(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
} }
/* E0000 - EFFFF segmentation */
for(i = 4; i < 8; i++){ for(i = 4; i < 8; i++){
base = 0xe0000 + ((i-4) << 14); base = 0xe0000 + ((i-4) << 14);
if((dev->regs[0x12] & (1 << i)) & (dev->regs[0x11] & 0x40)){ mem_set_mem_state_both(base, 0x4000, (dev->regs[0x12] & (1 << i)) ? shflagse : disabled_shadow);
shflags = MEM_READ_INTERNAL;
shflags |= (!(dev->regs[0x11] & 0x04)) ? MEM_WRITE_INTERNAL : MEM_WRITE_DISABLED;
mem_set_mem_state(base, 0x4000, shflags);
} else mem_set_mem_state(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
} }
} }
@@ -105,12 +100,13 @@ opti283_write(uint16_t addr, uint8_t val, void *priv)
dev->index = val; dev->index = val;
break; break;
case 0x24: case 0x24:
/*pclog("OPTi 283: dev->regs[%02x] = %02x\n", dev->index, val);*/ /* pclog("OPTi 283: dev->regs[%02x] = %02x\n", dev->index, val); */
dev->regs[dev->index] = val; dev->regs[dev->index] = val;
switch(dev->index){ switch(dev->index){
case 0x10: case 0x10:
cpu_update_waitstates(); cpu_update_waitstates();
break;
case 0x11: case 0x11:
case 0x12: case 0x12: