80486DX2-66/86Box-fork
1
0
Fork 0
Code Issues Pull Requests Activity

Merge pull request #1267 from qeeg/sonarcloud-fixes

Browse Source 
Fixes to legitimate issues Sonarcloud caught in our code
This commit is contained in:
Miran Grča
2021-02-06 17:36:30 +01:00
committed by GitHub
parent b377927f9c b9dfd082e1
commit fbfde99b4a
5 changed files with 16 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/chipset/intel_4x0.c
View File

@@ -939,6 +939,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
regs[0x7c] = val & 0x1f; regs[0x7c] = val & 0x1f;
break; break;
} }
break;
case 0x7d: case 0x7d:
switch (dev->type) { switch (dev->type) {
case INTEL_420TX: case INTEL_420ZX: case INTEL_420TX: case INTEL_420ZX:
@@ -946,6 +947,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
regs[0x7d] = val & 0x32; regs[0x7d] = val & 0x32;
break; break;
} }
break;
case 0x7e: case 0x7f: case 0x7e: case 0x7f:
switch (dev->type) { switch (dev->type) {
case INTEL_420TX: case INTEL_420ZX: case INTEL_420TX: case INTEL_420ZX:
@@ -953,6 +955,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv)
regs[addr] = val; regs[addr] = val;
break; break;
} }
break;
case 0x80: case 0x80:
switch (dev->type) { switch (dev->type) {
case INTEL_440BX: case INTEL_440ZX: case INTEL_440BX: case INTEL_440ZX:

5
src/cpu/cpu.c
View File

@@ -2653,9 +2653,11 @@ void cpu_RDMSR()
{ {
case 0x1000: case 0x1000:
EAX = ibm_por_msr & 0xfeff; EAX = ibm_por_msr & 0xfeff;
break;
case 0x1001: case 0x1001:
EAX = ibm_crcr_msr & 0xffffffffff; EAX = ibm_crcr_msr & 0xffffffffff;
break;
} }
break; break;
@@ -2666,13 +2668,16 @@ void cpu_RDMSR()
{ {
case 0x1000: case 0x1000:
EAX = ibm_por_msr & 0xffeff; EAX = ibm_por_msr & 0xffeff;
break;
case 0x1001: case 0x1001:
EAX = ibm_crcr_msr & 0xffffffffff; EAX = ibm_crcr_msr & 0xffffffffff;
break;
if (cpu_s->multi) { if (cpu_s->multi) {
case 0x1002: case 0x1002:
EAX = ibm_por2_msr & 0x3f000000; EAX = ibm_por2_msr & 0x3f000000;
break;
} }
} }
break; break;

1
src/video/vid_ati28800.c
View File

@@ -265,6 +265,7 @@ ati28800k_out(uint16_t addr, uint8_t val, void *p)
} }
break; break;
} }
break;
default: default:
ati28800_out(oldaddr, val, p); ati28800_out(oldaddr, val, p);
break; break;

1
src/video/vid_cl54xx.c
View File

@@ -767,6 +767,7 @@ gd54xx_out(uint16_t addr, uint8_t val, void *p)
svga->seqregs[svga->seqaddr] &= 0x0f; svga->seqregs[svga->seqaddr] &= 0x0f;
if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429) if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)
svga->set_reset_disabled = svga->seqregs[7] & 1; svga->set_reset_disabled = svga->seqregs[7] & 1;
break;
case 0x17: case 0x17:
if (gd54xx_is_5422(svga)) if (gd54xx_is_5422(svga))
gd543x_recalc_mapping(gd54xx); gd543x_recalc_mapping(gd54xx);

6
src/video/vid_voodoo_reg.c
View File

@@ -1071,6 +1071,7 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
} }
break; break;
} }
break;
case SST_nccTable0_I2: case SST_nccTable0_I2:
if (!(val & (1 << 31))) if (!(val & (1 << 31)))
{ {
@@ -1086,6 +1087,7 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
} }
break; break;
} }
break;
case SST_nccTable0_Q0: case SST_nccTable0_Q0:
if (!(val & (1 << 31))) if (!(val & (1 << 31)))
{ {
@@ -1101,6 +1103,7 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
} }
break; break;
} }
break;
case SST_nccTable0_Q2: case SST_nccTable0_Q2:
if (!(val & (1 << 31))) if (!(val & (1 << 31)))
{ {
@@ -1147,6 +1150,7 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
} }
break; break;
} }
break;
case SST_nccTable0_I3: case SST_nccTable0_I3:
if (!(val & (1 << 31))) if (!(val & (1 << 31)))
{ {
@@ -1162,6 +1166,7 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
} }
break; break;
} }
break;
case SST_nccTable0_Q1: case SST_nccTable0_Q1:
if (!(val & (1 << 31))) if (!(val & (1 << 31)))
{ {
@@ -1177,6 +1182,7 @@ void voodoo_reg_writel(uint32_t addr, uint32_t val, void *p)
} }
break; break;
} }
break;
case SST_nccTable0_Q3: case SST_nccTable0_Q3:
if (!(val & (1 << 31))) if (!(val & (1 << 31)))
{ {