diff --git a/src/disc_img.c b/src/disc_img.c index 7278997b2..05c26fc03 100644 --- a/src/disc_img.c +++ b/src/disc_img.c @@ -362,6 +362,8 @@ void img_load(int drive, char *fn) /* The rest we just set directly from the BPB. */ img[drive].sectors = bpb_sectors; img[drive].sides = bpb_sides; + /* The sector size. */ + img[drive].sector_size = bpb_bps; /* Now we calculate bytes per track, which is bpb_sectors * bpb_bps. */ bpt = (uint32_t) bpb_sectors * (uint32_t) bpb_bps; /* Now we should be able to calculate the bit rate. */ diff --git a/src/vid_ati_mach64.c b/src/vid_ati_mach64.c index 6bb233ada..c139d2e3a 100644 --- a/src/vid_ati_mach64.c +++ b/src/vid_ati_mach64.c @@ -459,23 +459,19 @@ void mach64_updatemapping(mach64_t *mach64) break; } // if (mach64->linear_base) - if ((mach64->config_cntl & 3)) + if ((mach64->config_cntl & 3) && mach64->linear_base) { if ((mach64->config_cntl & 3) == 2) { /*8 MB aperture*/ - mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (8 << 20) - 0x4000); - mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((8 << 20) - 0x4000), 0x4000); - mach64->config_cntl &= 0x3ff0; - mach64->config_cntl |= ((mach64->linear_base >> 5) << 23); + mem_mapping_set_addr(&mach64->linear_mapping, (mach64->linear_base & 0xff800000), (8 << 20) - 0x4000); + mem_mapping_set_addr(&mach64->mmio_linear_mapping, (mach64->linear_base & 0xff800000) + ((8 << 20) - 0x4000), 0x4000); } else { /*4 MB aperture*/ - mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (4 << 20) - 0x4000); - mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((4 << 20) - 0x4000), 0x4000); - mach64->config_cntl &= 0x3ff0; - mach64->config_cntl |= ((mach64->linear_base >> 4) << 22); + mem_mapping_set_addr(&mach64->linear_mapping, (mach64->linear_base & 0xffc00000), (4 << 20) - 0x4000); + mem_mapping_set_addr(&mach64->mmio_linear_mapping, (mach64->linear_base & 0xffc00000) + ((4 << 20) - 0x4000), 0x4000); } } else @@ -1052,10 +1048,16 @@ void mach64_start_line(mach64_t *mach64) mach64->accel.op = OP_LINE; } +#if 0 #define READ(addr, dat, width) if (width == 0) dat = svga->vram[((addr)) & mach64->vram_mask]; \ else if (width == 1) dat = *(uint16_t *)&svga->vram[((addr) << 1) & mach64->vram_mask]; \ else if (width == 2) dat = *(uint32_t *)&svga->vram[((addr) << 2) & mach64->vram_mask]; \ else dat = (svga->vram[((addr) >> 3) & mach64->vram_mask] >> ((addr) & 7)) & 1; +#endif +#define READ(addr, dat, width) if (width == 0) dat = svga->vram[((addr)) % (mach64->vram_mask + 1)]; \ + else if (width == 1) dat = *(uint16_t *)&svga->vram[((addr) << 1) % (mach64->vram_mask + 1)]; \ + else if (width == 2) dat = *(uint32_t *)&svga->vram[((addr) << 2) % (mach64->vram_mask + 1)]; \ + else dat = (svga->vram[((addr) >> 3) % (mach64->vram_mask + 1)] >> ((addr) & 7)) & 1; #define MIX switch (mix ? mach64->accel.mix_fg : mach64->accel.mix_bg) \ { \ @@ -1077,28 +1079,36 @@ void mach64_start_line(mach64_t *mach64) case 0xf: dest_dat = ~(src_dat | dest_dat); break; \ } +#if 0 + if (dest_dat & 1) \ + svga->vram[((addr) >> 3) % (mach64->vram_mask + 1)] |= 1 << ((addr) & 7); \ + else \ + svga->vram[((addr) >> 3) % (mach64->vram_mask + 1)] &= ~(1 << ((addr) & 7)); \ + svga->changedvram[(((addr) >> 3) % (mach64->vram_mask + 1)) >> 12] = changeframecount; +#endif + #define WRITE(addr, width) if (width == 0) \ { \ - svga->vram[(addr) & mach64->vram_mask] = dest_dat; \ - svga->changedvram[((addr) & mach64->vram_mask) >> 12] = changeframecount; \ + svga->vram[(addr) % (mach64->vram_mask + 1)] = dest_dat; \ + svga->changedvram[((addr) % (mach64->vram_mask + 1)) >> 12] = changeframecount; \ } \ else if (width == 1) \ { \ - *(uint16_t *)&svga->vram[((addr) << 1) & mach64->vram_mask] = dest_dat; \ - svga->changedvram[(((addr) << 1) & mach64->vram_mask) >> 12] = changeframecount; \ + *(uint16_t *)&svga->vram[((addr) << 1) % (mach64->vram_mask + 1)] = dest_dat; \ + svga->changedvram[(((addr) << 1) % (mach64->vram_mask + 1)) >> 12] = changeframecount; \ } \ else if (width == 2) \ { \ - *(uint32_t *)&svga->vram[((addr) << 2) & mach64->vram_mask] = dest_dat; \ - svga->changedvram[(((addr) << 2) & mach64->vram_mask) >> 12] = changeframecount; \ + *(uint32_t *)&svga->vram[((addr) << 2) % (mach64->vram_mask + 1)] = dest_dat; \ + svga->changedvram[(((addr) << 2) % (mach64->vram_mask + 1)) >> 12] = changeframecount; \ } \ else \ { \ if (dest_dat & 1) \ - svga->vram[((addr) >> 3) & mach64->vram_mask] |= 1 << ((addr) & 7); \ + svga->vram[((addr) >> 3) % (mach64->vram_mask + 1)] |= 1 << ((addr) & 7); \ else \ - svga->vram[((addr) >> 3) & mach64->vram_mask] &= ~(1 << ((addr) & 7)); \ - svga->changedvram[(((addr) >> 3) & mach64->vram_mask) >> 12] = changeframecount; \ + svga->vram[((addr) >> 3) % (mach64->vram_mask + 1)] &= ~(1 << ((addr) & 7)); \ + svga->changedvram[(((addr) >> 3) % (mach64->vram_mask + 1)) >> 12] = changeframecount; \ } void mach64_blit(uint32_t cpu_dat, int count, mach64_t *mach64) @@ -1486,7 +1496,8 @@ void mach64_load_context(mach64_t *mach64) while (mach64->context_load_cntl & 0x30000) { - addr = ((0x3fff - (mach64->context_load_cntl & 0x3fff)) * 256) & mach64->vram_mask; + // addr = ((0x3fff - (mach64->context_load_cntl & 0x3fff)) * 256) & mach64->vram_mask; + addr = ((0x3fff - (mach64->context_load_cntl & 0x3fff)) * 256) % (mach64->vram_mask + 1); mach64->context_mask = *(uint32_t *)&svga->vram[addr]; #ifdef MACH64_DEBUG pclog("mach64_load_context %08X from %08X : mask %08X\n", mach64->context_load_cntl, addr, mach64->context_mask); @@ -2181,11 +2192,7 @@ uint8_t mach64_ext_inb(uint16_t port, void *p) break; case 0x6aec: case 0x6aed: case 0x6aee: case 0x6aef: - ; mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4); - /* if ((mach64->config_cntl & 3) == 2) - mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 23) << 5); - else - mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4); */ + mach64->config_cntl = (mach64->config_cntl & ~0x3ff0) | ((mach64->linear_base >> 22) << 4); READ8(port, mach64->config_cntl); break; @@ -2366,10 +2373,7 @@ void mach64_ext_outb(uint16_t port, uint8_t val, void *p) case 0x6aec: case 0x6aed: case 0x6aee: case 0x6aef: WRITE8(port, mach64->config_cntl, val); - if ((mach64->config_cntl & 3) == 2) - mach64->linear_base = ((mach64->config_cntl & 0x3fe0) >> 4) << 22; - else - mach64->linear_base = ((mach64->config_cntl & 0x3ff0) >> 4) << 22; + mach64->linear_base = ((mach64->config_cntl & 0x3ff0) >> 4) << 22; mach64_updatemapping(mach64); break; } @@ -2560,11 +2564,11 @@ void mach64_pci_write(int func, int addr, uint8_t val, void *p) break; case 0x12: - mach64->linear_base = (mach64->linear_base & 0xff000000) | ((val & 0x80) << 16); + mach64->linear_base = (mach64->linear_base & 0xff000000) | ((val & 0xc0) << 16); mach64_updatemapping(mach64); break; case 0x13: - mach64->linear_base = (mach64->linear_base & 0x800000) | (val << 24); + mach64->linear_base = (mach64->linear_base & 0xc00000) | (val << 24); mach64_updatemapping(mach64); break; @@ -2590,11 +2594,14 @@ void *mach64gx_init() int c; mach64_t *mach64 = malloc(sizeof(mach64_t)); memset(mach64, 0, sizeof(mach64_t)); + + uint32_t vram_amount = 0; mach64->vram_size = device_get_config_int("memory"); - mach64->vram_mask = (mach64->vram_size << 20) - 1; + vram_amount = (mach64-> vram_size == 0) ? (1 << 19) : (mach64->vram_size << 20); + mach64->vram_mask = vram_amount - 1; - svga_init(&mach64->svga, mach64, mach64->vram_size << 20, + svga_init(&mach64->svga, mach64, vram_amount, mach64_recalctimings, mach64_in, mach64_out, mach64_hwcursor_draw, @@ -2626,6 +2633,16 @@ void *mach64gx_init() mach64->dst_cntl = 3; + switch(mach64->vram_size) + { + case 0: default: mach64->mem_cntl = 0; break; + case 1: mach64->mem_cntl = 1; break; + case 2: mach64->mem_cntl = 2; break; + case 4: mach64->mem_cntl = 3; break; + case 6: mach64->mem_cntl = 4; break; + case 8: mach64->mem_cntl = 5; break; + } + mach64->wake_fifo_thread = thread_create_event(); mach64->fifo_not_full_event = thread_create_event(); mach64->fifo_thread = thread_create(fifo_thread, mach64); @@ -2717,6 +2734,10 @@ static device_config_t mach64gx_config[] = .type = CONFIG_SELECTION, .selection = { + { + .description = "512 kB", + .value = 0 + }, { .description = "1 MB", .value = 1 @@ -2729,6 +2750,10 @@ static device_config_t mach64gx_config[] = .description = "4 MB", .value = 4 }, + { + .description = "6 MB", + .value = 6 + }, { .description = "8 MB", .value = 8 diff --git a/src/vid_et4000w32.c b/src/vid_et4000w32.c index 1db1ff156..5b7533168 100644 --- a/src/vid_et4000w32.c +++ b/src/vid_et4000w32.c @@ -22,7 +22,7 @@ #define FIFO_ENTRY_SIZE (1 << 31) #define FIFO_ENTRIES (et4000->fifo_write_idx - et4000->fifo_read_idx) -#define FIFO_FULL ((et4000->fifo_write_idx - et4000->fifo_read_idx) >= FIFO_SIZE) +#define FIFO_FULL ((et4000->fifo_write_idx - et4000->fifo_read_idx) >= (FIFO_SIZE-1)) #define FIFO_EMPTY (et4000->fifo_read_idx == et4000->fifo_write_idx) #define FIFO_TYPE 0xff000000 @@ -475,8 +475,8 @@ static void et4000w32p_accel_write_fifo(et4000w32p_t *et4000, uint32_t addr, uin { et4000w32_blit(0xFFFFFF, ~0, 0, 0, et4000); } - /* if ((et4000->acl.queued.ctrl_routing & 0x40) && !(et4000->acl.internal.ctrl_routing & 3)) - et4000w32_blit(4, ~0, 0, 0, et4000); */ + if ((et4000->acl.queued.ctrl_routing & 0x40) && !(et4000->acl.internal.ctrl_routing & 3)) + et4000w32_blit(4, ~0, 0, 0, et4000); break; case 0x7fa4: et4000->acl.queued.mix_addr = (et4000->acl.queued.mix_addr & 0xFFFFFF00) | val; break; case 0x7fa5: et4000->acl.queued.mix_addr = (et4000->acl.queued.mix_addr & 0xFFFF00FF) | (val << 8); break; @@ -617,7 +617,6 @@ void et4000w32p_mmu_write(uint32_t addr, uint8_t val, void *p) if ((addr & 0x7fff) >= 0x7f80) { et4000w32p_queue(et4000, addr & 0x7fff, val, FIFO_WRITE_BYTE); - pclog("MMU queue: %04X: %02X\n", addr, val); } else switch (addr & 0x7fff) { @@ -634,8 +633,8 @@ void et4000w32p_mmu_write(uint32_t addr, uint8_t val, void *p) case 0x7f0a: et4000->mmu.base[2] = (et4000->mmu.base[2] & 0xFF00FFFF) | (val << 16); break; case 0x7f0d: et4000->mmu.base[2] = (et4000->mmu.base[2] & 0x00FFFFFF) | (val << 24); break; case 0x7f13: et4000->mmu.ctrl=val; break; - case 0x7f30: et4000->mmu.unk[0] = val; pclog("MMU Unknown 0 = %02X\n", et4000->mmu.unk[0]); break; - case 0x7f32: et4000->mmu.unk[1] = val; pclog("MMU Unknown 1 = %02X\n", et4000->mmu.unk[1]); break; + case 0x7f30: et4000->mmu.unk[0] = val; break; + case 0x7f32: et4000->mmu.unk[1] = val; break; } break; } @@ -877,21 +876,21 @@ void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et400 while (count--) { if (bltout) pclog("%i,%i : ", et4000->acl.internal.pos_x, et4000->acl.internal.pos_y); - pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & 0x1fffff]; - source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & 0x1fffff]; - if (bltout) pclog("%06X %06X ", (et4000->acl.pattern_addr + et4000->acl.pattern_x) & 0x1fffff, (et4000->acl.source_addr + et4000->acl.source_x) & 0x1fffff); + pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->max_ram_mask]; + source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & et4000->max_ram_mask]; + if (bltout) pclog("%06X %06X ", (et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->max_ram_mask, (et4000->acl.source_addr + et4000->acl.source_x) & et4000->max_ram_mask); if (cpu_input == 2) { source = sdat & 0xff; sdat >>= 8; } - dest = svga->vram[et4000->acl.dest_addr & 0x1fffff]; + dest = svga->vram[et4000->acl.dest_addr & et4000->max_ram_mask]; out = 0; if (bltout) pclog("%06X ", et4000->acl.dest_addr); if ((et4000->acl.internal.ctrl_routing & 0xa) == 8) { - mixdat = svga->vram[(et4000->acl.mix_addr >> 3) & 0x1fffff] & (1 << (et4000->acl.mix_addr & 7)); - if (bltout) pclog("%06X %02X ", et4000->acl.mix_addr, svga->vram[(et4000->acl.mix_addr >> 3) & 0x1fffff]); + mixdat = svga->vram[(et4000->acl.mix_addr >> 3) & et4000->max_ram_mask] & (1 << (et4000->acl.mix_addr & 7)); + if (bltout) pclog("%06X %02X ", et4000->acl.mix_addr, svga->vram[(et4000->acl.mix_addr >> 3) & et4000->max_ram_mask]); } else { @@ -908,11 +907,11 @@ void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et400 if (pattern & (1 << c)) d |= 4; if (rop & (1 << d)) out |= (1 << c); } - if (bltout) pclog("%06X = %02X\n", et4000->acl.dest_addr & 0x1fffff, out); + if (bltout) pclog("%06X = %02X\n", et4000->acl.dest_addr & et4000->max_ram_mask, out); if (!(et4000->acl.internal.ctrl_routing & 0x40)) { - svga->vram[et4000->acl.dest_addr & 0x1fffff] = out; - svga->changedvram[(et4000->acl.dest_addr & 0x1fffff) >> 12] = changeframecount; + svga->vram[et4000->acl.dest_addr & et4000->max_ram_mask] = out; + svga->changedvram[(et4000->acl.dest_addr & et4000->max_ram_mask) >> 12] = changeframecount; } else { @@ -997,22 +996,22 @@ void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et400 { if (bltout) pclog("%i,%i : ", et4000->acl.internal.pos_x, et4000->acl.internal.pos_y); - pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & 0x1fffff]; - source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & 0x1fffff]; - if (bltout) pclog("%i %06X %06X %02X %02X ", et4000->acl.pattern_y, (et4000->acl.pattern_addr + et4000->acl.pattern_x) & 0x1fffff, (et4000->acl.source_addr + et4000->acl.source_x) & 0x1fffff, pattern, source); + pattern = svga->vram[(et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->max_ram_mask]; + source = svga->vram[(et4000->acl.source_addr + et4000->acl.source_x) & et4000->max_ram_mask]; + if (bltout) pclog("%i %06X %06X %02X %02X ", et4000->acl.pattern_y, (et4000->acl.pattern_addr + et4000->acl.pattern_x) & et4000->max_ram_mask, (et4000->acl.source_addr + et4000->acl.source_x) & et4000->max_ram_mask, pattern, source); if (cpu_input == 2) { source = sdat & 0xff; sdat >>= 8; } - dest = svga->vram[et4000->acl.dest_addr & 0x1fffff]; + dest = svga->vram[et4000->acl.dest_addr & et4000->max_ram_mask]; out = 0; if (bltout) pclog("%06X %02X %i %08X %08X ", dest, et4000->acl.dest_addr, mix & 1, mix, et4000->acl.mix_addr); if ((et4000->acl.internal.ctrl_routing & 0xa) == 8) { - mixdat = svga->vram[(et4000->acl.mix_addr >> 3) & 0x1fffff] & (1 << (et4000->acl.mix_addr & 7)); - if (bltout) pclog("%06X %02X ", et4000->acl.mix_addr, svga->vram[(et4000->acl.mix_addr >> 3) & 0x1fffff]); + mixdat = svga->vram[(et4000->acl.mix_addr >> 3) & et4000->max_ram_mask] & (1 << (et4000->acl.mix_addr & 7)); + if (bltout) pclog("%06X %02X ", et4000->acl.mix_addr, svga->vram[(et4000->acl.mix_addr >> 3) & et4000->max_ram_mask]); } else { @@ -1029,11 +1028,11 @@ void et4000w32_blit(int count, uint32_t mix, uint32_t sdat, int cpu_input, et400 if (pattern & (1 << c)) d |= 4; if (rop & (1 << d)) out |= (1 << c); } - if (bltout) pclog("%06X = %02X\n", et4000->acl.dest_addr & 0x1fffff, out); + if (bltout) pclog("%06X = %02X\n", et4000->acl.dest_addr & et4000->max_ram_mask, out); if (!(et4000->acl.internal.ctrl_routing & 0x40)) { - svga->vram[et4000->acl.dest_addr & 0x1fffff] = out; - svga->changedvram[(et4000->acl.dest_addr & 0x1fffff) >> 12] = changeframecount; + svga->vram[et4000->acl.dest_addr & et4000->max_ram_mask] = out; + svga->changedvram[(et4000->acl.dest_addr & et4000->max_ram_mask) >> 12] = changeframecount; } else { @@ -1234,7 +1233,8 @@ void *et4000w32p_common_init(char *biosfile) et4000->interleaved = (vram_size == 2) ? 1 : 0; - et4000->max_ram_mask = (gfxcard == GFX_ET4000W32) ? 0x1fffff : 0x3fffff; + // et4000->max_ram_mask = (gfxcard == GFX_ET4000W32) ? 0x1fffff : 0x3fffff; + et4000->max_ram_mask = (vram_size << 20) - 1; // et4000->max_ram_mask = 0x1fffff; svga_init(&et4000->svga, et4000, vram_size << 20, diff --git a/src/vid_svga.c b/src/vid_svga.c index 0a4867752..e6fc2a84b 100644 --- a/src/vid_svga.c +++ b/src/vid_svga.c @@ -481,6 +481,18 @@ void svga_recalctimings(svga_t *svga) } extern int cyc_total; +uint32_t svga_mask_addr(uint32_t addr, svga_t *svga) +{ + if (svga->vrammask == (svga->vram_limit - 1)) + { + return addr % svga->vram_limit; + } + else + { + return addr & svga->vrammask; + } +} + void svga_poll(void *p) { svga_t *svga = (svga_t *)p; @@ -521,7 +533,7 @@ void svga_poll(void *p) { svga->hdisp_on=1; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); if (svga->firstline == 2000) { svga->firstline = svga->displine; @@ -599,7 +611,7 @@ void svga_poll(void *p) svga->maback += (svga->rowoffset << 3); if (svga->interlace) svga->maback += (svga->rowoffset << 3); - svga->maback &= svga->vrammask; + svga->maback = svga_mask_addr(svga->maback, svga); svga->ma = svga->maback; } else diff --git a/src/vid_svga_render.c b/src/vid_svga_render.c index 94fc7355e..e95700a9c 100644 --- a/src/vid_svga_render.c +++ b/src/vid_svga_render.c @@ -97,7 +97,7 @@ void svga_render_text_40(svga_t *svga) svga->ma += 4; p += xinc; } - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } } @@ -164,7 +164,7 @@ void svga_render_text_80(svga_t *svga) svga->ma += 4; p += xinc; } - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } } @@ -204,7 +204,7 @@ void svga_render_2bpp_lowres(svga_t *svga) dat[1] = svga->vram[(svga->ma << 1) + 1]; } svga->ma += 4; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); p[0] = p[1] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; p[2] = p[3] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; @@ -256,7 +256,7 @@ void svga_render_2bpp_highres(svga_t *svga) dat[1] = svga->vram[(svga->ma << 1) + 1]; } svga->ma += 4; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); p[0] = svga->pallook[svga->egapal[(dat[0] >> 6) & 3]]; p[1] = svga->pallook[svga->egapal[(dat[0] >> 4) & 3]]; @@ -294,7 +294,7 @@ void svga_render_4bpp_lowres(svga_t *svga) *(uint32_t *)(&edat[0]) = *(uint32_t *)(&svga->vram[svga->ma]); svga->ma += 4; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); p[0] = p[1] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; @@ -345,7 +345,7 @@ void svga_render_4bpp_highres(svga_t *svga) else *(uint32_t *)(&edat[0]) = *(uint32_t *)(&svga->vram[svga->ma]); svga->ma += 4; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); dat = edatlookup[edat[0] >> 6][edat[1] >> 6] | (edatlookup[edat[2] >> 6][edat[3] >> 6] << 2); p[0] = svga->pallook[svga->egapal[(dat >> 4) & svga->plane_mask]]; @@ -392,7 +392,7 @@ void svga_render_8bpp_lowres(svga_t *svga) svga->ma += 4; p += 8; } - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } // return NULL; @@ -431,7 +431,7 @@ void svga_render_8bpp_highres(svga_t *svga) svga->ma += 8; p += 8; } - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } // return NULL; @@ -465,7 +465,7 @@ void svga_render_15bpp_lowres(svga_t *svga) p[x + 1] = video_15to32[dat >> 16]; } svga->ma += x << 1; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } } @@ -503,7 +503,7 @@ void svga_render_15bpp_highres(svga_t *svga) p[x + 7] = video_15to32[dat >> 16]; } svga->ma += x << 1; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } } @@ -535,7 +535,7 @@ void svga_render_16bpp_lowres(svga_t *svga) p[x + 1] = video_16to32[dat >> 16]; } svga->ma += x << 1; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } } @@ -573,7 +573,7 @@ void svga_render_16bpp_highres(svga_t *svga) p[x + 7] = video_16to32[dat >> 16]; } svga->ma += x << 1; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } } @@ -596,7 +596,7 @@ void svga_render_24bpp_lowres(svga_t *svga) { fg = svga->vram[svga->ma] | (svga->vram[svga->ma + 1] << 8) | (svga->vram[svga->ma + 2] << 16); svga->ma += 3; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); ((uint32_t *)buffer32->line[svga->displine + y_add])[(x << 1) + offset + x_add] = ((uint32_t *)buffer32->line[svga->displine + y_add])[(x << 1) + 1 + offset + x_add] = fg; } } @@ -633,7 +633,7 @@ void svga_render_24bpp_highres(svga_t *svga) svga->ma += 12; } - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } } @@ -656,7 +656,7 @@ void svga_render_32bpp_lowres(svga_t *svga) { fg = svga->vram[svga->ma] | (svga->vram[svga->ma + 1] << 8) | (svga->vram[svga->ma + 2] << 16); svga->ma += 4; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); ((uint32_t *)buffer32->line[svga->displine + y_add])[(x << 1) + offset + x_add] = ((uint32_t *)buffer32->line[svga->displine + y_add])[(x << 1) + 1 + offset + x_add] = fg; } } @@ -685,7 +685,7 @@ void svga_render_32bpp_highres(svga_t *svga) p[x] = dat & 0xffffff; } svga->ma += 4; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } } @@ -710,7 +710,7 @@ void svga_render_ABGR8888_highres(svga_t *svga) p[x] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16); } svga->ma += 4; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } } @@ -735,6 +735,6 @@ void svga_render_RGBA8888_highres(svga_t *svga) p[x] = dat >> 8; } svga->ma += 4; - svga->ma &= svga->vrammask; + svga->ma = svga_mask_addr(svga->ma, svga); } }