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Author SHA1 Message Date
OBattler
7bff0cdc89 Fixed a typo in the CPU tables. 2020-09-23 07:23:38 +02:00
Miran Grča
fffb0bb0f8 Merge pull request #1009 from richardg867/master 
PCI bridge support
 2020-09-23 06:04:08 +02:00
Miran Grča
6de5713816 Merge pull request #1008 from anabate123/master 
CPU table changes
 2020-09-23 01:49:50 +02:00
anabate123
f97a7aadeb Update cpu_table.c 2020-09-22 19:38:24 -04:00
anabate123
fadbd807ef Update cpu_table.c 2020-09-22 19:32:07 -04:00
OBattler
62c7968906 Re-added the Sound Blaster PCI 128. 2020-09-23 01:26:23 +02:00
tiseno100
0f71ce7b5f Added 2 new XT machines 
Implemented the American XT computer and the Iskra 3104(A clone made in Belarusian SSR). Also removed the Goldstar 386 & the Unknown Headland 386SX board as they were very buggy and their purpose is now served by the much better Intel 82335 boards.
 2020-09-22 10:03:23 +03:00
Miran Grča
ab9f3744be Merge pull request #1004 from 86Box/tc1995 
Fixed multiple LUNs with WinXP's DC390/Am53c974 driver. Now only LUN …
 2020-09-21 00:42:14 +02:00
RichardG867
eb79cb1782 PCI/AGP bridge support, part 3 2020-09-20 19:13:09 -03:00
TC1995
844f09cdb1 Fixed multiple LUNs with WinXP's DC390/Am53c974 driver. Now only LUN 0 is supported there. 2020-09-20 23:59:25 +02:00
Daniel Gurney
513e51e7b9 Add links to mentioned GitHub users 2020-09-20 20:42:01 +03:00
Miran Grča
951fed5f02 Merge pull request #1003 from 86Box/tc1995 
Made the SCSI adapter ID selectable from the MCA POS and fixed the do…
 2020-09-20 19:36:18 +02:00
TC1995
549aacba44 Made the SCSI adapter ID selectable from the MCA POS and fixed the double drives bug in WinNT under said architecture. 2020-09-20 16:19:44 +02:00
RichardG867
f459c676c4 PCI/AGP bridge support, part 2: now with VIA 2020-09-19 01:29:35 -03:00
RichardG867
3314bd4035 PCI/AGP bridge support, part 1 2020-09-19 00:56:12 -03:00
RichardG867
e1865a1790 Fix IRQ steering tables for AGP systems 2020-09-19 00:52:45 -03:00
OBattler
4c983dd62b Fixed Power Management register handling on the PC87309 Super I/O chip. 2020-09-17 22:51:36 +02:00
OBattler
e3651391ae Fixed the reset value of Power Management register 0 on the PC87309 Super I/O chip, should fix the parallel port. 2020-09-17 22:49:47 +02:00
Miran Grča
b3abcba0a0 Merge pull request #1001 from tiseno100/master 
Some final touches on the Intel 82335
 2020-09-17 22:41:43 +02:00
tiseno100
99b60d6422 Delete mcr.c 
There's no need for that anymore.
 2020-09-17 18:57:52 +03:00
tiseno100
280e69fb0c Revert changes. Keep the humane methods of initialization on the Intel 82335. 
The issue with the ADI was caused by the incorrect lock status on early initialization.
 2020-09-16 17:59:33 +03:00
tiseno100
8464883e22 Brute set configuration on the Intel 82335 
Fixes the ADI 386SX freezing while booting an OS when shadowing is on.
 2020-09-16 17:52:09 +03:00
tiseno100
e5de57cffb Removed Port 92h off the Intel 82335 
The chipset doesn't seem to use it.
 2020-09-14 13:24:34 +03:00
tiseno100
a364b10a51 Disabled logging once again -_- 2020-09-14 13:20:19 +03:00
tiseno100
270b585854 Fixed some shadow issues on the Intel 82335 
The lock register determines also if Shadowing is RW or RO.
 2020-09-14 13:18:29 +03:00
tiseno100
1dd64678f7 Cap definition names 2020-09-13 16:23:09 +03:00
tiseno100
07cd6e0994 A tiny change on the commentary 2020-09-12 15:02:52 +03:00
tiseno100
5f3c976fbe Some final touches on the Intel 82335 
Most I could potentially implement are now complete
- Added some commentary
- switched some complex algorithms into definitions for the sake of the code being clean
- Implemented the ROM size determination register just for some Shadow RAM sanity
 2020-09-12 15:01:20 +03:00
Miran Grča
b0d17385bd Merge pull request #1000 from tiseno100/master 
Few more additional fixes on the Intel 82335
 2020-09-11 22:09:16 +02:00
tiseno100
00c70a83b7 Added the Base Memory set register on the Intel 82335 
Enables/Disables the top 128KB of base system memory.
 2020-09-11 13:19:02 +03:00
Miran Grča
43a2c2b15e Merge pull request #995 from qeeg/codegen 
Micro-optimizations for the AND and OR opcodes in the new dynarec
 2020-09-11 01:58:09 +02:00
Miran Grča
92ff0d7d39 Merge pull request #996 from richardg867/master 
ALi M6117 SoC implementation
 2020-09-11 01:56:54 +02:00
Miran Grča
97f7682e6f Merge pull request #998 from tiseno100/master 
Full Intel 82335 rewrite
 2020-09-11 01:56:40 +02:00
tiseno100
f582d4b432 Disabled logging again 2020-09-11 00:08:57 +03:00
tiseno100
2e7781505a Added more 82335 parts 
Registers are treated with an array instead of separate values.
Minor Shadowing changes and also implemented the chipset lock mechanism fixing the ADI soft reset issue properly.
 2020-09-10 23:56:51 +03:00
tiseno100
54c569e5be System ROM shadowing doesn't depend from the selected register. It actually depends on the Video RAM 
Also seems like the System ROM is RO. RW causes it to hang
 2020-09-10 19:55:11 +03:00
tiseno100
7a075e35e3 Disable logging 2020-09-10 19:50:53 +03:00
tiseno100
b36f3be457 Fixed soft reset failures of the ADI 386SX 2020-09-10 19:48:18 +03:00
tiseno100
0993643327 Delete the old Intel 82335 code 2020-09-10 19:47:41 +03:00
tiseno100
0e24c8883d Full Intel 82335 rewrite 
Fixes black screen when you shadow video RAM. More checks may be required to get MR 82335 to work properly.
 2020-09-10 15:48:43 +03:00
RichardG867
5b016edb2a Add non-working AMI M6117 machine 2020-09-08 22:54:30 -03:00
RichardG867
4107c2090e Fix M6117 clocking mistake; the CPU has a clock divider(!) 2020-09-08 22:19:36 -03:00
RichardG867
8d44f2e329 Remove unused M6117 SMRAM function 2020-09-08 22:10:35 -03:00
RichardG867
a129291a0d Change STPC CPU table to better values, more in line with the 486 CPU list and BIOS identification naming schemes 2020-09-08 22:10:13 -03:00
RichardG867
55b29db14b Finish M6117 implementation 2020-09-08 22:08:34 -03:00
RichardG867
dd2562f273 Fix machine table indentation trainwreck 2020-09-08 21:47:42 -03:00
RichardG867
4ca4ab76ae Merge branch 'master' of https://github.com/86Box/86Box 2020-09-08 21:44:28 -03:00
RichardG867
777a6d02e0 Indentation cleanups on STPC 2020-09-08 21:44:10 -03:00
RichardG867
a8c813cb4b Initial implementation of ALi M6117D 2020-09-08 21:43:54 -03:00
OBattler
2569bcbf43 Added a sanity check on write to PIIX4(E) DDMA base PCI registers. 2020-09-08 03:42:42 +02:00