343 lines
8.6 KiB
C
343 lines
8.6 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Emulation of the LG Prime3C Super I/O
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*
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* Authors: Tiseno100
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* Copyright 2020 Tiseno100
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*/
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#include <stdarg.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/io.h>
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#include <86box/timer.h>
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#include <86box/device.h>
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#include <86box/lpt.h>
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#include <86box/serial.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/sio.h>
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#ifdef ENABLE_PRIME3C_LOG
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int prime3c_do_log = ENABLE_PRIME3C_LOG;
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static void
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prime3c_log(const char *fmt, ...)
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{
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va_list ap;
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if (prime3c_do_log)
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{
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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#define prime3c_log(fmt, ...)
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#endif
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/* Function Select(Note on prime3c_enable) */
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#define FUNCTION_SELECT dev->regs[0xc2]
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/* Base Address Registers */
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#define FDC_BASE_ADDRESS dev->regs[0xc3]
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#define IDE_BASE_ADDRESS dev->regs[0xc4]
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#define IDE_SIDE_ADDRESS dev->regs[0xc5]
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#define LPT_BASE_ADDRESS dev->regs[0xc6]
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#define UART1_BASE_ADDRESS dev->regs[0xc7]
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#define UART2_BASE_ADDRESS dev->regs[0xc8]
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/* FDC/LPT Configuration */
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#define FDC_LPT_DMA dev->regs[0xc9]
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#define FDC_LPT_IRQ dev->regs[0xca]
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/* UART 1/2 Configuration */
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#define UART_IRQ dev->regs[0xcb]
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/* Miscellaneous Configuration*/
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#define FDC_SWAP (dev->regs[0xd6] & 0x01)
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/* IDE functionality(Note on Init) */
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#define HAS_IDE_FUNCTIONALITY dev->ide_function
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typedef struct
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{
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uint8_t index, regs[256], cfg_lock, ide_function;
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fdc_t *fdc_controller;
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serial_t *uart[2];
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} prime3c_t;
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void prime3c_fdc_handler(prime3c_t *dev);
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void prime3c_uart_handler(uint8_t num, prime3c_t *dev);
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void prime3c_lpt_handler(prime3c_t *dev);
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void prime3c_ide_handler(prime3c_t *dev);
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void prime3c_enable(prime3c_t *dev);
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static void
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prime3c_write(uint16_t addr, uint8_t val, void *priv)
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{
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prime3c_t *dev = (prime3c_t *)priv;
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switch (addr)
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{
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case 0x398:
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dev->index = val;
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/* Enter/Escape Configuration Mode */
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if (val == 0x33)
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dev->cfg_lock = 0;
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else if (val == 0x55)
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dev->cfg_lock = 1;
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break;
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case 0x399:
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if (!dev->cfg_lock)
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{
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switch (dev->index)
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{
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case 0xc2:
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FUNCTION_SELECT = val & 0xbf;
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prime3c_enable(dev);
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break;
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case 0xc3:
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FDC_BASE_ADDRESS = val & 0xfc;
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prime3c_fdc_handler(dev);
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break;
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case 0xc4:
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IDE_BASE_ADDRESS = val & 0xfc;
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if (HAS_IDE_FUNCTIONALITY)
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prime3c_ide_handler(dev);
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break;
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case 0xc5:
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IDE_SIDE_ADDRESS = (val & 0xfc) | 0x02;
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if (HAS_IDE_FUNCTIONALITY)
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prime3c_ide_handler(dev);
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break;
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case 0xc6:
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LPT_BASE_ADDRESS = val;
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break;
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case 0xc7:
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UART1_BASE_ADDRESS = val & 0xfe;
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prime3c_uart_handler(0, dev);
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break;
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case 0xc8:
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UART2_BASE_ADDRESS = val & 0xfe;
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prime3c_uart_handler(1, dev);
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break;
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case 0xc9:
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FDC_LPT_DMA = val;
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prime3c_fdc_handler(dev);
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break;
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case 0xca:
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FDC_LPT_IRQ = val;
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prime3c_fdc_handler(dev);
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prime3c_lpt_handler(dev);
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break;
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case 0xcb:
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UART_IRQ = val;
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prime3c_uart_handler(0, dev);
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prime3c_uart_handler(1, dev);
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break;
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case 0xcd:
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case 0xce:
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dev->regs[dev->index] = val;
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break;
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case 0xcf:
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dev->regs[dev->index] = val & 0x3f;
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break;
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case 0xd0:
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dev->regs[dev->index] = val & 0xfc;
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break;
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case 0xd1:
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dev->regs[dev->index] = val & 0x3f;
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break;
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case 0xd3:
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dev->regs[dev->index] = val & 0x7c;
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break;
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case 0xd5:
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case 0xd6:
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case 0xd7:
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case 0xd8:
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dev->regs[dev->index] = val;
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break;
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}
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}
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break;
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}
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}
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static uint8_t
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prime3c_read(uint16_t addr, void *priv)
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{
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prime3c_t *dev = (prime3c_t *)priv;
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return dev->regs[dev->index];
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}
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void prime3c_fdc_handler(prime3c_t *dev)
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{
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fdc_remove(dev->fdc_controller);
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if (FUNCTION_SELECT & 0x10)
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{
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fdc_set_base(dev->fdc_controller, FDC_BASE_ADDRESS << 2);
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fdc_set_irq(dev->fdc_controller, (FDC_LPT_IRQ >> 4) & 0xf);
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fdc_set_dma_ch(dev->fdc_controller, (FDC_LPT_DMA >> 4) & 0xf);
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fdc_set_swap(dev->fdc_controller, FDC_SWAP);
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prime3c_log("Prime3C-FDC: BASE %04x IRQ %01x DMA %01x\n", FDC_BASE_ADDRESS << 2, (FDC_LPT_IRQ >> 4) & 0xf, (FDC_LPT_DMA >> 4) & 0xf);
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}
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}
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void prime3c_uart_handler(uint8_t num, prime3c_t *dev)
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{
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serial_remove(dev->uart[num & 1]);
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if (FUNCTION_SELECT & (!(num & 1) ? 0x04 : 0x08))
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{
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serial_setup(dev->uart[num & 1], (!(num & 1) ? UART1_BASE_ADDRESS : UART2_BASE_ADDRESS) << 2, (UART_IRQ >> (!(num & 1) ? 4 : 0)) & 0xf);
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prime3c_log("Prime3C-UART%01x: BASE %04x IRQ %01x\n", num & 1, (!(num & 1) ? UART1_BASE_ADDRESS : UART2_BASE_ADDRESS) << 2, (UART_IRQ >> (!(num & 1) ? 4 : 0)) & 0xf);
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}
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}
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void prime3c_lpt_handler(prime3c_t *dev)
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{
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lpt1_remove();
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if (!(FUNCTION_SELECT & 0x03))
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{
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lpt1_init(LPT_BASE_ADDRESS << 2);
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lpt1_irq(FDC_LPT_IRQ & 0xf);
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prime3c_log("Prime3C-LPT: BASE %04x IRQ %02x\n", LPT_BASE_ADDRESS << 2, FDC_LPT_IRQ & 0xf);
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}
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}
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void prime3c_ide_handler(prime3c_t *dev)
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{
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ide_pri_disable();
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if (FUNCTION_SELECT & 0x20)
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{
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ide_set_base(0, IDE_BASE_ADDRESS << 2);
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ide_set_side(0, IDE_SIDE_ADDRESS << 2);
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ide_pri_enable();
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prime3c_log("Prime3C-IDE: BASE %04x SIDE %04x\n", IDE_BASE_ADDRESS << 2, IDE_SIDE_ADDRESS << 2);
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}
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}
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void prime3c_enable(prime3c_t *dev)
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{
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/*
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Simulate a device enable/disable scenario
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Register C2: Function Select
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Bit 7: Gameport
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Bit 6: Reserved
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Bit 5: IDE
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Bit 4: FDC
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Bit 3: UART 2
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Bit 2: UART 1
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Bit 1/0: PIO (0/0 Unidirectional , 0/1 ECP, 1/0 EPP, 1/1 Disabled)
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Note: 86Box LPT is simplistic and can't do ECP or EPP.
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*/
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!(FUNCTION_SELECT & 0x03) ? prime3c_lpt_handler(dev) : lpt1_remove();
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(FUNCTION_SELECT & 0x04) ? prime3c_uart_handler(0, dev) : serial_remove(dev->uart[0]);
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(FUNCTION_SELECT & 0x08) ? prime3c_uart_handler(1, dev) : serial_remove(dev->uart[1]);
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(FUNCTION_SELECT & 0x10) ? prime3c_fdc_handler(dev) : fdc_remove(dev->fdc_controller);
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if (HAS_IDE_FUNCTIONALITY)
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(FUNCTION_SELECT & 0x20) ? prime3c_ide_handler(dev) : ide_pri_disable();
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}
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static void
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prime3c_close(void *priv)
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{
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prime3c_t *dev = (prime3c_t *)priv;
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free(dev);
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}
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static void *
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prime3c_init(const device_t *info)
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{
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prime3c_t *dev = (prime3c_t *)malloc(sizeof(prime3c_t));
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memset(dev, 0, sizeof(prime3c_t));
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/* Avoid conflicting with machines that make no use of the Prime3C Internal IDE */
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HAS_IDE_FUNCTIONALITY = info->local;
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dev->regs[0xc0] = 0x3c;
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dev->regs[0xc2] = 0x03;
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dev->regs[0xc3] = 0x3c;
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dev->regs[0xc4] = 0x3c;
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dev->regs[0xc5] = 0x3d;
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dev->regs[0xd5] = 0x3c;
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dev->fdc_controller = device_add(&fdc_at_device);
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dev->uart[0] = device_add_inst(&ns16550_device, 1);
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dev->uart[1] = device_add_inst(&ns16550_device, 2);
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if (HAS_IDE_FUNCTIONALITY)
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device_add(&ide_isa_device);
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prime3c_fdc_handler(dev);
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prime3c_uart_handler(0, dev);
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prime3c_uart_handler(1, dev);
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prime3c_lpt_handler(dev);
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if (HAS_IDE_FUNCTIONALITY)
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prime3c_ide_handler(dev);
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io_sethandler(0x0398, 0x0002, prime3c_read, NULL, NULL, prime3c_write, NULL, NULL, dev);
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return dev;
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}
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const device_t prime3c_device = {
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"Goldstar Prime3C",
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0,
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0,
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prime3c_init,
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prime3c_close,
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NULL,
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{NULL},
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NULL,
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NULL,
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NULL};
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const device_t prime3c_ide_device = {
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"Goldstar Prime3C with IDE functionality",
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0,
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1,
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prime3c_init,
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prime3c_close,
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NULL,
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{NULL},
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NULL,
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NULL,
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NULL};
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