0faf6692c9
Changes to device_t struct to accomodate the upcoming PCI IRQ arbitration rewrite; Added device.c/h API to obtain name from the device_t struct; Significant changes to win/win_settings.c to clean up the code a bit and fix bugs; Ported all the CPU and AudioPCI commits from PCem; Added an API call to allow ACPI soft power off to gracefully stop the emulator; Removed the Siemens PCD-2L from the Dev branch because it now works; Removed the Socket 5 HP Vectra from the Dev branch because it now works; Fixed the Compaq Presario and the Micronics Spitfire; Give the IBM PC330 its own list of 486 CPU so it can have DX2's with CPUID 0x470; SMM fixes; Rewrote the SYSENTER, SYSEXIT, SYSCALL, and SYSRET instructions; Changed IDE reset period to match the specification, fixes #929; The keyboard input and output ports are now forced in front of the queue when read, fixes a number of bugs, including the AMI Apollo hanging on soft reset; Added the Intel AN430TX but Dev branched because it does not work; The network code no longer drops packets if the emulated network card has failed to receive them (eg. when the buffer is full); Changes to PCI card adding and renamed some PCI slot types, also added proper AGP bridge slot types; USB UHCI emulation is no longer a stub (still doesn't fully work, but at least Windows XP chk with Debug no longer ASSERT's on it); Fixed NVR on the the SMC FDC37C932QF and APM variants; A number of fixes to Intel 4x0 chipsets, including fixing every register of the 440LX and 440EX; Some ACPI changes.
306 lines
5.8 KiB
C
306 lines
5.8 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Emulation of the Intel 82019AA Super I/O chip.
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*
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*
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*
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* Author: Miran Grca, <mgrca8@gmail.com>
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* Copyright 2020 Miran Grca.
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*/
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include <86box/86box.h>
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#include <86box/io.h>
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#include <86box/timer.h>
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#include <86box/device.h>
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#include <86box/lpt.h>
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#include <86box/mem.h>
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#include <86box/nvr.h>
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#include <86box/pci.h>
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#include <86box/rom.h>
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#include <86box/serial.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/sio.h>
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typedef struct {
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uint8_t cur_reg, has_ide,
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regs[81];
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uint16_t base_address;
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fdc_t * fdc;
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serial_t * uart[2];
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} i82091aa_t;
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static void
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fdc_handler(i82091aa_t *dev)
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{
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fdc_remove(dev->fdc);
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if (dev->regs[0x10] & 0x01)
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fdc_set_base(dev->fdc, (dev->regs[0x10] & 0x02) ? 0x0370 : 0x03f0);
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}
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static void
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lpt1_handler(i82091aa_t *dev)
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{
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uint16_t lpt_port = 0x378;
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lpt1_remove();
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switch ((dev->regs[0x20] >> 1) & 0x03) {
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case 0x00:
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lpt_port = 0x378;
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break;
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case 1:
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lpt_port = 0x278;
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break;
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case 2:
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lpt_port = 0x3bc;
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break;
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case 3:
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lpt_port = 0x000;
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break;
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}
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if ((dev->regs[0x20] & 0x01) && lpt_port)
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lpt1_init(lpt_port);
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lpt1_irq((dev->regs[0x20] & 0x08) ? 7 : 5);
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}
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static void
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serial_handler(i82091aa_t *dev, int uart)
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{
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int reg = (0x30 + (uart << 4));
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uint16_t uart_port = 0x3f8;
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serial_remove(dev->uart[uart]);
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switch ((dev->regs[reg] >> 1) & 0x07) {
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case 0x00:
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uart_port = 0x3f8;
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break;
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case 0x01:
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uart_port = 0x2f8;
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break;
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case 0x02:
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uart_port = 0x220;
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break;
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case 0x03:
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uart_port = 0x228;
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break;
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case 0x04:
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uart_port = 0x238;
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break;
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case 0x05:
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uart_port = 0x2e8;
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break;
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case 0x06:
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uart_port = 0x338;
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break;
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case 0x07:
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uart_port = 0x3e8;
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break;
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}
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serial_setup(dev->uart[uart], uart_port, (dev->regs[reg] & 0x10) ? 4 : 3);
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}
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static void
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ide_handler(i82091aa_t *dev)
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{
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ide_sec_disable();
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ide_set_base(1, (dev->regs[0x50] & 0x02) ? 0x170 : 0x1f0);
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ide_set_side(1, (dev->regs[0x50] & 0x02) ? 0x376 : 0x3f6);
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if (dev->regs[0x50] & 0x01)
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ide_sec_enable();
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}
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static void
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i82091aa_write(uint16_t port, uint8_t val, void *priv)
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{
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i82091aa_t *dev = (i82091aa_t *) priv;
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uint8_t index, valxor;
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uint8_t uart = (dev->cur_reg >> 4) - 0x03;
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uint8_t *reg = &(dev->regs[dev->cur_reg]);
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index = (port & 1) ? 0 : 1;
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if (index) {
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dev->cur_reg = val;
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return;
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} else if (dev->cur_reg < 0x51)
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valxor = val ^ *reg;
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else if (dev->cur_reg >= 0x51)
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return;
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switch(dev->cur_reg) {
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case 0x02:
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*reg = (*reg & 0x78) | (val & 0x01);
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break;
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case 0x03:
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*reg = (val & 0xf8);
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break;
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case 0x10:
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*reg = (val & 0x83);
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if (valxor & 0x03)
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fdc_handler(dev);
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break;
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case 0x11:
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*reg = (val & 0x0f);
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if ((valxor & 0x04) && (val & 0x04))
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fdc_reset(dev->fdc);
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break;
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case 0x20:
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*reg = (val & 0xef);
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if (valxor & 0x07)
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lpt1_handler(dev);
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break;
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case 0x21:
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*reg = (val & 0x2f);
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break;
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case 0x30: case 0x40:
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*reg = (val & 0x9f);
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if (valxor & 0x1f)
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serial_handler(dev, uart);
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if (valxor & 0x80)
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serial_set_clock_src(dev->uart[uart], (val & 0x80) ? 2000000.0 : (24000000.0 / 13.0));
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break;
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case 0x31: case 0x41:
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*reg = (val & 0x1f);
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if ((valxor & 0x04) && (val & 0x04))
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serial_reset_port(dev->uart[uart]);
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break;
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case 0x50:
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*reg = (val & 0x07);
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if (dev->has_ide && (valxor & 0x03))
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ide_handler(dev);
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break;
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}
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}
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uint8_t
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i82091aa_read(uint16_t port, void *priv)
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{
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i82091aa_t *dev = (i82091aa_t *) priv;
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uint8_t ret = 0xff, index;
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index = (port & 1) ? 0 : 1;
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if (index)
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ret = dev->cur_reg;
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else if (dev->cur_reg < 0x51)
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ret = dev->regs[dev->cur_reg];
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return ret;
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}
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void
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i82091aa_reset(i82091aa_t *dev)
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{
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memset(dev->regs, 0x00, 81);
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dev->regs[0x00] = 0xa0;
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dev->regs[0x10] = 0x01;
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dev->regs[0x31] = dev->regs[0x41] = 0x02;
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dev->regs[0x50] = 0x01;
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fdc_reset(dev->fdc);
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fdc_handler(dev);
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lpt1_handler(dev);
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serial_handler(dev, 0);
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serial_handler(dev, 1);
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serial_set_clock_src(dev->uart[0], (24000000.0 / 13.0));
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serial_set_clock_src(dev->uart[1], (24000000.0 / 13.0));
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if (dev->has_ide)
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ide_handler(dev);
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}
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static void
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i82091aa_close(void *priv)
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{
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i82091aa_t *dev = (i82091aa_t *) priv;
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free(dev);
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}
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static void *
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i82091aa_init(const device_t *info)
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{
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i82091aa_t *dev = (i82091aa_t *) malloc(sizeof(i82091aa_t));
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memset(dev, 0, sizeof(i82091aa_t));
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dev->fdc = device_add(&fdc_at_device);
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dev->uart[0] = device_add_inst(&ns16550_device, 1);
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dev->uart[1] = device_add_inst(&ns16550_device, 2);
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dev->has_ide = !!(info->local & 0x200);
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i82091aa_reset(dev);
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dev->regs[0x02] = info->local & 0xff;
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if (info->local & 0x08)
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dev->base_address = (info->local & 0x100) ? 0x0398 : 0x0024;
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else
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dev->base_address = (info->local & 0x100) ? 0x026e : 0x0022;
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io_sethandler(dev->base_address, 0x0002,
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i82091aa_read, NULL, NULL, i82091aa_write, NULL, NULL, dev);
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return dev;
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}
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const device_t i82091aa_device = {
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"Intel 82091AA Super I/O",
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0,
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0x40,
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i82091aa_init, i82091aa_close, NULL,
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{ NULL }, NULL, NULL,
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NULL
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};
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const device_t i82091aa_398_device = {
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"Intel 82091AA Super I/O (Port 398h)",
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0,
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0x148,
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i82091aa_init, i82091aa_close, NULL,
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{ NULL }, NULL, NULL,
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NULL
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};
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const device_t i82091aa_ide_device = {
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"Intel 82091AA Super I/O (With IDE)",
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0,
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0x240,
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i82091aa_init, i82091aa_close, NULL,
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{ NULL }, NULL, NULL,
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NULL
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};
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