538 lines
14 KiB
C
538 lines
14 KiB
C
/*
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* 86Box A hypervisor and IBM PC system emulator that specializes in
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* running old operating systems and software designed for IBM
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* PC systems and compatibles from 1981 through fairly recent
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* system designs based on the PCI bus.
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*
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* This file is part of the 86Box distribution.
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*
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* Emulation of the Winbond W83787F/IF Super I/O Chip.
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*
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* Winbond W83787F Super I/O Chip
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* Used by the Award 430HX
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*
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*
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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* Copyright 2020 Miran Grca.
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*/
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#include <stdarg.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include <86box/timer.h>
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#include <86box/mem.h>
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#include <86box/lpt.h>
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#include <86box/serial.h>
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#include <86box/fdd.h>
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#include <86box/fdc.h>
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#include <86box/hdc.h>
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#include <86box/hdc_ide.h>
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#include <86box/gameport.h>
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#include <86box/sio.h>
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#ifdef ENABLE_W83787_LOG
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int w83787_do_log = ENABLE_W83787_LOG;
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static void
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w83787_log(const char *fmt, ...)
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{
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va_list ap;
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if (w83787_do_log) {
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va_start(ap, fmt);
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pclog_ex(fmt, ap);
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va_end(ap);
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}
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}
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#else
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# define w83787_log(fmt, ...)
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#endif
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#define FDDA_TYPE (dev->regs[7] & 3)
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#define FDDB_TYPE ((dev->regs[7] >> 2) & 3)
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#define FDDC_TYPE ((dev->regs[7] >> 4) & 3)
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#define FDDD_TYPE ((dev->regs[7] >> 6) & 3)
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#define FD_BOOT (dev->regs[8] & 3)
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#define SWWP ((dev->regs[8] >> 4) & 1)
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#define DISFDDWR ((dev->regs[8] >> 5) & 1)
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#define EN3MODE ((dev->regs[9] >> 5) & 1)
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#define DRV2EN_NEG (dev->regs[0xB] & 1) /* 0 = drive 2 installed */
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#define INVERTZ ((dev->regs[0xB] >> 1) & 1) /* 0 = invert DENSEL polarity */
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#define IDENT ((dev->regs[0xB] >> 3) & 1)
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#define HEFERE ((dev->regs[0xC] >> 5) & 1)
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#define HAS_IDE_FUNCTIONALITY dev->ide_function
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typedef struct w83787f_t {
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uint8_t tries;
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uint8_t regs[42];
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uint16_t reg_init;
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int locked;
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int rw_locked;
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int cur_reg;
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int key;
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int ide_function;
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int ide_start;
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fdc_t *fdc;
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serial_t *uart[2];
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void *gameport;
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} w83787f_t;
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static void w83787f_write(uint16_t port, uint8_t val, void *priv);
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static uint8_t w83787f_read(uint16_t port, void *priv);
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static void
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w83787f_remap(w83787f_t *dev)
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{
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io_removehandler(0x250, 0x0004,
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w83787f_read, NULL, NULL, w83787f_write, NULL, NULL, dev);
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io_sethandler(0x250, 0x0004,
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w83787f_read, NULL, NULL, w83787f_write, NULL, NULL, dev);
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dev->key = 0x88 | HEFERE;
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}
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#ifdef FIXME
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/* FIXME: Implement EPP (and ECP) parallel port modes. */
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static uint8_t
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get_lpt_length(w83787f_t *dev)
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{
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uint8_t length = 4;
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if (dev->regs[9] & 0x80) {
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if (dev->regs[0] & 0x04)
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length = 8; /* EPP mode. */
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if (dev->regs[0] & 0x08)
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length |= 0x80; /* ECP mode. */
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}
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return length;
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}
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#endif
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static void
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w83787f_serial_handler(w83787f_t *dev, int uart)
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{
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int urs0 = !!(dev->regs[1] & (1 << uart));
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int urs1 = !!(dev->regs[1] & (4 << uart));
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int urs2 = !!(dev->regs[3] & (8 >> uart));
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int urs;
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int irq = COM1_IRQ;
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uint16_t addr = COM1_ADDR;
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uint16_t enable = 1;
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urs = (urs1 << 1) | urs0;
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if (urs2) {
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addr = uart ? COM1_ADDR : COM2_ADDR;
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irq = uart ? COM1_IRQ : COM2_IRQ;
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} else {
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switch (urs) {
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case 0:
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addr = uart ? COM3_ADDR : COM4_ADDR;
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irq = uart ? COM3_IRQ : COM4_IRQ;
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break;
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case 1:
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addr = uart ? COM4_ADDR : COM3_ADDR;
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irq = uart ? COM4_IRQ : COM3_IRQ;
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break;
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case 2:
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addr = uart ? COM2_ADDR : COM1_ADDR;
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irq = uart ? COM2_IRQ : COM1_IRQ;
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break;
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case 3:
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default:
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enable = 0;
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break;
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}
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}
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if (dev->regs[4] & (0x20 >> uart))
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enable = 0;
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serial_remove(dev->uart[uart]);
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if (enable)
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serial_setup(dev->uart[uart], addr, irq);
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}
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static void
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w83787f_lpt_handler(w83787f_t *dev)
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{
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int ptras = (dev->regs[1] >> 4) & 0x03;
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int irq = LPT1_IRQ;
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uint16_t addr = LPT1_ADDR;
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uint16_t enable = 1;
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switch (ptras) {
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case 0x00:
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addr = LPT_MDA_ADDR;
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irq = LPT_MDA_IRQ;
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break;
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case 0x01:
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addr = LPT2_ADDR;
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irq = LPT2_IRQ;
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break;
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case 0x02:
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addr = LPT1_ADDR;
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irq = LPT1_IRQ;
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break;
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case 0x03:
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default:
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enable = 0;
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break;
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}
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if (dev->regs[4] & 0x80)
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enable = 0;
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lpt1_remove();
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if (enable) {
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lpt1_init(addr);
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lpt1_irq(irq);
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}
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}
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static void
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w83787f_gameport_handler(w83787f_t *dev)
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{
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if (!(dev->regs[3] & 0x40) && !(dev->regs[4] & 0x40))
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gameport_remap(dev->gameport, 0x201);
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else
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gameport_remap(dev->gameport, 0);
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}
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static void
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w83787f_fdc_handler(w83787f_t *dev)
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{
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fdc_remove(dev->fdc);
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if (!(dev->regs[0] & 0x20))
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fdc_set_base(dev->fdc, (dev->regs[0] & 0x10) ? FDC_PRIMARY_ADDR : FDC_SECONDARY_ADDR);
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fdc_set_power_down(dev->fdc, !!(dev->regs[6] & 0x08));
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}
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static void
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w83787f_ide_handler(w83787f_t *dev)
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{
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if (dev->ide_function & 0x20) {
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ide_sec_disable();
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if (!(dev->regs[0] & 0x80)) {
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ide_set_base(1, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170);
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ide_set_side(1, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376);
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ide_sec_enable();
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}
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} else {
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ide_pri_disable();
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if (!(dev->regs[0] & 0x80)) {
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ide_set_base(0, (dev->regs[0] & 0x40) ? 0x1f0 : 0x170);
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ide_set_side(0, (dev->regs[0] & 0x40) ? 0x3f6 : 0x376);
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ide_pri_enable();
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}
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}
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}
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static void
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w83787f_write(uint16_t port, uint8_t val, void *priv)
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{
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w83787f_t *dev = (w83787f_t *) priv;
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uint8_t valxor = 0;
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uint8_t max = 0x15;
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if (port == 0x250) {
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if (val == dev->key)
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dev->locked = 1;
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else
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dev->locked = 0;
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return;
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} else if (port == 0x251) {
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if (val <= max)
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dev->cur_reg = val;
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return;
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} else {
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if (dev->locked) {
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if (dev->rw_locked && (dev->cur_reg <= 0x0b))
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return;
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if (dev->cur_reg == 6)
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val &= 0xFB;
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valxor = val ^ dev->regs[dev->cur_reg];
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dev->regs[dev->cur_reg] = val;
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} else
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return;
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}
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switch (dev->cur_reg) {
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case 0:
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w83787_log("REG 00: %02X\n", val);
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if ((valxor & 0xc0) && (HAS_IDE_FUNCTIONALITY))
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w83787f_ide_handler(dev);
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if (valxor & 0x30)
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w83787f_fdc_handler(dev);
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if (valxor & 0x0c)
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w83787f_lpt_handler(dev);
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break;
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case 1:
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if (valxor & 0x80)
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fdc_set_swap(dev->fdc, (dev->regs[1] & 0x80) ? 1 : 0);
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if (valxor & 0x30)
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w83787f_lpt_handler(dev);
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if (valxor & 0x0a)
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w83787f_serial_handler(dev, 1);
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if (valxor & 0x05)
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w83787f_serial_handler(dev, 0);
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break;
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case 3:
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if (valxor & 0x80)
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w83787f_lpt_handler(dev);
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if (valxor & 0x40)
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w83787f_gameport_handler(dev);
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if (valxor & 0x08)
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w83787f_serial_handler(dev, 0);
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if (valxor & 0x04)
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w83787f_serial_handler(dev, 1);
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break;
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case 4:
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if (valxor & 0x10)
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w83787f_serial_handler(dev, 1);
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if (valxor & 0x20)
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w83787f_serial_handler(dev, 0);
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if (valxor & 0x80)
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w83787f_lpt_handler(dev);
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if (valxor & 0x40)
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w83787f_gameport_handler(dev);
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break;
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case 6:
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if (valxor & 0x08)
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w83787f_fdc_handler(dev);
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break;
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case 7:
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if (valxor & 0x03)
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fdc_update_rwc(dev->fdc, 0, FDDA_TYPE);
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if (valxor & 0x0c)
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fdc_update_rwc(dev->fdc, 1, FDDB_TYPE);
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if (valxor & 0x30)
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fdc_update_rwc(dev->fdc, 2, FDDC_TYPE);
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if (valxor & 0xc0)
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fdc_update_rwc(dev->fdc, 3, FDDD_TYPE);
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break;
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case 8:
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if (valxor & 0x03)
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fdc_update_boot_drive(dev->fdc, FD_BOOT);
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if (valxor & 0x10)
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fdc_set_swwp(dev->fdc, SWWP ? 1 : 0);
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if (valxor & 0x20)
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fdc_set_diswr(dev->fdc, DISFDDWR ? 1 : 0);
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break;
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case 9:
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if (valxor & 0x20)
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fdc_update_enh_mode(dev->fdc, EN3MODE ? 1 : 0);
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if (valxor & 0x40)
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dev->rw_locked = (val & 0x40) ? 1 : 0;
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if (valxor & 0x80)
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w83787f_lpt_handler(dev);
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break;
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case 0xB:
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w83787_log("Writing %02X to CRB\n", val);
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break;
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case 0xC:
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if (valxor & 0x20)
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w83787f_remap(dev);
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break;
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default:
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break;
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}
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}
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static uint8_t
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w83787f_read(uint16_t port, void *priv)
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{
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w83787f_t *dev = (w83787f_t *) priv;
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uint8_t ret = 0xff;
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if (dev->locked) {
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if (port == 0x251)
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ret = dev->cur_reg;
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else if (port == 0x252) {
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if (dev->cur_reg == 7)
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ret = (fdc_get_rwc(dev->fdc, 0) | (fdc_get_rwc(dev->fdc, 1) << 2));
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else if (!dev->rw_locked || (dev->cur_reg > 0x0b))
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ret = dev->regs[dev->cur_reg];
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}
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}
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return ret;
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}
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static void
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w83787f_reset(w83787f_t *dev)
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{
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uint16_t hefere = dev->reg_init & 0x0100;
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lpt1_remove();
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lpt1_init(LPT1_ADDR);
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lpt1_irq(LPT1_IRQ);
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memset(dev->regs, 0, 0x2A);
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if (HAS_IDE_FUNCTIONALITY) {
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if (dev->ide_function & 0x20) {
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dev->regs[0x00] = 0x90;
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ide_sec_disable();
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ide_set_base(1, 0x170);
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ide_set_side(1, 0x376);
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} else {
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dev->regs[0x00] = 0xd0;
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ide_pri_disable();
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ide_set_base(0, 0x1f0);
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ide_set_side(0, 0x3f6);
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}
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if (dev->ide_start) {
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dev->regs[0x00] &= 0x7f;
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if (dev->ide_function & 0x20)
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ide_sec_enable();
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else
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ide_pri_enable();
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}
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} else
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dev->regs[0x00] = 0xd0;
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fdc_reset(dev->fdc);
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w83787f_fdc_handler(dev);
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dev->regs[0x01] = 0x2C;
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dev->regs[0x03] = 0x70;
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dev->regs[0x07] = 0xF5;
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dev->regs[0x09] = dev->reg_init & 0xff;
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dev->regs[0x0a] = 0x1F;
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dev->regs[0x0c] = 0x0C | (hefere >> 3);
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dev->regs[0x0d] = 0xA3;
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gameport_remap(dev->gameport, 0);
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serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ);
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serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
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w83787f_lpt_handler(dev);
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dev->key = 0x88 | (hefere >> 8);
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w83787f_remap(dev);
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dev->locked = 0;
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dev->rw_locked = 0;
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}
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static void
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w83787f_close(void *priv)
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{
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w83787f_t *dev = (w83787f_t *) priv;
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free(dev);
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}
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static void *
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w83787f_init(const device_t *info)
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{
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w83787f_t *dev = (w83787f_t *) malloc(sizeof(w83787f_t));
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memset(dev, 0, sizeof(w83787f_t));
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HAS_IDE_FUNCTIONALITY = (info->local & 0x30);
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dev->fdc = device_add(&fdc_at_winbond_device);
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dev->uart[0] = device_add_inst(&ns16550_device, 1);
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dev->uart[1] = device_add_inst(&ns16550_device, 2);
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dev->gameport = gameport_add(&gameport_sio_1io_device);
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if ((dev->ide_function & 0x30) == 0x10)
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device_add(&ide_isa_device);
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dev->ide_start = !!(info->local & 0x40);
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dev->reg_init = info->local & 0x010f;
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w83787f_reset(dev);
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return dev;
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}
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const device_t w83787f_88h_device = {
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.name = "Winbond W83787F/IF Super I/O",
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.internal_name = "w83787f",
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.flags = 0,
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.local = 0x0009,
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.init = w83787f_init,
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.close = w83787f_close,
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.reset = NULL,
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{ .available = NULL },
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = NULL
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};
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const device_t w83787f_device = {
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.name = "Winbond W83787F/IF Super I/O",
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.internal_name = "w83787f",
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.flags = 0,
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.local = 0x0109,
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.init = w83787f_init,
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.close = w83787f_close,
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.reset = NULL,
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{ .available = NULL },
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = NULL
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};
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const device_t w83787f_ide_device = {
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.name = "Winbond W83787F/IF Super I/O (With IDE)",
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.internal_name = "w83787f_ide",
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.flags = 0,
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.local = 0x0119,
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.init = w83787f_init,
|
|
.close = w83787f_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t w83787f_ide_en_device = {
|
|
.name = "Winbond W83787F/IF Super I/O (With IDE Enabled)",
|
|
.internal_name = "w83787f_ide_en",
|
|
.flags = 0,
|
|
.local = 0x0159,
|
|
.init = w83787f_init,
|
|
.close = w83787f_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|
|
|
|
const device_t w83787f_ide_sec_device = {
|
|
.name = "Winbond W83787F/IF Super I/O (With Secondary IDE)",
|
|
.internal_name = "w83787f_ide_sec",
|
|
.flags = 0,
|
|
.local = 0x0139,
|
|
.init = w83787f_init,
|
|
.close = w83787f_close,
|
|
.reset = NULL,
|
|
{ .available = NULL },
|
|
.speed_changed = NULL,
|
|
.force_redraw = NULL,
|
|
.config = NULL
|
|
};
|