Cleaned up floppy code a lot and reverted to single poller; Fixed segment present bit and limit checking at read/write within segment; The ASUS boards now have memregs too; RTC code improved based on suggestion by Sarah Walker; Fixed SVGA odd/even emulation and added chain odd/even support; Removed non-existent CPU's.
59 lines
2.0 KiB
C
59 lines
2.0 KiB
C
#ifndef _TIMER_H_
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#define _TIMER_H_
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#include "cpu.h"
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extern int64_t timer_start;
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#define timer_start_period(cycles) \
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timer_start = cycles;
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#define timer_end_period(cycles) \
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do \
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{ \
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int64_t diff = timer_start - ((uint64_t) cycles); \
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timer_count -= diff; \
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timer_start = cycles; \
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if (timer_count <= 0) \
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{ \
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timer_process(); \
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timer_update_outstanding(); \
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} \
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} while (0)
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#define timer_clock() \
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do \
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{ \
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int64_t diff; \
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if (AT) \
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{ \
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diff = timer_start - (((uint64_t) cycles) << TIMER_SHIFT); \
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timer_start = ((uint64_t) cycles) << TIMER_SHIFT; \
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} \
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else \
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{ \
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diff = timer_start - (((uint64_t) cycles) * xt_cpu_multi); \
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timer_start = ((uint64_t) cycles) * xt_cpu_multi; \
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} \
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timer_count -= diff; \
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timer_process(); \
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timer_update_outstanding(); \
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} while (0)
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void timer_process();
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void timer_update_outstanding();
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void timer_reset();
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int timer_add(void (*callback)(void *priv), int64_t *count, int *enable, void *priv);
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void timer_set_callback(int timer, void (*callback)(void *priv));
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#define TIMER_ALWAYS_ENABLED &timer_one
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extern int64_t timer_count;
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extern int timer_one;
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#define TIMER_SHIFT 6
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extern int TIMER_USEC;
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#endif /*_TIMER_H_*/
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