235 lines
6.7 KiB
C
235 lines
6.7 KiB
C
static int opXCHG_b_a16(uint32_t fetchdat)
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{
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uint8_t temp;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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temp = geteab(); if (cpu_state.abrt) return 1;
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seteab(getr8(cpu_reg)); if (cpu_state.abrt) return 1;
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setr8(cpu_reg, temp);
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CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 3 : 5, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
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return 0;
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}
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static int opXCHG_b_a32(uint32_t fetchdat)
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{
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uint8_t temp;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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temp = geteab(); if (cpu_state.abrt) return 1;
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seteab(getr8(cpu_reg)); if (cpu_state.abrt) return 1;
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setr8(cpu_reg, temp);
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CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 3 : 5, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 1);
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return 0;
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}
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static int opXCHG_w_a16(uint32_t fetchdat)
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{
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uint16_t temp;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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temp = geteaw(); if (cpu_state.abrt) return 1;
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seteaw(cpu_state.regs[cpu_reg].w); if (cpu_state.abrt) return 1;
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cpu_state.regs[cpu_reg].w = temp;
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CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 3 : 5, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 0);
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return 0;
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}
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static int opXCHG_w_a32(uint32_t fetchdat)
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{
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uint16_t temp;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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temp = geteaw(); if (cpu_state.abrt) return 1;
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seteaw(cpu_state.regs[cpu_reg].w); if (cpu_state.abrt) return 1;
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cpu_state.regs[cpu_reg].w = temp;
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CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 3 : 5, 2, rmdat, (cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1,0, 1);
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return 0;
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}
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static int opXCHG_l_a16(uint32_t fetchdat)
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{
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uint32_t temp;
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fetch_ea_16(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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temp = geteal(); if (cpu_state.abrt) return 1;
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seteal(cpu_state.regs[cpu_reg].l); if (cpu_state.abrt) return 1;
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cpu_state.regs[cpu_reg].l = temp;
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CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 3 : 5, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 0);
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return 0;
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}
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static int opXCHG_l_a32(uint32_t fetchdat)
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{
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uint32_t temp;
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fetch_ea_32(fetchdat);
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if (cpu_mod != 3)
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SEG_CHECK_WRITE(cpu_state.ea_seg);
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temp = geteal(); if (cpu_state.abrt) return 1;
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seteal(cpu_state.regs[cpu_reg].l); if (cpu_state.abrt) return 1;
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cpu_state.regs[cpu_reg].l = temp;
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CLOCK_CYCLES((cpu_mod == 3) ? 3 : 5);
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PREFETCH_RUN((cpu_mod == 3) ? 3 : 5, 2, rmdat, 0,(cpu_mod == 3) ? 0:1,0,(cpu_mod == 3) ? 0:1, 1);
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return 0;
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}
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static int opXCHG_AX_BX(uint32_t fetchdat)
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{
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uint16_t temp = AX;
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AX = BX;
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BX = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_AX_CX(uint32_t fetchdat)
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{
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uint16_t temp = AX;
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AX = CX;
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CX = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_AX_DX(uint32_t fetchdat)
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{
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uint16_t temp = AX;
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AX = DX;
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DX = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_AX_SI(uint32_t fetchdat)
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{
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uint16_t temp = AX;
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AX = SI;
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SI = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_AX_DI(uint32_t fetchdat)
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{
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uint16_t temp = AX;
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AX = DI;
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DI = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_AX_BP(uint32_t fetchdat)
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{
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uint16_t temp = AX;
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AX = BP;
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BP = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_AX_SP(uint32_t fetchdat)
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{
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uint16_t temp = AX;
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AX = SP;
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SP = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_EAX_EBX(uint32_t fetchdat)
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{
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uint32_t temp = EAX;
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EAX = EBX;
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EBX = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_EAX_ECX(uint32_t fetchdat)
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{
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uint32_t temp = EAX;
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EAX = ECX;
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ECX = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_EAX_EDX(uint32_t fetchdat)
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{
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uint32_t temp = EAX;
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EAX = EDX;
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EDX = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_EAX_ESI(uint32_t fetchdat)
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{
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uint32_t temp = EAX;
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EAX = ESI;
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ESI = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_EAX_EDI(uint32_t fetchdat)
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{
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uint32_t temp = EAX;
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EAX = EDI;
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EDI = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_EAX_EBP(uint32_t fetchdat)
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{
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uint32_t temp = EAX;
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EAX = EBP;
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EBP = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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static int opXCHG_EAX_ESP(uint32_t fetchdat)
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{
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uint32_t temp = EAX;
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EAX = ESP;
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ESP = temp;
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CLOCK_CYCLES(3);
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PREFETCH_RUN(3, 1, -1, 0,0,0,0, 0);
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return 0;
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}
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#define opBSWAP(reg) \
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static int opBSWAP_ ## reg(uint32_t fetchdat) \
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{ \
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reg = (reg >> 24) | ((reg >> 8) & 0xff00) | ((reg << 8) & 0xff0000) | ((reg << 24) & 0xff000000); \
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CLOCK_CYCLES(1); \
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PREFETCH_RUN(1, 1, -1, 0,0,0,0, 0); \
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return 0; \
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}
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opBSWAP(EAX)
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opBSWAP(EBX)
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opBSWAP(ECX)
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opBSWAP(EDX)
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opBSWAP(ESI)
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opBSWAP(EDI)
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opBSWAP(EBP)
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opBSWAP(ESP)
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