From 06a4369f75e2791bd62426329b84e979c68f3279 Mon Sep 17 00:00:00 2001
From: mailwl <mailwl@gmail.com>
Date: Wed, 6 Apr 2016 14:57:43 +0300
Subject: [PATCH] Fix thumb ADR instruction alignment

---
 src/core/arm/dyncom/arm_dyncom_interpreter.cpp | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index 9ed61947e..a6faf42b9 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -3955,9 +3955,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
         if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
             add_inst* const inst_cream = (add_inst*)inst_base->component;
 
-            u32 rn_val = RN;
-            if (inst_cream->Rn == 15)
-                rn_val += 2 * cpu->GetInstructionSize();
+            u32 rn_val = CHECK_READ_REG15_WA(cpu, inst_cream->Rn);
 
             bool carry;
             bool overflow;
@@ -6167,9 +6165,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
         if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
             sub_inst* const inst_cream = (sub_inst*)inst_base->component;
 
-            u32 rn_val = RN;
-            if (inst_cream->Rn == 15)
-                rn_val += 2 * cpu->GetInstructionSize();
+            u32 rn_val = CHECK_READ_REG15_WA(cpu, inst_cream->Rn);
 
             bool carry;
             bool overflow;