midou/citra-shitamoto-network
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

Merge pull request #650 from Subv/scaling

Browse Source 
GPU: Fixed the bit 25 in the display transfer flags.
This commit is contained in:
bunnei 2015-03-17 19:13:06 -04:00
commit 580b317821
2 changed files with 16 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/core/hw/gpu.cpp
View File

@ -118,8 +118,14 @@ inline void Write(u32 addr, const T data) {
u8* src_pointer = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalInputAddress()));
u8* dst_pointer = Memory::GetPointer(Memory::PhysicalToVirtualAddress(config.GetPhysicalOutputAddress()));
unsigned horizontal_scale = (config.scale_horizontally != 0) ? 2 : 1;
unsigned vertical_scale = (config.scale_vertically != 0) ? 2 : 1;
if (config.scaling > config.ScaleXY) {
LOG_CRITICAL(HW_GPU, "Unimplemented display transfer scaling mode %u", config.scaling.Value());
UNIMPLEMENTED();
break;
}
unsigned horizontal_scale = (config.scaling != config.NoScale) ? 2 : 1;
unsigned vertical_scale = (config.scaling == config.ScaleXY) ? 2 : 1;
u32 output_width = config.output_width / horizontal_scale;
u32 output_height = config.output_height / vertical_scale;
@ -140,7 +146,7 @@ inline void Write(u32 addr, const T data) {
break;
}
// TODO(Subv): Blend the pixels when horizontal / vertical scaling is enabled,
// TODO(Subv): Implement the box filter when scaling is enabled
// right now we're just skipping the extra pixels.
for (u32 y = 0; y < output_height; ++y) {
for (u32 x = 0; x < output_width; ++x) {

9
src/core/hw/gpu.h
View File

@ -188,6 +188,12 @@ struct Regs {
BitField<16, 16, u32> input_height;
};
enum ScalingMode : u32 {
NoScale = 0, // Doesn't scale the image
ScaleX = 1, // Downscales the image in half in the X axis and applies a box filter
ScaleXY = 2, // Downscales the image in half in both the X and Y axes and applies a box filter
};
union {
u32 flags;
@ -197,8 +203,7 @@ struct Regs {
BitField< 8, 3, PixelFormat> input_format;
BitField<12, 3, PixelFormat> output_format;
BitField<24, 1, u32> scale_horizontally;
BitField<25, 1, u32> scale_vertically;
BitField<24, 2, ScalingMode> scaling; // Determines the scaling mode of the transfer
};
INSERT_PADDING_WORDS(0x1);