commit
9699194b54
@ -120,20 +120,15 @@ public:
|
||||
// A STL-like iterator is required to be able to use range-based for loops.
|
||||
class Iterator {
|
||||
public:
|
||||
Iterator(const Iterator& other) : m_val(other.m_val), m_bit(other.m_bit) {}
|
||||
Iterator(IntTy val) : m_val(val), m_bit(0) {}
|
||||
Iterator& operator=(Iterator other) {
|
||||
new (this) Iterator(other);
|
||||
return *this;
|
||||
}
|
||||
Iterator(const Iterator& other) : m_val(other.m_val) {}
|
||||
Iterator(IntTy val) : m_val(val) {}
|
||||
int operator*() {
|
||||
return m_bit + ComputeLsb();
|
||||
// This will never be called when m_val == 0, because that would be the end() iterator
|
||||
return LeastSignificantSetBit(m_val);
|
||||
}
|
||||
Iterator& operator++() {
|
||||
int lsb = ComputeLsb();
|
||||
m_val >>= lsb + 1;
|
||||
m_bit += lsb + 1;
|
||||
m_has_lsb = false;
|
||||
// Unset least significant set bit
|
||||
m_val &= m_val - IntTy(1);
|
||||
return *this;
|
||||
}
|
||||
Iterator operator++(int _) {
|
||||
@ -149,17 +144,7 @@ public:
|
||||
}
|
||||
|
||||
private:
|
||||
int ComputeLsb() {
|
||||
if (!m_has_lsb) {
|
||||
m_lsb = LeastSignificantSetBit(m_val);
|
||||
m_has_lsb = true;
|
||||
}
|
||||
return m_lsb;
|
||||
}
|
||||
IntTy m_val;
|
||||
int m_bit;
|
||||
int m_lsb = -1;
|
||||
bool m_has_lsb = false;
|
||||
};
|
||||
|
||||
BitSet() : m_val(0) {}
|
||||
|
@ -77,13 +77,18 @@ void UnitState::LoadInput(const ShaderRegs& config, const AttributeBuffer& input
|
||||
}
|
||||
}
|
||||
|
||||
void UnitState::WriteOutput(const ShaderRegs& config, AttributeBuffer& output) {
|
||||
unsigned int output_i = 0;
|
||||
for (unsigned int reg : Common::BitSet<u32>(config.output_mask)) {
|
||||
output.attr[output_i++] = registers.output[reg];
|
||||
static void CopyRegistersToOutput(const Math::Vec4<float24>* regs, u32 mask,
|
||||
AttributeBuffer& buffer) {
|
||||
int output_i = 0;
|
||||
for (int reg : Common::BitSet<u32>(mask)) {
|
||||
buffer.attr[output_i++] = regs[reg];
|
||||
}
|
||||
}
|
||||
|
||||
void UnitState::WriteOutput(const ShaderRegs& config, AttributeBuffer& output) {
|
||||
CopyRegistersToOutput(registers.output, config.output_mask, output);
|
||||
}
|
||||
|
||||
UnitState::UnitState(GSEmitter* emitter) : emitter_ptr(emitter) {}
|
||||
|
||||
GSEmitter::GSEmitter() {
|
||||
@ -94,19 +99,16 @@ GSEmitter::~GSEmitter() {
|
||||
delete handlers;
|
||||
}
|
||||
|
||||
void GSEmitter::Emit(Math::Vec4<float24> (&vertex)[16]) {
|
||||
void GSEmitter::Emit(Math::Vec4<float24> (&output_regs)[16]) {
|
||||
ASSERT(vertex_id < 3);
|
||||
std::copy(std::begin(vertex), std::end(vertex), buffer[vertex_id].begin());
|
||||
// TODO: This should be merged with UnitState::WriteOutput somehow
|
||||
CopyRegistersToOutput(output_regs, output_mask, buffer[vertex_id]);
|
||||
|
||||
if (prim_emit) {
|
||||
if (winding)
|
||||
handlers->winding_setter();
|
||||
for (size_t i = 0; i < buffer.size(); ++i) {
|
||||
AttributeBuffer output;
|
||||
unsigned int output_i = 0;
|
||||
for (unsigned int reg : Common::BitSet<u32>(output_mask)) {
|
||||
output.attr[output_i++] = buffer[i][reg];
|
||||
}
|
||||
handlers->vertex_handler(output);
|
||||
handlers->vertex_handler(buffer[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -72,7 +72,7 @@ static_assert(sizeof(OutputVertex) == 24 * sizeof(float), "OutputVertex has inva
|
||||
* This structure contains state information for primitive emitting in geometry shader.
|
||||
*/
|
||||
struct GSEmitter {
|
||||
std::array<std::array<Math::Vec4<float24>, 16>, 3> buffer;
|
||||
std::array<AttributeBuffer, 3> buffer;
|
||||
u8 vertex_id;
|
||||
bool prim_emit;
|
||||
bool winding;
|
||||
@ -87,7 +87,7 @@ struct GSEmitter {
|
||||
|
||||
GSEmitter();
|
||||
~GSEmitter();
|
||||
void Emit(Math::Vec4<float24> (&vertex)[16]);
|
||||
void Emit(Math::Vec4<float24> (&output_regs)[16]);
|
||||
};
|
||||
static_assert(std::is_standard_layout<GSEmitter>::value, "GSEmitter is not standard layout type");
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user