citra-shitamoto-network/src/core/arm
Lioncash d53c9cde1a armstate: Correct FIQ register banking
FIQ has seven banked registers (R8 to R14), not two.
2016-03-21 18:56:27 -04:00
..
disassembler ARM_Disasm::DisassembleMemHalf: actually use width in determining opcode name 2016-01-19 18:42:16 +01:00
dyncom arm_dyncom_dec: Fix decoding of VMLS 2015-12-30 14:23:07 -05:00
skyeye_common armstate: Correct FIQ register banking 2016-03-21 18:56:27 -04:00
arm_interface.h arm_interface: Make GetNumInstructions const 2015-12-06 15:07:59 -05:00