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99eedced4a
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81 Commits

Author SHA1 Message Date
Lioncash
99eedced4a core/memory: Fix #5246 
We can simplify the overload sent to be less confusing (and
error-prone), while also unbreaking 32-bit builds.
 2020-04-19 01:56:03 -04:00
Hamish Milne
92640fc29c Code review actions (plus hopefully fix the linux CI) 2020-03-31 17:54:28 +01:00
James Rowe
55c75b5e3e Add ClearAll to rasterizer cache for fully wiping the cache on save/load 2020-02-13 17:42:11 +08:00
Hamish Milne
96432589bd Use shared_ptr for PageTable 2020-02-13 17:42:04 +08:00
Hamish Milne
65d96bf6c1 Changed u8* to MemoryRef 2020-02-13 17:42:00 +08:00
Hamish Milne
26e90a99cd Added basic UI; misc memory fixes 2020-02-13 17:41:27 +08:00
Hamish Milne
7b846ffa98 clang-format fixes 2020-02-13 17:39:15 +08:00
Hamish Milne
ee2cae2093 Added core serialization 2020-02-13 17:34:13 +08:00
Hamish Milne
6940c99ed6 Added boost serialization 2020-02-13 17:27:50 +08:00
bamsbamx
ac9755306c cpu_core: Separate cpu_core and memory 
This makes cpu_core and memory being completely independent components inside the system, having a simpler and more understandable initialization process
The thread which casues page table changes in memory will be responsible to notify the cpu_core too
 2019-06-22 18:21:50 +02:00
MerryMage
065d3ce063 memory: Reorder parameters of CopyBlock to a more sensible order 
* Also implement CopyBlock variants in terms of each other
 2019-04-19 19:46:09 +01:00
Weiyi Wang
ea496507d5 DSP_DSP: use member system instead of global instance 2019-03-13 10:23:58 -04:00
Weiyi Wang
9573ee46bd Memory: replace Core::CPU 2019-02-14 14:04:46 -05:00
Weiyi Wang
88161b8ac6 Memory: register page tables into a list for rasterizer cache marking 2018-12-10 22:13:10 -05:00
Weiyi Wang
643b7d4dcb Memory: move memory setup into MemorySystem 2018-12-10 22:01:09 -05:00
Weiyi Wang
7e8ba6ed8e Memory: move memory chunk into pImpl and make them dynamically allocated 
Otherwise MSVC would give out-of-memory error on compile time
 2018-12-06 13:30:47 -05:00
Weiyi Wang
c6b3186475 Memory: IsValidVirtualAddress can be global 2018-12-05 20:21:14 -05:00
Weiyi Wang
42edab01d9 Memory: move states into class 2018-12-05 20:21:14 -05:00
Weiyi Wang
d18cda5a5d Memory: move MarkRegionCached into class 2018-12-05 20:21:14 -05:00
Weiyi Wang
2582d64fb3 Memory: move block operations into class 2018-12-05 20:21:14 -05:00
Weiyi Wang
323990d402 Memory: move Read/Write8/16/32/64 and ReadCString into class 2018-12-05 20:21:14 -05:00
Weiyi Wang
76e0a4ece7 Memory: move GetPointer into class 2018-12-05 20:21:14 -05:00
Weiyi Wang
405218c3a7 Memory: move IsValidVirtualAddress into class 2018-12-05 20:21:14 -05:00
Weiyi Wang
296c458e0e Memory: move GetPhysicalPointer and IsValidPhysicalAddress into class 2018-12-05 20:21:14 -05:00
Weiyi Wang
8c618c3fc3 Memory: move PageTable functions into class 2018-12-05 20:16:42 -05:00
Weiyi Wang
b199b7ada9 Memory: move GetFCRAMOffset into MemorySystem 2018-12-05 20:16:42 -05:00
Weiyi Wang
6992f76acf Memory: create MemorySystem class 2018-12-05 20:16:42 -05:00
Weiyi Wang
7e90abec78
Merge pull request #4442 from wwylele/memory-no-kernel 
Memory: decouple from Kernel
 2018-11-28 11:24:41 -05:00
BreadFish64
f4472a10e6 core: undef PAGE_SIZE and PAGE_MASK 
these are defined a system header which causes complications when building for android
 2018-11-20 14:24:19 -05:00
Weiyi Wang
679dfd7cdf Memory: remove CopyBlock with current process 2018-11-19 11:16:55 -05:00
Weiyi Wang
185a83f06d Memory: remove ZeroBlock with current process 2018-11-19 11:16:55 -05:00
Weiyi Wang
4e99641a3b Memory: remove WriteBlock with current process 2018-11-19 11:16:55 -05:00
Weiyi Wang
8871f5a4ac Memory: remove ReadBlock with current process 2018-11-19 11:16:55 -05:00
Weiyi Wang
7308b8d294 Memory: remove IsValidVirtualAddress with current process 2018-11-19 11:16:55 -05:00
Weiyi Wang
9e8d149ca7 Memory: remove unused VirtualToPhysical 2018-11-13 11:56:05 -05:00
Weiyi Wang
b1f55c9cab
Merge pull request #4429 from wwylele/io-size 
Memory: IO area is at most 4MB
 2018-11-13 11:09:14 -05:00
Weiyi Wang
194118011a Memory: IO area is at most 4MB 2018-11-12 15:12:12 -05:00
Weiyi Wang
2654a679b3 Memory: replace PhysicalToVirtualAddress with a more dedicated function 
There is no external use of PhysicalToVirtualAddress any more, so it there is no need to have a generic function that handles all physical regions. Also, the previous APT change makes it possible that linear heap has some regions mapped to old and new VAddr regions at the same time, so we need to check both region and mark cached for the mapped one. RasterizerMarkRegionCached would skip the unmapped one in its loop
 2018-11-08 00:19:57 -05:00
Weiyi Wang
2067946f59
Kernel: reimplement memory management on physical FCRAM (#4392) 
* Kernel: reimplement memory management on physical FCRAM

* Kernel/Process: Unmap does not care the source memory permission

What game usually does is after mapping the memory, they reprotect the source memory as no permission to avoid modification there

* Kernel/SharedMemory: zero initialize new-allocated memory

* Process/Thread: zero new TLS entry

* Kernel: fix a bug where code segments memory usage are accumulated twice

It is added to both misc and heap (done inside HeapAlloc), which results a doubled number reported by svcGetProcessInfo. While we are on it, we just merge the three number misc, heap and linear heap usage together, as there is no where they are distinguished.

Question: is TLS page also added to this number?

* Kernel/SharedMemory: add more object info on mapping error

* Process: lower log level; SharedMemory: store phys offset

* VMManager: add helper function to retrieve backing block list for a range
 2018-11-06 15:00:47 -05:00
Weiyi Wang
a753b9c6cc
Merge pull request #4228 from NarcolepticK/lle-mapped-buffer 
LLE Mapped Buffer: Add unmapping of write buffer, zero-size, and multiple page handling
 2018-10-30 19:18:11 -04:00
B3n30
d37a2270d6 Replace boost::optional with std::optional where possible 2018-10-05 13:51:09 +02:00
NarcolepticK
51d53a6281 LLE Mapped Buffer: addressed comments 2018-09-30 23:23:21 -04:00
Weiyi Wang
7d8f115185 Prefix all size_t with std:: 
done automatically by executing regex replace `([^:0-9a-zA-Z_])size_t([^0-9a-zA-Z_])` -> `$1std::size_t$2`
 2018-09-06 16:03:28 -04:00
Lioncash
8fa861c2c6 memory: Make prototype parameter names match their definitions 
Keeps the code consistent.
 2018-08-31 00:33:20 +02:00
Lioncash
379b8c65b9 memory: Remove unnecessary const qualifiers in prototypes 
These aren't necessary, as value-wise const only matters in the
definition.
 2018-08-31 00:22:55 +02:00
wwylele
672fbcf37d Memory: remove RasterizerCachedSpecial page type 2018-03-10 01:14:38 +02:00
James Rowe
13606a6d0b Memory: Remove count of cached pages and add InvalidateRegion 
In a future commit, the count of cached pages will be reintroduced in
the actual surface cache. Also adds an Invalidate only to the cache
which marks a region as invalid in order to try to avoid a costly flush
from 3ds memory
 2017-12-23 16:10:25 -07:00
wwylele
8e4e663113 memory: add overload with process parameter for ZeroBlock and CopyBlock 2017-12-07 15:59:54 +02:00
Subv
1f2de7501b Memory: Make WriteBlock take a Process parameter on which to operate 2017-10-01 14:18:36 -05:00
Subv
811c01e5fe Memory: Make ReadBlock take a Process parameter on which to operate 2017-10-01 14:18:36 -05:00