Add PCI and AGP speed control to i4x0 and VIA northbridges
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@@ -1540,6 +1540,15 @@ static void
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cpu_update_waitstates();
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}
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/* Out-of-spec PCI and AGP clocks with overclocked bus. */
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if ((dev->type <= INTEL_440FX) && (cpu_busspeed >= 66666666))
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cpu_set_pci_speed(cpu_busspeed / 2);
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if ((dev->type >= INTEL_440BX) && (cpu_busspeed >= 100000000))
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cpu_set_agp_speed(cpu_busspeed / 1.5);
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else if (dev->type >= INTEL_440LX)
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cpu_set_agp_speed(cpu_busspeed);
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i4x0_write(regs[0x59], 0x59, 0x00, dev);
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i4x0_write(regs[0x5a], 0x5a, 0x00, dev);
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i4x0_write(regs[0x5b], 0x5b, 0x00, dev);
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@@ -157,19 +157,33 @@ via_apollo_setup(via_apollo_t *dev)
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if (dev->id >= VIA_691)
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dev->pci_conf[0x67] = 0xec; /* DRAM Timing for Banks 6, 7 */
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if (dev->id >= VIA_693A) {
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if (cpu_busspeed < 95000000)
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dev->pci_conf[0x68] |= 0x00; /* 66 MHz */
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else if (cpu_busspeed < 124000000)
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dev->pci_conf[0x68] |= 0x01; /* 100 MHz */
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else
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dev->pci_conf[0x68] |= (dev->id == VIA_8601) ? 0x03 : 0x02; /* 133 MHz */
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if (cpu_busspeed < 95000000) { /* 66 MHz */
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cpu_set_pci_speed(cpu_busspeed / 2);
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cpu_set_agp_speed(cpu_busspeed);
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dev->pci_conf[0x68] |= 0x00;
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} else if (cpu_busspeed < 124000000) { /* 100 MHz */
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cpu_set_pci_speed(cpu_busspeed / 3);
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cpu_set_agp_speed(cpu_busspeed / 1.5);
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dev->pci_conf[0x68] |= 0x01;
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} else { /* 133 MHz */
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cpu_set_pci_speed(cpu_busspeed / 4);
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cpu_set_agp_speed(cpu_busspeed / 2);
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dev->pci_conf[0x68] |= (dev->id == VIA_8601) ? 0x03 : 0x02;
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}
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} else if (dev->id >= VIA_598) {
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if (cpu_busspeed < 75000000)
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dev->pci_conf[0x68] |= 0x00; /* 66 MHz */
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else if (cpu_busspeed < 100000000)
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dev->pci_conf[0x68] |= (dev->id >= VIA_691) ? 0x00 : 0x03; /* 75/83 MHz (66 MHz on 691) */
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else
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dev->pci_conf[0x68] |= 0x01; /* 100 MHz */
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if (cpu_busspeed < ((dev->id >= VIA_691) ? 100000000 : 75000000)) { /* 66 MHz */
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cpu_set_pci_speed(cpu_busspeed / 2);
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cpu_set_agp_speed(cpu_busspeed);
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dev->pci_conf[0x68] |= 0x00;
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} else if (cpu_busspeed < 100000000) { /* 75/83 MHz (not available on 691) */
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cpu_set_pci_speed(cpu_busspeed / 2.5);
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cpu_set_agp_speed(cpu_busspeed / 1.25);
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dev->pci_conf[0x68] |= 0x03;
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} else { /* 100 MHz */
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cpu_set_pci_speed(cpu_busspeed / 3);
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cpu_set_agp_speed(cpu_busspeed / 1.5);
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dev->pci_conf[0x68] |= 0x01;
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}
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}
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dev->pci_conf[0x6b] = 0x01;
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