80486DX2-66/86Box-fork
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Fixed Shadow RAM handling for all OPTi 486 chipsets.

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This commit is contained in:
OBattler
2020-06-30 03:24:06 +02:00
parent 9402f98a3b
commit 13e8d9c923
2 changed files with 32 additions and 28 deletions
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30
src/chipset/opti495.c
View File

@@ -90,14 +90,15 @@ opti495_recalc(opti495_t *dev)
if ((dev->regs[0x22] & ((base >= 0xe0000) ? 0x20 : 0x40)) &&
(dev->regs[0x23] & (1 << i))) {
if (dev->regs[0x26] & 0x40)
shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL;
else {
shflags = MEM_READ_INTERNAL;
shflags = MEM_READ_INTERNAL;
shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
} else {
if (dev->regs[0x26] & 0x40) {
shflags = MEM_READ_EXTANY;
shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
}
} else
shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
} else
shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
}
mem_set_mem_state_both(base, 0x4000, shflags);
}
@@ -106,14 +107,15 @@ opti495_recalc(opti495_t *dev)
base = 0xc0000 + (i << 14);
if ((dev->regs[0x26] & 0x10) && (dev->regs[0x26] & (1 << i))) {
if (dev->regs[0x26] & 0x40)
shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL;
else {
shflags = MEM_READ_INTERNAL;
shflags = MEM_READ_INTERNAL;
shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
} else {
if (dev->regs[0x26] & 0x40) {
shflags = MEM_READ_EXTANY;
shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
}
} else
shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
} else
shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
}
mem_set_mem_state_both(base, 0x4000, shflags);
}

30
src/chipset/opti895.c
View File

@@ -89,14 +89,15 @@ opti895_recalc(opti895_t *dev)
base = 0xd0000 + (i << 14);
if (dev->regs[0x23] & (1 << i)) {
if (dev->regs[0x26] & 0x40)
shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL;
else {
shflags = MEM_READ_INTERNAL;
shflags = MEM_READ_INTERNAL;
shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
} else {
if (dev->regs[0x26] & 0x40) {
shflags = MEM_READ_EXTANY;
shflags |= (dev->regs[0x22] & ((base >= 0xe0000) ? 0x08 : 0x10)) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
}
} else
shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
} else
shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
}
mem_set_mem_state_both(base, 0x4000, shflags);
}
@@ -105,14 +106,15 @@ opti895_recalc(opti895_t *dev)
base = 0xc0000 + (i << 14);
if (dev->regs[0x26] & (1 << i)) {
if (dev->regs[0x26] & 0x40)
shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL;
else {
shflags = MEM_READ_INTERNAL;
shflags = MEM_READ_INTERNAL;
shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
} else {
if (dev->regs[0x26] & 0x40) {
shflags = MEM_READ_EXTANY;
shflags |= (dev->regs[0x26] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL;
}
} else
shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
} else
shflags = MEM_READ_EXTANY | MEM_WRITE_EXTANY;
}
mem_set_mem_state_both(base, 0x4000, shflags);
}