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Merge pull request #1499 from 86Box/tc1995

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More fixes to the standard IBM VGA 256 color mode on the Realtek RTG3…
This commit is contained in:
Miran Grča
2021-06-18 18:06:26 +02:00
committed by GitHub
parent 0725d2a2f8 82142c1ce5
commit 13ef0ff526
1 changed files with 12 additions and 5 deletions
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17
src/video/vid_rtg310x.c
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@@ -193,9 +193,12 @@ rtg_out(uint16_t addr, uint8_t val, void *priv)
static void
rtg_recalctimings(svga_t *svga)
{
svga->ma_latch = ((svga->crtc[0x19] & 0x10) << 16) | ((svga->crtc[0x19] & 0x40) << 17);
svga->ma_latch = ((svga->crtc[0xc] << 8) | svga->crtc[0xd]) + ((svga->crtc[8] & 0x60) >> 5);
svga->ma_latch |= ((svga->crtc[0x19] & 0x10) << 16) | ((svga->crtc[0x19] & 0x40) << 17);
svga->interlace = (svga->crtc[0x19] & 1);
svga->lowres = svga->attrregs[0x10] & 0x40;
/*Clock table not available, currently a guesswork*/
switch (((svga->miscout >> 2) & 3) | ((svga->gdcreg[0x0c] & 0x20) >> 3)) {
@@ -257,17 +260,21 @@ rtg_recalctimings(svga_t *svga)
svga->render = svga_render_2bpp_highres;
break;
case 0x40: case 0x60:
svga->hdisp = svga->crtc[1] - ((svga->crtc[5] & 0x60) >> 5);
svga->hdisp++;
svga->hdisp *= (svga->seqregs[1] & 8) ? 16 : 8;
if (svga->crtc[0x19] & 2) {
svga->hdisp = svga->crtc[1] - ((svga->crtc[5] & 0x60) >> 5);
svga->hdisp++;
svga->hdisp *= (svga->seqregs[1] & 8) ? 16 : 8;
if (svga->hdisp == 1280) {
svga->hdisp >>= 1;
} else
svga->rowoffset <<= 1;
svga->render = svga_render_8bpp_highres;
} else {
if (svga->lowres)
svga->render = svga_render_8bpp_lowres;
else
svga->render = svga_render_8bpp_highres;
}
break;
}