Correct IRQ selection and detection fixes
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@@ -79,7 +79,7 @@ typedef struct ess_mixer_t {
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uint8_t regs[256];
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uint8_t ess_id_str[256];
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uint8_t ess_id_str_pos;
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uint8_t ess_id_str_pos : 2;
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} ess_mixer_t;
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typedef struct ess_t {
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@@ -192,6 +192,10 @@ ess_mixer_write(uint16_t addr, uint8_t val, void *priv)
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case 0x0e:
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break;
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case 0x64:
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mixer->regs[mixer->index] &= ~0x8;
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break;
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case 0x40: {
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uint16_t mpu401_base_addr = 0x300 | ((mixer->regs[0x40] & 0x38) << 1);
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gameport_remap(ess->gameport, !(mixer->regs[0x40] & 0x2) ? 0x00 : 0x200);
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@@ -223,23 +227,23 @@ ess_mixer_write(uint16_t addr, uint8_t val, void *priv)
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break;
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case 3:
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mpu401_change_addr(ess->mpu, mpu401_base_addr);
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mpu401_setirq(ess->mpu, 0xE);
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mpu401_setirq(ess->mpu, 11);
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break;
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case 4:
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mpu401_change_addr(ess->mpu, mpu401_base_addr);
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mpu401_setirq(ess->mpu, 0xA);
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mpu401_setirq(ess->mpu, 9);
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break;
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case 5:
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mpu401_change_addr(ess->mpu, mpu401_base_addr);
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mpu401_setirq(ess->mpu, 0xB);
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mpu401_setirq(ess->mpu, 5);
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break;
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case 6:
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mpu401_change_addr(ess->mpu, mpu401_base_addr);
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mpu401_setirq(ess->mpu, 0xC);
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mpu401_setirq(ess->mpu, 7);
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break;
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case 7:
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mpu401_change_addr(ess->mpu, mpu401_base_addr);
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mpu401_setirq(ess->mpu, 0xD);
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mpu401_setirq(ess->mpu, 10);
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break;
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}
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break;
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@@ -302,6 +306,7 @@ ess_mixer_read(uint16_t addr, void *priv)
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case 0x0a:
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case 0x0c:
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case 0x0e:
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case 0x14:
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case 0x22:
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case 0x26:
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case 0x28:
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@@ -312,8 +317,12 @@ ess_mixer_read(uint16_t addr, void *priv)
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case 0x32:
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case 0x36:
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case 0x38:
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case 0x3e:
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return mixer->regs[mixer->index];
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case 0x64:
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return mixer->regs[mixer->index] & 7;
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case 0x40:
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{
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uint8_t val = mixer->ess_id_str[mixer->ess_id_str_pos];
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@@ -324,11 +333,11 @@ ess_mixer_read(uint16_t addr, void *priv)
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}
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default:
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//sb_log("ess: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
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pclog("ess: Unknown register READ: %02X\t%02X\n", mixer->index, mixer->regs[mixer->index]);
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break;
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}
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return 0xff;
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return 0x00;
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}
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void
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