Rename unnamed MSR vars to real names where known
This commit is contained in:
Alexander Babikov
@@ -2717,8 +2717,8 @@ cpu_RDMSR(void)
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EDX = tsc >> 32;
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break;
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case 0x00000083:
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EAX = msr.ecx83 & 0xffffffff;
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EDX = msr.ecx83 >> 32;
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EAX = msr.amd_hwcr & 0xffffffff;
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EDX = msr.amd_hwcr >> 32;
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break;
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case 0xc0000080:
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EAX = msr.amd_efer & 0xffffffff;
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@@ -2868,15 +2868,15 @@ amd_k_invalid_rdmsr:
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}
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break;
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case 0x79:
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EAX = msr.ecx79 & 0xffffffff;
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EDX = msr.ecx79 >> 32;
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EAX = msr.bios_updt & 0xffffffff;
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EDX = msr.bios_updt >> 32;
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break;
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case 0x88:
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case 0x89:
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case 0x8a:
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case 0x8b:
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EAX = msr.ecx8x[ECX - 0x88] & 0xffffffff;
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EDX = msr.ecx8x[ECX - 0x88] >> 32;
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EAX = msr.bbl_cr_dx[ECX - 0x88] & 0xffffffff;
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EDX = msr.bbl_cr_dx[ECX - 0x88] >> 32;
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break;
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case 0xc1:
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case 0xc2:
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@@ -2894,19 +2894,28 @@ amd_k_invalid_rdmsr:
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EDX = msr.mtrr_cap >> 32;
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break;
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case 0x116:
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EAX = msr.ecx116 & 0xffffffff;
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EDX = msr.ecx116 >> 32;
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EAX = msr.bbl_cr_addr & 0xffffffff;
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EDX = msr.bbl_cr_addr >> 32;
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break;
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case 0x118:
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EAX = msr.bbl_cr_decc & 0xffffffff;
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EDX = msr.bbl_cr_decc >> 32;
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break;
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case 0x119:
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EAX = msr.bbl_cr_ctl & 0xffffffff;
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EDX = msr.bbl_cr_ctl >> 32;
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break;
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case 0x11a:
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EAX = msr.bbl_cr_trig & 0xffffffff;
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EDX = msr.bbl_cr_trig >> 32;
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break;
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case 0x11b:
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EAX = msr.ecx11x[ECX - 0x118] & 0xffffffff;
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EDX = msr.ecx11x[ECX - 0x118] >> 32;
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EAX = msr.bbl_cr_busy & 0xffffffff;
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EDX = msr.bbl_cr_busy >> 32;
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break;
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case 0x11e:
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EAX = msr.ecx11e & 0xffffffff;
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EDX = msr.ecx11e >> 32;
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EAX = msr.bbl_cr_ctl3 & 0xffffffff;
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EDX = msr.bbl_cr_ctl3 >> 32;
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break;
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case 0x174:
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if (cpu_s->cpu_type == CPU_PENTIUMPRO)
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@@ -2941,20 +2950,20 @@ amd_k_invalid_rdmsr:
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EDX = msr.mcg_ctl >> 32;
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break;
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case 0x186:
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EAX = msr.ecx186 & 0xffffffff;
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EDX = msr.ecx186 >> 32;
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EAX = msr.evntsel0 & 0xffffffff;
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EDX = msr.evntsel0 >> 32;
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break;
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case 0x187:
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EAX = msr.ecx187 & 0xffffffff;
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EDX = msr.ecx187 >> 32;
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EAX = msr.evntsel1 & 0xffffffff;
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EDX = msr.evntsel1 >> 32;
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break;
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case 0x1d9:
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EAX = msr.debug_ctl & 0xffffffff;
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EDX = msr.debug_ctl >> 32;
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break;
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case 0x1e0:
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EAX = msr.ecx1e0 & 0xffffffff;
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EDX = msr.ecx1e0 >> 32;
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EAX = msr.rob_cr_bkuptmpdr6 & 0xffffffff;
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EDX = msr.rob_cr_bkuptmpdr6 >> 32;
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break;
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case 0x200:
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case 0x201:
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@@ -3207,7 +3216,7 @@ cpu_WRMSR(void)
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tsc = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x83:
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msr.ecx83 = EAX | ((uint64_t) EDX << 32);
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msr.amd_hwcr = EAX | ((uint64_t) EDX << 32);
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break;
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case 0xc0000080:
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temp = EAX | ((uint64_t) EDX << 32);
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@@ -3319,13 +3328,13 @@ amd_k_invalid_wrmsr:
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case 0x2a:
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break;
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case 0x79:
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msr.ecx79 = EAX | ((uint64_t) EDX << 32);
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msr.bios_updt = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x88:
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case 0x89:
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case 0x8a:
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case 0x8b:
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msr.ecx8x[ECX - 0x88] = EAX | ((uint64_t) EDX << 32);
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msr.bbl_cr_dx[ECX - 0x88] = EAX | ((uint64_t) EDX << 32);
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break;
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case 0xc1:
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case 0xc2:
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@@ -3341,16 +3350,22 @@ amd_k_invalid_wrmsr:
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msr.mtrr_cap = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x116:
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msr.ecx116 = EAX | ((uint64_t) EDX << 32);
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msr.bbl_cr_addr = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x118:
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msr.bbl_cr_decc = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x119:
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msr.bbl_cr_ctl = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x11a:
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msr.bbl_cr_trig = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x11b:
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msr.ecx11x[ECX - 0x118] = EAX | ((uint64_t) EDX << 32);
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msr.bbl_cr_busy = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x11e:
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msr.ecx11e = EAX | ((uint64_t) EDX << 32);
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msr.bbl_cr_ctl3 = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x174:
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if (cpu_s->cpu_type == CPU_PENTIUMPRO)
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@@ -3380,16 +3395,16 @@ amd_k_invalid_wrmsr:
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msr.mcg_ctl = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x186:
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msr.ecx186 = EAX | ((uint64_t) EDX << 32);
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msr.evntsel0 = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x187:
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msr.ecx187 = EAX | ((uint64_t) EDX << 32);
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msr.evntsel1 = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x1d9:
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msr.debug_ctl = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x1e0:
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msr.ecx1e0 = EAX | ((uint64_t) EDX << 32);
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msr.rob_cr_bkuptmpdr6 = EAX | ((uint64_t) EDX << 32);
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break;
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case 0x200:
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case 0x201:
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@@ -239,15 +239,15 @@ typedef struct {
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like a real Deschutes does. */
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
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uint64_t ecx79; /* 0x00000079 */
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uint64_t bios_updt; /* 0x00000079 */
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/* AMD K5, 5k86, K6, K6-2, K6-2C, K6-3, K6-2P, and K6-3P MSR's */
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uint64_t ecx83; /* 0x00000083 - AMD K5 and K6 MSR's. */
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uint64_t amd_hwcr; /* 0x00000083 - AMD K5 and K6 MSR's. */
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
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uint64_t ecx8x[4]; /* 0x00000088 - 0x0000008b */
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uint64_t ia32_pmc[8]; /* 0x000000c1 - 0x000000c8 */
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uint64_t mtrr_cap; /* 0x000000fe */
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uint64_t bbl_cr_dx[4]; /* 0x00000088 - 0x0000008b */
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uint64_t ia32_pmc[8]; /* 0x000000c1 - 0x000000c8 */
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uint64_t mtrr_cap; /* 0x000000fe */
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/* IDT WinChip and WinChip 2 MSR's that are also on the VIA Cyrix III */
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uint32_t fcr; /* 0x00000107 (IDT), 0x00001107 (VIA) */
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@@ -255,9 +255,12 @@ typedef struct {
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uint64_t fcr3; /* 0x00000108 (IDT), 0x00001108 (VIA) */
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
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uint64_t ecx116; /* 0x00000116 */
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uint64_t ecx11x[4]; /* 0x00000118 - 0x0000011b */
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uint64_t ecx11e; /* 0x0000011e */
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uint64_t bbl_cr_addr; /* 0x00000116 */
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uint64_t bbl_cr_decc; /* 0x00000118 */
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uint64_t bbl_cr_ctl; /* 0x00000119 */
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uint64_t bbl_cr_trig; /* 0x0000011a */
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uint64_t bbl_cr_busy; /* 0x0000011b */
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uint64_t bbl_cr_ctl3; /* 0x0000011e */
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/* Pentium II Klamath and Pentium II Deschutes MSR's */
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uint16_t sysenter_cs; /* 0x00000174 - SYSENTER/SYSEXIT MSR's */
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@@ -265,13 +268,13 @@ typedef struct {
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uint32_t sysenter_eip; /* 0x00000176 - SYSENTER/SYSEXIT MSR's */
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
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uint64_t mcg_ctl; /* 0x0000017b - Machine Check Architecture */
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uint64_t ecx186; /* 0x00000186, 0x00000187 */
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uint64_t ecx187; /* 0x00000186, 0x00000187 */
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uint64_t mcg_ctl; /* 0x0000017b - Machine Check Architecture */
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uint64_t evntsel0; /* 0x00000186 */
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uint64_t evntsel1; /* 0x00000187 */
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
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uint64_t debug_ctl; /* 0x000001d9 - Debug Registers Control */
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uint64_t ecx1e0; /* 0x000001e0 */
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uint64_t debug_ctl; /* 0x000001d9 - Debug Registers Control */
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uint64_t rob_cr_bkuptmpdr6; /* 0x000001e0 */
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/* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's that are also
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on the VIA Cyrix III */
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