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Preliminary 186 emulation.

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Added MCA variant of the ET4000 VGA card.
Added NE/2 Netware card.
Corrected timings of the NCR 5380-based cards.
Added the WD8003E (8-bit ISA), WD8013EBT (16-bit ISA) and WD8013EP/A
(MCA) network cards.
This commit is contained in:
TC1995
2018-07-19 16:01:31 +02:00
parent cf79b98628
commit 2fecef0741
17 changed files with 3382 additions and 645 deletions
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141
src/cpu/808x.c
View File

@@ -881,19 +881,70 @@ void rep(int fv)
cycles-=2; cycles-=2;
goto startrep; goto startrep;
break; break;
case 0x6E: /*REP OUTSB*/ case 0x6C: /*186+ REP INSB*/
if (c>0) if (is186)
{ {
temp2=readmemb(ds+SI); if (c>0)
outb(DX,temp2); {
if (flags&D_FLAG) SI--; temp2=inb(DX);
else SI++; writememb(ds+SI, temp2);
c--; if (flags&D_FLAG) SI--;
cycles-=5; else SI++;
} c--;
if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); } cycles-=5;
else firstrepcycle=1; }
if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
else firstrepcycle=1;
}
break;
case 0x6D: /*186+ REP INSW*/
if (is186)
{
if (c>0)
{
tempw2=inw(DX);
writememw(ds, SI, tempw2);
if (flags&D_FLAG) SI-=2;
else SI+=2;
c--;
cycles-=5;
}
if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
else firstrepcycle=1;
}
break; break;
case 0x6E: /*186+ REP OUTSB*/
if (is186)
{
if (c>0)
{
temp2=readmemb(ds+SI);
outb(DX,temp2);
if (flags&D_FLAG) SI--;
else SI++;
c--;
cycles-=5;
}
if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
else firstrepcycle=1;
}
break;
case 0x6F: /*186+ REP OUTSW*/
if (is186)
{
if (c>0)
{
tempw2=readmemw(ds,SI);
outw(DX,tempw2);
if (flags&D_FLAG) SI-=2;
else SI+=2;
c--;
cycles-=5;
}
if (c>0) { firstrepcycle=0; cpu_state.pc=ipc; if (cpu_state.ssegs) cpu_state.ssegs++; FETCHCLEAR(); }
else firstrepcycle=1;
}
break;
case 0xA4: /*REP MOVSB*/ case 0xA4: /*REP MOVSB*/
while (c>0 && !IRQTEST) while (c>0 && !IRQTEST)
{ {
@@ -2282,7 +2333,50 @@ void execx86(int cycs)
cycles-=((cpu_mod==3)?4:14); cycles-=((cpu_mod==3)?4:14);
break; break;
case 0xC8: /*RETF alias*/ case 0xC8: /*186+ ENTER*/
if (is186)
{
int count;
tempw=readmemw(ss,SP);
tempw2=readmemw(ss,(SP+2)&0xFFFF);
tempw3=CS;
tempw4=cpu_state.pc;
if (cpu_state.ssegs) ss=oldss;
count=geteaw();
if (count > 0)
{
while (--count)
{
cpu_state.pc=tempw;
loadcs(tempw2);
cycles-=4;
}
writememw(ss,(SP-2)&0xFFFF,tempw3);
writememw(ss,((SP-4)&0xFFFF),tempw4);
cycles-=5;
}
cpu_state.last_ea = SP;
SP-=getword();
cycles-=10;
FETCHCLEAR();
}
else /*RETF alias*/
{
tempw=getword();
if (cpu_state.ssegs) ss=oldss;
cpu_state.pc=readmemw(ss,SP);
loadcs(readmemw(ss,SP+2));
SP+=4;
SP+=tempw;
cycles-=33;
FETCHCLEAR();
}
break;
case 0xCA: /*RETF*/ case 0xCA: /*RETF*/
tempw=getword(); tempw=getword();
if (cpu_state.ssegs) ss=oldss; if (cpu_state.ssegs) ss=oldss;
@@ -2293,7 +2387,26 @@ void execx86(int cycs)
cycles-=33; cycles-=33;
FETCHCLEAR(); FETCHCLEAR();
break; break;
case 0xC9: /*RETF alias*/ case 0xC9:
if (is186) /*186+ LEAVE*/
{
if (cpu_state.ssegs) ss=oldss;
cpu_state.regs[opcode&7].w=readmemw(ss,(SP-2)&0xFFFF);
cpu_state.last_ea = SP;
cycles-=4;
}
else /*RETF alias*/
{
if (cpu_state.ssegs) ss=oldss;
cpu_state.pc=readmemw(ss,SP);
loadcs(readmemw(ss,SP+2));
SP+=4;
cycles-=34;
FETCHCLEAR();
}
break;
case 0xCB: /*RETF*/ case 0xCB: /*RETF*/
if (cpu_state.ssegs) ss=oldss; if (cpu_state.ssegs) ss=oldss;
cpu_state.pc=readmemw(ss,SP); cpu_state.pc=readmemw(ss,SP);

5
src/cpu/cpu.c
View File

@@ -132,7 +132,8 @@ int cpu_waitstates;
int cpu_cache_int_enabled, cpu_cache_ext_enabled; int cpu_cache_int_enabled, cpu_cache_ext_enabled;
int cpu_pci_speed; int cpu_pci_speed;
int is286, int is186,
is286,
is386, is386,
is486, is486,
cpu_iscyrix, cpu_iscyrix,
@@ -243,6 +244,7 @@ cpu_set(void)
CPUID = cpu_s->cpuid_model; CPUID = cpu_s->cpuid_model;
cpuspeed = cpu_s->speed; cpuspeed = cpu_s->speed;
is8086 = (cpu_s->cpu_type > CPU_8088); is8086 = (cpu_s->cpu_type > CPU_8088);
is186 = (cpu_s->cpu_type == CPU_186);
is286 = (cpu_s->cpu_type >= CPU_286); is286 = (cpu_s->cpu_type >= CPU_286);
is386 = (cpu_s->cpu_type >= CPU_386SX); is386 = (cpu_s->cpu_type >= CPU_386SX);
israpidcad = (cpu_s->cpu_type == CPU_RAPIDCAD); israpidcad = (cpu_s->cpu_type == CPU_RAPIDCAD);
@@ -395,6 +397,7 @@ cpu_set(void)
{ {
case CPU_8088: case CPU_8088:
case CPU_8086: case CPU_8086:
case CPU_186:
break; break;
case CPU_286: case CPU_286:

60
src/cpu/cpu.h
View File

@@ -24,42 +24,43 @@
#define CPU_8088 0 /* 808x class CPUs */ #define CPU_8088 0 /* 808x class CPUs */
#define CPU_8086 1 #define CPU_8086 1
#define CPU_286 2 /* 286 class CPUs */ #define CPU_186 2
#define CPU_386SX 3 /* 386 class CPUs */ #define CPU_286 3 /* 286 class CPUs */
#define CPU_386DX 4 #define CPU_386SX 4 /* 386 class CPUs */
#define CPU_RAPIDCAD 5 #define CPU_386DX 5
#define CPU_486SLC 6 #define CPU_RAPIDCAD 6
#define CPU_486DLC 7 #define CPU_486SLC 7
#define CPU_i486SX 8 /* 486 class CPUs */ #define CPU_486DLC 8
#define CPU_Am486SX 9 #define CPU_i486SX 9 /* 486 class CPUs */
#define CPU_Cx486S 10 #define CPU_Am486SX 10
#define CPU_i486DX 11 #define CPU_Cx486S 11
#define CPU_Am486DX 12 #define CPU_i486DX 12
#define CPU_Cx486DX 13 #define CPU_Am486DX 13
#define CPU_iDX4 14 #define CPU_Cx486DX 14
#define CPU_Cx5x86 15 #define CPU_iDX4 15
#define CPU_WINCHIP 16 /* 586 class CPUs */ #define CPU_Cx5x86 16
#define CPU_PENTIUM 17 #define CPU_WINCHIP 17 /* 586 class CPUs */
#define CPU_PENTIUMMMX 18 #define CPU_PENTIUM 18
#define CPU_Cx6x86 19 #define CPU_PENTIUMMMX 19
#define CPU_Cx6x86MX 20 #define CPU_Cx6x86 20
#define CPU_Cx6x86L 21 #define CPU_Cx6x86MX 21
#define CPU_CxGX1 22 #define CPU_Cx6x86L 22
#define CPU_CxGX1 23
#ifdef DEV_BRANCH #ifdef DEV_BRANCH
#ifdef USE_AMD_K #ifdef USE_AMD_K
#define CPU_K5 23 #define CPU_K5 24
#define CPU_5K86 24 #define CPU_5K86 25
#define CPU_K6 25 #define CPU_K6 26
#endif #endif
#endif #endif
#ifdef DEV_BRANCH #ifdef DEV_BRANCH
#ifdef USE_I686 #ifdef USE_I686
#define CPU_PENTIUMPRO 26 /* 686 class CPUs */ #define CPU_PENTIUMPRO 27 /* 686 class CPUs */
#if 0 #if 0
# define CPU_PENTIUM2 27 # define CPU_PENTIUM2 28
# define CPU_PENTIUM2D 28 # define CPU_PENTIUM2D 29
#else #else
# define CPU_PENTIUM2D 27 # define CPU_PENTIUM2D 28
#endif #endif
#endif #endif
#endif #endif
@@ -91,6 +92,7 @@ typedef struct {
extern CPU cpus_8088[]; extern CPU cpus_8088[];
extern CPU cpus_8086[]; extern CPU cpus_8086[];
extern CPU cpus_186[];
extern CPU cpus_286[]; extern CPU cpus_286[];
extern CPU cpus_i386SX[]; extern CPU cpus_i386SX[];
extern CPU cpus_i386DX[]; extern CPU cpus_i386DX[];
@@ -315,7 +317,7 @@ extern int cpu_multi;
extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment
penalties when crossing 8-byte boundaries*/ penalties when crossing 8-byte boundaries*/
extern int is8086, is286, is386, is486; extern int is8086, is186, is286, is386, is486;
extern int is_rapidcad, is_pentium; extern int is_rapidcad, is_pentium;
extern int hasfpu; extern int hasfpu;
extern int cpu_hasrdtsc; extern int cpu_hasrdtsc;

19
src/cpu/cpu_table.c
View File

@@ -29,7 +29,7 @@
* 16 = 180 MHz * 16 = 180 MHz
* 17 = 200 MHz * 17 = 200 MHz
* *
* Version: @(#)cpu_table.c 1.0.5 2018/07/17 * Version: @(#)cpu_table.c 1.0.4 2018/02/18
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* leilei, * leilei,
@@ -54,12 +54,10 @@ CPU cpus_8088[] = {
/*8088 standard*/ /*8088 standard*/
{"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1}, {"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8088/8", CPU_8088, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1}, {"8088/8", CPU_8088, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
#if 0
{"8088/7.16", CPU_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1}, {"8088/7.16", CPU_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8088/10", CPU_8088, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1}, {"8088/10", CPU_8088, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8088/12", CPU_8088, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1}, {"8088/12", CPU_8088, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"8088/16", CPU_8088, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1}, {"8088/16", CPU_8088, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 2},
#endif
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0} {"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
}; };
@@ -88,6 +86,19 @@ CPU cpus_8086[] = {
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0} {"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
}; };
CPU cpus_186[] = {
/*80186 standard*/
{"80186/7.16", CPU_186, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"80186/8", CPU_186, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"80186/9.54", CPU_186, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"80186/10", CPU_186, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"80186/12", CPU_186, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},
{"80186/16", CPU_186, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 2},
{"80186/20", CPU_186, 5, 20000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 3},
{"80186/25", CPU_186, 6, 25000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 3},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_pc1512[] = { CPU cpus_pc1512[] = {
/*8086 Amstrad*/ /*8086 Amstrad*/
{"8086/8", CPU_8086, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1}, {"8086/8", CPU_8086, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0, 1},

13
src/machine/m_ps2_mca.c
View File

@@ -24,6 +24,7 @@
#include "../lpt.h" #include "../lpt.h"
#include "../mouse.h" #include "../mouse.h"
#include "../serial.h" #include "../serial.h"
#include "../video/video.h"
#include "../video/vid_vga.h" #include "../video/vid_vga.h"
#include "machine.h" #include "machine.h"
@@ -841,7 +842,8 @@ static void ps2_mca_board_model_50_init()
ps2_mca_mem_fffc_init(2); ps2_mca_mem_fffc_init(2);
} }
device_add(&ps1vga_device); if (gfxcard == GFX_INTERNAL)
device_add(&ps1vga_device);
} }
static void ps2_mca_board_model_55sx_init() static void ps2_mca_board_model_55sx_init()
@@ -905,7 +907,8 @@ static void ps2_mca_board_model_55sx_init()
ps2.planar_read = model_55sx_read; ps2.planar_read = model_55sx_read;
ps2.planar_write = model_55sx_write; ps2.planar_write = model_55sx_write;
device_add(&ps1vga_device); if (gfxcard == GFX_INTERNAL)
device_add(&ps1vga_device);
} }
static void mem_encoding_update() static void mem_encoding_update()
@@ -1112,7 +1115,8 @@ static void ps2_mca_board_model_70_type34_init(int is_type4)
ps2_mca_mem_fffc_init(8); ps2_mca_mem_fffc_init(8);
} }
device_add(&ps1vga_device); if (gfxcard == GFX_INTERNAL)
device_add(&ps1vga_device);
} }
static void ps2_mca_board_model_80_type2_init(int is486) static void ps2_mca_board_model_80_type2_init(int is486)
@@ -1181,7 +1185,8 @@ static void ps2_mca_board_model_80_type2_init(int is486)
ps2_mca_mem_fffc_init(4); ps2_mca_mem_fffc_init(4);
} }
device_add(&ps1vga_device); if (gfxcard == GFX_INTERNAL)
device_add(&ps1vga_device);
} }

60
src/machine/machine_table.c
View File

@@ -11,7 +11,7 @@
* NOTES: OpenAT wip for 286-class machine with open BIOS. * NOTES: OpenAT wip for 286-class machine with open BIOS.
* PS2_M80-486 wip, pending receipt of TRM's for machine. * PS2_M80-486 wip, pending receipt of TRM's for machine.
* *
* Version: @(#)machine_table.c 1.0.30 2018/05/26 * Version: @(#)machine_table.c 1.0.31 2018/07/07
* *
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/> * Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com> * Miran Grca, <mgrca8@gmail.com>
@@ -34,34 +34,34 @@
const machine_t machines[] = { const machine_t machines[] = {
{ "[8088] AMI XT clone", ROM_AMIXT, "amixt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL }, { "[8088] AMI XT clone", ROM_AMIXT, "amixt", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Compaq Portable", ROM_PORTABLE, "portable", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_xt_compaq_init, NULL }, { "[8088] Compaq Portable", ROM_PORTABLE, "portable", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_xt_compaq_init, NULL },
{ "[8088] DTK XT clone", ROM_DTKXT, "dtk", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL }, { "[8088] DTK XT clone", ROM_DTKXT, "dtk", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] IBM PC", ROM_IBMPC, "ibmpc", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 32, 0, machine_xt_init, NULL }, { "[8088] IBM PC", ROM_IBMPC, "ibmpc", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 32, 0, machine_xt_init, NULL },
{ "[8088] IBM PCjr", ROM_IBMPCJR, "ibmpcjr", {{"", cpus_pcjr}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_pcjr_init, pcjr_get_device }, { "[8088] IBM PCjr", ROM_IBMPCJR, "ibmpcjr", {{"Intel", cpus_pcjr}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_pcjr_init, pcjr_get_device },
{ "[8088] IBM XT", ROM_IBMXT, "ibmxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL }, { "[8088] IBM XT", ROM_IBMXT, "ibmxt", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Generic XT clone", ROM_GENXT, "genxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL }, { "[8088] Generic XT clone", ROM_GENXT, "genxt", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Juko XT clone", ROM_JUKOPC, "jukopc", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL }, { "[8088] Juko XT clone", ROM_JUKOPC, "jukopc", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Phoenix XT clone", ROM_PXXT, "pxxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL }, { "[8088] Phoenix XT clone", ROM_PXXT, "pxxt", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{ "[8088] Schneider EuroPC", ROM_EUROPC, "europc", {{"Siemens",cpus_europc}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_HDC | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 15, machine_europc_init, NULL }, { "[8088] Schneider EuroPC", ROM_EUROPC, "europc", {{"Siemens", cpus_europc}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_HDC | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 15, machine_europc_init, NULL },
{ "[8088] Tandy 1000", ROM_TANDY, "tandy", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 128, 640, 128, 0, machine_tandy1k_init, tandy1k_get_device }, { "[8088] Tandy 1000", ROM_TANDY, "tandy", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 128, 640, 128, 0, machine_tandy1k_init, tandy1k_get_device },
{ "[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 256, 640, 128, 0, machine_tandy1k_init, tandy1k_hx_get_device }, { "[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 256, 640, 128, 0, machine_tandy1k_init, tandy1k_hx_get_device },
{ "[8088] Toshiba T1000", ROM_T1000, "t1000", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 512, 1280, 768, 63, machine_xt_t1000_init, NULL }, { "[8088] Toshiba T1000", ROM_T1000, "t1000", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 512, 1280, 768, 63, machine_xt_t1000_init, NULL },
#if defined(DEV_BRANCH) && defined(USE_LASERXT) #if defined(DEV_BRANCH) && defined(USE_LASERXT)
{ "[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 512, 512, 256, 0, machine_xt_laserxt_init, NULL }, { "[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"Intel", cpus_8088}, {"Intel", cpus_186},, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 512, 512, 256, 0, machine_xt_laserxt_init, NULL },
#endif #endif
{ "[8088] Xi8088", ROM_XI8088, "xi8088", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2, 64, 1024, 128, 127, machine_xt_xi8088_init, NULL }, { "[8088] Xi8088", ROM_XI8088, "xi8088", {{"Intel", cpus_8088}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2, 64, 1024, 128, 127, machine_xt_xi8088_init, NULL },
{ "[8086] Amstrad PC1512", ROM_PC1512, "pc1512", {{"", cpus_pc1512}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL }, { "[8086] Amstrad PC1512", ROM_PC1512, "pc1512", {{"Intel", cpus_pc1512}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC1640", ROM_PC1640, "pc1640", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL }, { "[8086] Amstrad PC1640", ROM_PC1640, "pc1640", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC2086", ROM_PC2086, "pc2086", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL }, { "[8086] Amstrad PC2086", ROM_PC2086, "pc2086", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC3086", ROM_PC3086, "pc3086", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL }, { "[8086] Amstrad PC3086", ROM_PC3086, "pc3086", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{ "[8086] Amstrad PC20(0)", ROM_PC200, "pc200", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL }, { "[8086] Amstrad PC20(0)", ROM_PC200, "pc200", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL },
{ "[8086] Olivetti M24", ROM_OLIM24, "olivetti_m24", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 128, 640, 128, 0, machine_olim24_init, NULL }, { "[8086] Olivetti M24", ROM_OLIM24, "olivetti_m24", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 128, 640, 128, 0, machine_olim24_init, NULL },
{ "[8086] Tandy 1000 SL/2", ROM_TANDY1000SL2, "tandy1000sl2", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 512, 768, 128, 0, machine_tandy1k_init, NULL }, { "[8086] Tandy 1000 SL/2", ROM_TANDY1000SL2, "tandy1000sl2", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 512, 768, 128, 0, machine_tandy1k_init, NULL },
{ "[8086] Toshiba T1200", ROM_T1200, "t1200", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 1024, 2048,1024, 63, machine_xt_t1200_init, NULL }, { "[8086] Toshiba T1200", ROM_T1200, "t1200", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 1024, 2048,1024, 63, machine_xt_t1200_init, NULL },
#if defined(DEV_BRANCH) && defined(USE_LASERXT) #if defined(DEV_BRANCH) && defined(USE_LASERXT)
{ "[8086] VTech Laser XT3", ROM_LXT3, "lxt3", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 256, 512, 256, 0, machine_xt_laserxt_init, NULL }, { "[8086] VTech Laser XT3", ROM_LXT3, "lxt3", {{"Intel", cpus_8086}, {"Intel", cpus_186}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 256, 512, 256, 0, machine_xt_laserxt_init, NULL },
#endif #endif
{ "[286 ISA] AMI 286 clone", ROM_AMI286, "ami286", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_neat_ami_init, NULL }, { "[286 ISA] AMI 286 clone", ROM_AMI286, "ami286", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_neat_ami_init, NULL },
@@ -84,7 +84,7 @@ const machine_t machines[] = {
#endif #endif
{ "[286 ISA] Toshiba T3100e", ROM_T3100E, "t3100e", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1024, 5120, 256, 63, machine_at_t3100e_init, NULL }, { "[286 ISA] Toshiba T3100e", ROM_T3100E, "t3100e", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1024, 5120, 256, 63, machine_at_t3100e_init, NULL },
{ "[286 MCA] IBM PS/2 model 50", ROM_IBMPS2_M50, "ibmps2_m50", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 10, 1, 63, machine_ps2_model_50_init, NULL }, { "[286 MCA] IBM PS/2 model 50", ROM_IBMPS2_M50, "ibmps2_m50", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2 | MACHINE_VIDEO, 1, 10, 1, 63, machine_ps2_model_50_init, NULL },
{ "[386SX ISA] AMI 386SX clone", ROM_AMI386SX, "ami386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512,16384, 128, 127, machine_at_headland_init, NULL }, { "[386SX ISA] AMI 386SX clone", ROM_AMI386SX, "ami386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512,16384, 128, 127, machine_at_headland_init, NULL },
{ "[386SX ISA] Amstrad MegaPC", ROM_MEGAPC, "megapc", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO | MACHINE_HDC, 1, 16, 1, 127, machine_at_wd76c10_init, NULL }, { "[386SX ISA] Amstrad MegaPC", ROM_MEGAPC, "megapc", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO | MACHINE_HDC, 1, 16, 1, 127, machine_at_wd76c10_init, NULL },
@@ -94,7 +94,7 @@ const machine_t machines[] = {
{ "[386SX ISA] IBM PS/1 m.2121+ISA", ROM_IBMPS1_2121_ISA, "ibmps1_2121_isa", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 1, 6, 1, 63, machine_ps1_m2121_init, NULL }, { "[386SX ISA] IBM PS/1 m.2121+ISA", ROM_IBMPS1_2121_ISA, "ibmps1_2121_isa", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 1, 6, 1, 63, machine_ps1_m2121_init, NULL },
{ "[386SX ISA] KMX-C-02", ROM_KMXC02, "kmxc02", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_scatsx_init, NULL }, { "[386SX ISA] KMX-C-02", ROM_KMXC02, "kmxc02", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_scatsx_init, NULL },
{ "[386SX MCA] IBM PS/2 model 55SX", ROM_IBMPS2_M55SX, "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL }, { "[386SX MCA] IBM PS/2 model 55SX", ROM_IBMPS2_M55SX, "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
{ "[386DX ISA] AMI 386DX clone", ROM_AMI386DX_OPTI495, "ami386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_ami_init, NULL }, { "[386DX ISA] AMI 386DX clone", ROM_AMI386DX_OPTI495, "ami386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_ami_init, NULL },
{ "[386DX ISA] Amstrad MegaPC 386DX", ROM_MEGAPCDX, "megapcdx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 1, 32, 1, 127, machine_at_wd76c10_init, NULL }, { "[386DX ISA] Amstrad MegaPC 386DX", ROM_MEGAPCDX, "megapcdx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC | MACHINE_VIDEO, 1, 32, 1, 127, machine_at_wd76c10_init, NULL },
@@ -104,8 +104,8 @@ const machine_t machines[] = {
{ "[386DX ISA] Compaq Portable III (386)", ROM_PORTABLEIII386, "portableiii386", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO, 1, 14, 1, 127, machine_at_compaq_init, NULL }, { "[386DX ISA] Compaq Portable III (386)", ROM_PORTABLEIII386, "portableiii386", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_HDC | MACHINE_VIDEO, 1, 14, 1, 127, machine_at_compaq_init, NULL },
#endif #endif
{ "[386DX MCA] IBM PS/2 model 70 (type 3)", ROM_IBMPS2_M70_TYPE3, "ibmps2_m70_type3", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 2, 16, 2, 63, machine_ps2_model_70_type3_init, NULL }, { "[386DX MCA] IBM PS/2 model 70 (type 3)", ROM_IBMPS2_M70_TYPE3, "ibmps2_m70_type3", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2 | MACHINE_VIDEO, 2, 16, 2, 63, machine_ps2_model_70_type3_init, NULL },
{ "[386DX MCA] IBM PS/2 model 80", ROM_IBMPS2_M80, "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 12, 1, 63, machine_ps2_model_80_init, NULL }, { "[386DX MCA] IBM PS/2 model 80", ROM_IBMPS2_M80, "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2 | MACHINE_VIDEO, 1, 12, 1, 63, machine_ps2_model_80_init, NULL },
{ "[486 ISA] AMI 486 clone", ROM_AMI486, "ami486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL }, { "[486 ISA] AMI 486 clone", ROM_AMI486, "ami486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL },
{ "[486 ISA] AMI WinBIOS 486", ROM_WIN486, "win486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL }, { "[486 ISA] AMI WinBIOS 486", ROM_WIN486, "win486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL },
@@ -113,7 +113,7 @@ const machine_t machines[] = {
{ "[486 ISA] DTK PKM-0038S E-2", ROM_DTK486, "dtk486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 127, machine_at_dtk486_init, NULL }, { "[486 ISA] DTK PKM-0038S E-2", ROM_DTK486, "dtk486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 127, machine_at_dtk486_init, NULL },
{ "[486 ISA] IBM PS/1 model 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 64, 1, 127, machine_ps1_m2133_init, NULL }, { "[486 ISA] IBM PS/1 model 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 64, 1, 127, machine_ps1_m2133_init, NULL },
{ "[486 MCA] IBM PS/2 model 70 (type 4)", ROM_IBMPS2_M70_TYPE4, "ibmps2_m70_type4", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 2, 16, 2, 63, machine_ps2_model_70_type4_init, NULL }, { "[486 MCA] IBM PS/2 model 70 (type 4)", ROM_IBMPS2_M70_TYPE4, "ibmps2_m70_type4", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2 | MACHINE_VIDEO, 2, 16, 2, 63, machine_ps2_model_70_type4_init, NULL },
{ "[486 PCI] Rise Computer R418", ROM_R418, "r418", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 255, 1, 127, machine_at_r418_init, NULL }, { "[486 PCI] Rise Computer R418", ROM_R418, "r418", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 255, 1, 127, machine_at_r418_init, NULL },

346
src/network/net_ne2000.c
View File

@@ -12,7 +12,7 @@
* - Realtek RTL8019AS (ISA 16-bit, PnP); * - Realtek RTL8019AS (ISA 16-bit, PnP);
* - Realtek RTL8029AS (PCI). * - Realtek RTL8029AS (PCI).
* *
* Version: @(#)net_ne2000.c 1.0.4 2018/04/26 * Version: @(#)net_ne2000.c 1.0.5 2018/07/11
* *
* Based on @(#)ne2k.cc v1.56.2.1 2004/02/02 22:37:22 cbothamy * Based on @(#)ne2k.cc v1.56.2.1 2004/02/02 22:37:22 cbothamy
* *
@@ -57,6 +57,7 @@
#include "../io.h" #include "../io.h"
#include "../mem.h" #include "../mem.h"
#include "../rom.h" #include "../rom.h"
#include "../mca.h"
#include "../pci.h" #include "../pci.h"
#include "../pic.h" #include "../pic.h"
#include "../random.h" #include "../random.h"
@@ -75,7 +76,6 @@ enum {
PNP_PHASE_SLEEP PNP_PHASE_SLEEP
}; };
/* ROM BIOS file paths. */ /* ROM BIOS file paths. */
#define ROM_PATH_NE1000 L"roms/network/ne1000/ne1000.rom" #define ROM_PATH_NE1000 L"roms/network/ne1000/ne1000.rom"
#define ROM_PATH_NE2000 L"roms/network/ne2000/ne2000.rom" #define ROM_PATH_NE2000 L"roms/network/ne2000/ne2000.rom"
@@ -100,7 +100,7 @@ typedef struct {
dp8390_t dp8390; dp8390_t dp8390;
uint8_t macaddr[32]; /* ASIC ROM'd MAC address, even bytes */ uint8_t macaddr[32]; /* ASIC ROM'd MAC address, even bytes */
int board; int board;
int is_pci, is_8bit; int is_pci, is_mca, is_8bit;
const char *name; const char *name;
uint32_t base_address; uint32_t base_address;
int base_irq; int base_irq;
@@ -134,12 +134,20 @@ typedef struct {
/* RTL8019AS/RTL8029AS registers */ /* RTL8019AS/RTL8029AS registers */
uint8_t config0, config2, config3; uint8_t config0, config2, config3;
uint8_t _9346cr; uint8_t _9346cr;
/* POS registers, MCA boards only */
uint8_t pos_regs[8];
} nic_t; } nic_t;
static void nic_rx(void *, uint8_t *, int); static void nic_rx(void *, uint8_t *, int);
static void nic_tx(nic_t *, uint32_t); static void nic_tx(nic_t *, uint32_t);
#define ENABLE_NIC_LOG 3
#ifdef ENABLE_NIC_LOG
int nic_do_log = ENABLE_NIC_LOG;
#endif
static void static void
nelog(int lvl, const char *fmt, ...) nelog(int lvl, const char *fmt, ...)
@@ -182,37 +190,40 @@ nic_reset(void *priv)
nelog(1, "%s: reset\n", dev->name); nelog(1, "%s: reset\n", dev->name);
if (dev->board >= NE2K_NE2000) { if (dev->board == NE2K_NE1000)
/* Initialize the MAC address area by doubling the physical address */ {
dev->macaddr[0] = dev->dp8390.physaddr[0]; /* Initialize the MAC address area by doubling the physical address */
dev->macaddr[1] = dev->dp8390.physaddr[0]; dev->macaddr[0] = dev->dp8390.physaddr[0];
dev->macaddr[2] = dev->dp8390.physaddr[1]; dev->macaddr[1] = dev->dp8390.physaddr[1];
dev->macaddr[3] = dev->dp8390.physaddr[1]; dev->macaddr[2] = dev->dp8390.physaddr[2];
dev->macaddr[4] = dev->dp8390.physaddr[2]; dev->macaddr[3] = dev->dp8390.physaddr[3];
dev->macaddr[5] = dev->dp8390.physaddr[2]; dev->macaddr[4] = dev->dp8390.physaddr[4];
dev->macaddr[6] = dev->dp8390.physaddr[3]; dev->macaddr[5] = dev->dp8390.physaddr[5];
dev->macaddr[7] = dev->dp8390.physaddr[3];
dev->macaddr[8] = dev->dp8390.physaddr[4];
dev->macaddr[9] = dev->dp8390.physaddr[4];
dev->macaddr[10] = dev->dp8390.physaddr[5];
dev->macaddr[11] = dev->dp8390.physaddr[5];
/* ne2k signature */ /* ne1k signature */
for (i=12; i<32; i++) for (i=6; i<16; i++)
dev->macaddr[i] = 0x57; dev->macaddr[i] = 0x57;
} else { }
/* Initialize the MAC address area by doubling the physical address */ else
dev->macaddr[0] = dev->dp8390.physaddr[0]; {
dev->macaddr[1] = dev->dp8390.physaddr[1]; /* Initialize the MAC address area by doubling the physical address */
dev->macaddr[2] = dev->dp8390.physaddr[2]; dev->macaddr[0] = dev->dp8390.physaddr[0];
dev->macaddr[3] = dev->dp8390.physaddr[3]; dev->macaddr[1] = dev->dp8390.physaddr[0];
dev->macaddr[4] = dev->dp8390.physaddr[4]; dev->macaddr[2] = dev->dp8390.physaddr[1];
dev->macaddr[5] = dev->dp8390.physaddr[5]; dev->macaddr[3] = dev->dp8390.physaddr[1];
dev->macaddr[4] = dev->dp8390.physaddr[2];
dev->macaddr[5] = dev->dp8390.physaddr[2];
dev->macaddr[6] = dev->dp8390.physaddr[3];
dev->macaddr[7] = dev->dp8390.physaddr[3];
dev->macaddr[8] = dev->dp8390.physaddr[4];
dev->macaddr[9] = dev->dp8390.physaddr[4];
dev->macaddr[10] = dev->dp8390.physaddr[5];
dev->macaddr[11] = dev->dp8390.physaddr[5];
/* ne1k signature */ /* ne2k signature */
for (i=6; i<16; i++) for (i=12; i<32; i++)
dev->macaddr[i] = 0x57; dev->macaddr[i] = 0x57;
} }
/* Zero out registers and memory */ /* Zero out registers and memory */
memset(&dev->dp8390.CR, 0x00, sizeof(dev->dp8390.CR) ); memset(&dev->dp8390.CR, 0x00, sizeof(dev->dp8390.CR) );
@@ -233,8 +244,10 @@ nic_reset(void *priv)
dev->dp8390.fifo = 0; dev->dp8390.fifo = 0;
dev->dp8390.remote_dma = 0; dev->dp8390.remote_dma = 0;
dev->dp8390.remote_start = 0; dev->dp8390.remote_start = 0;
dev->dp8390.remote_bytes = 0;
dev->dp8390.tallycnt_0 = 0; dev->dp8390.remote_bytes = 0;
dev->dp8390.tallycnt_0 = 0;
dev->dp8390.tallycnt_1 = 0; dev->dp8390.tallycnt_1 = 0;
dev->dp8390.tallycnt_2 = 0; dev->dp8390.tallycnt_2 = 0;
@@ -272,7 +285,7 @@ nic_soft_reset(void *priv)
* The NE2000 memory is accessed through the data port of the * The NE2000 memory is accessed through the data port of the
* ASIC (offset 0) after setting up a remote-DMA transfer. * ASIC (offset 0) after setting up a remote-DMA transfer.
* Both byte and word accesses are allowed. * Both byte and word accesses are allowed.
* The first 16 bytes contains the MAC address at even locations, * The first 16 bytes contain the MAC address at even locations,
* and there is 16K of buffer memory starting at 16K. * and there is 16K of buffer memory starting at 16K.
*/ */
static uint32_t static uint32_t
@@ -284,8 +297,10 @@ chipmem_read(nic_t *dev, uint32_t addr, unsigned int len)
nelog(3, "%s: unaligned chipmem word read\n", dev->name); nelog(3, "%s: unaligned chipmem word read\n", dev->name);
} }
pclog("Chipmem Read Address=%04x\n", addr);
/* ROM'd MAC address */ /* ROM'd MAC address */
if (dev->board >= NE2K_NE2000) { if (dev->board != NE2K_NE1000) {
if (addr <= 31) { if (addr <= 31) {
retval = dev->macaddr[addr % 32]; retval = dev->macaddr[addr % 32];
if ((len == 2) || (len == 4)) { if ((len == 2) || (len == 4)) {
@@ -351,7 +366,9 @@ chipmem_write(nic_t *dev, uint32_t addr, uint32_t val, unsigned len)
nelog(3, "%s: unaligned chipmem word write\n", dev->name); nelog(3, "%s: unaligned chipmem word write\n", dev->name);
} }
if (dev->board >= NE2K_NE2000) { pclog("Chipmem Write Address=%04x\n", addr);
if (dev->board != NE2K_NE1000) {
if ((addr >= DP8390_DWORD_MEMSTART) && (addr < DP8390_DWORD_MEMEND)) { if ((addr >= DP8390_DWORD_MEMSTART) && (addr < DP8390_DWORD_MEMEND)) {
dev->dp8390.mem[addr-DP8390_DWORD_MEMSTART] = val & 0xff; dev->dp8390.mem[addr-DP8390_DWORD_MEMSTART] = val & 0xff;
if ((len == 2) || (len == 4)) { if ((len == 2) || (len == 4)) {
@@ -444,6 +461,25 @@ asic_read(nic_t *dev, uint32_t off, unsigned int len)
case 0x0f: /* Reset register */ case 0x0f: /* Reset register */
nic_soft_reset(dev); nic_soft_reset(dev);
break; break;
case 0x10:
case 0x11:
case 0x12:
case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
case 0x18:
case 0x19:
case 0x1a:
case 0x1b:
case 0x1c:
case 0x1d:
case 0x1e:
case 0x1f:
retval = 0;
break;
default: default:
nelog(3, "%s: ASIC read invalid address %04x\n", nelog(3, "%s: ASIC read invalid address %04x\n",
@@ -454,7 +490,6 @@ asic_read(nic_t *dev, uint32_t off, unsigned int len)
return(retval); return(retval);
} }
static void static void
asic_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len) asic_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
{ {
@@ -500,6 +535,24 @@ asic_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
/* end of reset pulse */ /* end of reset pulse */
break; break;
case 0x10:
case 0x11:
case 0x12:
case 0x13:
case 0x14:
case 0x15:
case 0x16:
case 0x17:
case 0x18:
case 0x19:
case 0x1a:
case 0x1b:
case 0x1c:
case 0x1d:
case 0x1e:
case 0x1f:
break;
default: /* this is invalid, but happens under win95 device detection */ default: /* this is invalid, but happens under win95 device detection */
nelog(3, "%s: ASIC write invalid address %04x, ignoring\n", nelog(3, "%s: ASIC write invalid address %04x, ignoring\n",
dev->name, (unsigned)off); dev->name, (unsigned)off);
@@ -636,16 +689,6 @@ page0_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
{ {
uint8_t val2; uint8_t val2;
/* It appears to be a common practice to use outw on page0 regs... */
/* break up outw into two outb's */
if (len == 2) {
page0_write(dev, off, (val & 0xff), 1);
if (off < 0x0f)
page0_write(dev, off+1, ((val>>8)&0xff), 1);
return;
}
nelog(3, "%s: Page0 write to register 0x%02x, value=0x%02x\n", nelog(3, "%s: Page0 write to register 0x%02x, value=0x%02x\n",
dev->name, off, val); dev->name, off, val);
@@ -1236,7 +1279,7 @@ write_cr(nic_t *dev, uint32_t val)
dev->dp8390.ISR.rdma_done = 1; dev->dp8390.ISR.rdma_done = 1;
if (dev->dp8390.IMR.rdma_inte) { if (dev->dp8390.IMR.rdma_inte) {
nic_interrupt(dev, 1); nic_interrupt(dev, 1);
if (! dev->is_pci) if (!dev->is_pci)
nic_interrupt(dev, 0); nic_interrupt(dev, 0);
} }
} }
@@ -1251,11 +1294,11 @@ nic_read(nic_t *dev, uint32_t addr, unsigned len)
nelog(3, "%s: read addr %x, len %d\n", dev->name, addr, len); nelog(3, "%s: read addr %x, len %d\n", dev->name, addr, len);
if (off >= 0x10) { if (off >= 0x10) {
retval = asic_read(dev, off - 0x10, len); retval = asic_read(dev, off - 0x10, len);
} else if (off == 0x00) { } else if (off == 0x00) {
retval = read_cr(dev); retval = read_cr(dev);
} else switch(dev->dp8390.CR.pgsel) { } else switch(dev->dp8390.CR.pgsel) {
case 0x00: case 0x00:
retval = page0_read(dev, off, len); retval = page0_read(dev, off, len);
break; break;
@@ -1276,8 +1319,8 @@ nic_read(nic_t *dev, uint32_t addr, unsigned len)
nelog(3, "%s: unknown value of pgsel in read - %d\n", nelog(3, "%s: unknown value of pgsel in read - %d\n",
dev->name, dev->dp8390.CR.pgsel); dev->name, dev->dp8390.CR.pgsel);
break; break;
} }
return(retval); return(retval);
} }
@@ -1315,15 +1358,15 @@ nic_write(nic_t *dev, uint32_t addr, uint32_t val, unsigned len)
nelog(3, "%s: write addr %x, value %x len %d\n", dev->name, addr, val, len); nelog(3, "%s: write addr %x, value %x len %d\n", dev->name, addr, val, len);
/* The high 16 bytes of i/o space are for the ne2000 asic - /* The high 16 bytes of i/o space are for the ne2000 asic -
the low 16 bytes are for the DS8390, with the current the low 16 bytes are for the DS8390, with the current
page being selected by the PS0,PS1 registers in the page being selected by the PS0,PS1 registers in the
command register */ command register */
if (off >= 0x10) { if (off >= 0x10) {
asic_write(dev, off - 0x10, val, len); asic_write(dev, off - 0x10, val, len);
} else if (off == 0x00) { } else if (off == 0x00) {
write_cr(dev, val); write_cr(dev, val);
} else switch(dev->dp8390.CR.pgsel) { } else switch(dev->dp8390.CR.pgsel) {
case 0x00: case 0x00:
page0_write(dev, off, val, len); page0_write(dev, off, val, len);
break; break;
@@ -1344,7 +1387,7 @@ nic_write(nic_t *dev, uint32_t addr, uint32_t val, unsigned len)
nelog(3, "%s: unknown value of pgsel in write - %d\n", nelog(3, "%s: unknown value of pgsel in write - %d\n",
dev->name, dev->dp8390.CR.pgsel); dev->name, dev->dp8390.CR.pgsel);
break; break;
} }
} }
@@ -1698,32 +1741,43 @@ nic_iocheckremove(nic_t *dev, uint16_t addr)
static void static void
nic_ioset(nic_t *dev, uint16_t addr) nic_ioset(nic_t *dev, uint16_t addr)
{ {
if (dev->is_pci) { if (dev->is_mca) {
io_sethandler(addr, 16, io_sethandler(addr, 16,
nic_readb, nic_readw, nic_readl, nic_readb, nic_readw, nic_readl,
nic_writeb, nic_writew, nic_writel, dev); nic_writeb, nic_writew, nic_writel, dev);
io_sethandler(addr+16, 16, io_sethandler(addr+16, 16,
nic_readb, nic_readw, nic_readl, nic_readb, nic_readw, nic_readl,
nic_writeb, nic_writew, nic_writel, dev); nic_writeb, nic_writew, nic_writel, dev);
io_sethandler(addr+0x1f, 16,
nic_readb, nic_readw, nic_readl,
nic_writeb, nic_writew, nic_writel, dev);
}
else if (dev->is_pci) {
io_sethandler(addr, 16,
nic_readb, nic_readw, nic_readl,
nic_writeb, nic_writew, nic_writel, dev);
io_sethandler(addr+16, 16,
nic_readb, nic_readw, nic_readl,
nic_writeb, nic_writew, nic_writel, dev);
io_sethandler(addr+0x1f, 1, io_sethandler(addr+0x1f, 1,
nic_readb, nic_readw, nic_readl, nic_readb, nic_readw, nic_readl,
nic_writeb, nic_writew, nic_writel, dev); nic_writeb, nic_writew, nic_writel, dev);
} else { } else {
io_sethandler(addr, 16, io_sethandler(addr, 16,
nic_readb, NULL, NULL, nic_readb, NULL, NULL,
nic_writeb, NULL, NULL, dev); nic_writeb, NULL, NULL, dev);
if (dev->is_8bit) { if (dev->is_8bit) {
io_sethandler(addr+16, 16, io_sethandler(addr+16, 16,
nic_readb, NULL, NULL, nic_readb, NULL, NULL,
nic_writeb, NULL, NULL, dev); nic_writeb, NULL, NULL, dev);
} else { } else {
io_sethandler(addr+16, 16, io_sethandler(addr+16, 16,
nic_readb, nic_readw, NULL, nic_readb, nic_readw, NULL,
nic_writeb, nic_writew, NULL, dev); nic_writeb, nic_writew, NULL, dev);
} }
io_sethandler(addr+0x1f, 1, io_sethandler(addr+0x1f, 1,
nic_readb, NULL, NULL, nic_readb, NULL, NULL,
nic_writeb, NULL, NULL, dev); nic_writeb, NULL, NULL, dev);
} }
} }
@@ -1731,7 +1785,18 @@ nic_ioset(nic_t *dev, uint16_t addr)
static void static void
nic_ioremove(nic_t *dev, uint16_t addr) nic_ioremove(nic_t *dev, uint16_t addr)
{ {
if (dev->is_pci) { if (dev->is_mca) {
io_removehandler(addr, 16,
nic_readb, nic_readw, nic_readl,
nic_writeb, nic_writew, nic_writel, dev);
io_removehandler(addr+16, 16,
nic_readb, nic_readw, nic_readl,
nic_writeb, nic_writew, nic_writel, dev);
io_removehandler(addr+0x1f, 16,
nic_readb, nic_readw, nic_readl,
nic_writeb, nic_writew, nic_writel, dev);
}
else if (dev->is_pci) {
io_removehandler(addr, 16, io_removehandler(addr, 16,
nic_readb, nic_readw, nic_readl, nic_readb, nic_readw, nic_readl,
nic_writeb, nic_writew, nic_writel, dev); nic_writeb, nic_writew, nic_writel, dev);
@@ -2201,6 +2266,59 @@ nic_rom_init(nic_t *dev, wchar_t *s)
dev->name, dev->bios_addr, dev->bios_size); dev->name, dev->bios_addr, dev->bios_size);
} }
static uint8_t
nic_mca_read(int port, void *priv)
{
nic_t *dev = (nic_t *)priv;
return(dev->pos_regs[port & 7]);
}
#define MCA_7154_IO_PORTS { 0x1000, 0x2020, 0x8020, 0xa0a0, 0xb0b0, 0xc0c0, \
0xc3d0 }
#define MCA_7154_IRQS { 3, 4, 5, 9 }
static void
nic_mca_write(int port, uint8_t val, void *priv)
{
nic_t *dev = (nic_t *)priv;
uint16_t novell_base[7] = MCA_7154_IO_PORTS;
int8_t novell_irq[4] = MCA_7154_IRQS;
/* MCA does not write registers below 0x0100. */
if (port < 0x0102) return;
/* Save the MCA register value. */
dev->pos_regs[port & 7] = val;
nic_ioremove(dev, dev->base_address);
/* This is always necessary so that the old handler doesn't remain. */
/* Get the new assigned I/O base address. */
dev->base_address = novell_base[((dev->pos_regs[2] & 0xE) >> 1) - 1];
/* Save the new IRQ values. */
dev->base_irq = novell_irq[(dev->pos_regs[2] & 0x60) >> 5];
dev->bios_addr = 0x0000;
dev->has_bios = 0;
/*
* The PS/2 Model 80 BIOS always enables a card if it finds one,
* even if no resources were assigned yet (because we only added
* the card, but have not run AutoConfig yet...)
*
* So, remove current address, if any.
*/
/* Initialize the device if fully configured. */
if (dev->pos_regs[2] & 0x01) {
/* Card enabled; register (new) I/O handler. */
nic_ioset(dev, dev->base_address);
}
}
static void * static void *
nic_init(const device_t *info) nic_init(const device_t *info)
@@ -2237,6 +2355,17 @@ nic_init(const device_t *info)
dev->maclocal[2] = 0xD8; dev->maclocal[2] = 0xD8;
rom = (dev->board == NE2K_NE1000) ? NULL : ROM_PATH_NE2000; rom = (dev->board == NE2K_NE1000) ? NULL : ROM_PATH_NE2000;
break; break;
case NE2K_NE2_MCA:
pclog("NE/2 adapter\n");
dev->is_mca = 1;
dev->maclocal[0] = 0x00; /* 00:00:D8 (Novell OID) */
dev->maclocal[1] = 0x00;
dev->maclocal[2] = 0xD8;
dev->pos_regs[0] = 0x54;
dev->pos_regs[1] = 0x71;
rom = NULL;
break;
case NE2K_RTL8019AS: case NE2K_RTL8019AS:
case NE2K_RTL8029AS: case NE2K_RTL8029AS:
@@ -2259,14 +2388,19 @@ nic_init(const device_t *info)
dev->has_bios = 0; dev->has_bios = 0;
} }
} else { } else {
dev->base_address = device_get_config_hex16("base"); if (dev->board != NE2K_NE2_MCA) {
dev->base_irq = device_get_config_int("irq"); dev->base_address = device_get_config_hex16("base");
if (dev->board == NE2K_NE2000) { dev->base_irq = device_get_config_int("irq");
dev->bios_addr = device_get_config_hex20("bios_addr"); if (dev->board == NE2K_NE2000) {
dev->has_bios = !!dev->bios_addr; dev->bios_addr = device_get_config_hex20("bios_addr");
} else { dev->has_bios = !!dev->bios_addr;
dev->bios_addr = 0x00000; } else {
dev->has_bios = 0; dev->bios_addr = 0x00000;
dev->has_bios = 0;
}
}
else {
mca_add(nic_mca_read, nic_mca_write, dev);
} }
} }
@@ -2277,7 +2411,7 @@ nic_init(const device_t *info)
* Make this device known to the I/O system. * Make this device known to the I/O system.
* PnP and PCI devices start with address spaces inactive. * PnP and PCI devices start with address spaces inactive.
*/ */
if (dev->board < NE2K_RTL8019AS) if (dev->board < NE2K_RTL8019AS && dev->board != NE2K_NE2_MCA)
nic_ioset(dev, dev->base_address); nic_ioset(dev, dev->base_address);
/* Set up our BIOS ROM space, if any. */ /* Set up our BIOS ROM space, if any. */
@@ -2439,7 +2573,7 @@ nic_init(const device_t *info)
} }
/* Reset the board. */ /* Reset the board. */
nic_reset(dev); nic_reset(dev);
/* Attach ourselves to the network module. */ /* Attach ourselves to the network module. */
network_attach(dev, dev->dp8390.physaddr, nic_rx); network_attach(dev, dev->dp8390.physaddr, nic_rx);
@@ -2504,15 +2638,18 @@ static const device_config_t ne1000_config[] =
{ {
"IRQ 3", 3 "IRQ 3", 3
}, },
{
"IRQ 4", 4
},
{ {
"IRQ 5", 5 "IRQ 5", 5
}, },
{ {
"IRQ 7", 7 "IRQ 7", 7
}, },
{
"IRQ 10", 10
},
{
"IRQ 11", 11
},
{ {
"" ""
} }
@@ -2563,9 +2700,6 @@ static const device_config_t ne2000_config[] =
{ {
"IRQ 3", 3 "IRQ 3", 3
}, },
{
"IRQ 4", 4
},
{ {
"IRQ 5", 5 "IRQ 5", 5
}, },
@@ -2634,6 +2768,17 @@ static const device_config_t rtl8029as_config[] =
} }
}; };
static const device_config_t mca_mac_config[] =
{
{
"mac", "MAC Address", CONFIG_MAC, "", -1
},
{
"", "", -1
}
};
const device_t ne1000_device = { const device_t ne1000_device = {
"Novell NE1000", "Novell NE1000",
@@ -2653,6 +2798,15 @@ const device_t ne2000_device = {
ne2000_config ne2000_config
}; };
const device_t ne2_device = {
"Novell NE/2",
DEVICE_MCA,
NE2K_NE2_MCA,
nic_init, nic_close, NULL,
NULL, NULL, NULL,
mca_mac_config
};
const device_t rtl8019as_device = { const device_t rtl8019as_device = {
"Realtek RTL8019AS", "Realtek RTL8019AS",
DEVICE_ISA | DEVICE_AT, DEVICE_ISA | DEVICE_AT,

10
src/network/net_ne2000.h
View File

@@ -38,15 +38,17 @@
enum { enum {
NE2K_NONE = 0, NE2K_NONE = 0,
NE2K_NE1000, /* 8-bit ISA NE1000 */ NE2K_NE1000 = 1, /* 8-bit ISA NE1000 */
NE2K_NE2000, /* 16-bit ISA NE2000 */ NE2K_NE2000 = 2, /* 16-bit ISA NE2000 */
NE2K_RTL8019AS, /* 16-bit ISA PnP Realtek 8019AS */ NE2K_NE2_MCA = 3, /* 16-bit MCA NE/2 */
NE2K_RTL8029AS /* 32-bit PCI Realtek 8029AS */ NE2K_RTL8019AS = 4, /* 16-bit ISA PnP Realtek 8019AS */
NE2K_RTL8029AS = 5 /* 32-bit PCI Realtek 8029AS */
}; };
extern const device_t ne1000_device; extern const device_t ne1000_device;
extern const device_t ne2000_device; extern const device_t ne2000_device;
extern const device_t ne2_device;
extern const device_t rtl8019as_device; extern const device_t rtl8019as_device;
extern const device_t rtl8029as_device; extern const device_t rtl8029as_device;

1733
src/network/net_wd8003.c Normal file
View File

File diff suppressed because it is too large Load Diff

49
src/network/net_wd8003.h Normal file
View File

@@ -0,0 +1,49 @@
/*
* VARCem Virtual ARchaeological Computer EMulator.
* An emulator of (mostly) x86-based PC systems and devices,
* using the ISA,EISA,VLB,MCA and PCI system buses, roughly
* spanning the era between 1981 and 1995.
*
* This file is part of the VARCem Project.
*
* Definitions for the NE2000 ethernet controller.
*
* Version: @(#)net_ne2000.h 1.0.2 2018/03/15
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2017,2018 Fred N. van Kempen.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#ifndef NET_WD8003_H
# define NET_WD8003_H
enum {
WD_NONE = 0,
WD8003E = 1, /* 8-bit ISA WD8003E */
WD8013EBT = 2, /* 16-bit ISA WD8013EBT */
WD8013EPA = 3 /* MCA WD8013EP/A */
};
extern const device_t wd8003e_device;
extern const device_t wd8013ebt_device;
extern const device_t wd8013epa_device;
#endif /*NET_WD8003_H*/

9
src/network/network.c
View File

@@ -62,6 +62,7 @@
#include "network.h" #include "network.h"
#include "net_3c503.h" #include "net_3c503.h"
#include "net_ne2000.h" #include "net_ne2000.h"
#include "net_wd8003.h"
static netcard_t net_cards[] = { static netcard_t net_cards[] = {
@@ -75,6 +76,14 @@ static netcard_t net_cards[] = {
NULL }, NULL },
{ "[ISA] Realtek RTL8019AS", "ne2kpnp", &rtl8019as_device, { "[ISA] Realtek RTL8019AS", "ne2kpnp", &rtl8019as_device,
NULL }, NULL },
{ "[ISA] Western Digital WD8003E","wd8003e", &wd8003e_device,
NULL },
{ "[ISA] Western Digital WD8013EBT","wd8013ebt", &wd8013ebt_device,
NULL },
{ "[MCA] Novell NE/2", "ne2", &ne2_device,
NULL },
{ "[MCA] Western Digital WD8013EP/A","wd8013epa", &wd8013epa_device,
NULL },
{ "[PCI] Realtek RTL8029AS", "ne2kpci", &rtl8029as_device, { "[PCI] Realtek RTL8029AS", "ne2kpci", &rtl8029as_device,
NULL }, NULL },
{ "", "", NULL, { "", "", NULL,

1486
src/scsi/scsi_ncr5380.c
View File

File diff suppressed because it is too large Load Diff

82
src/video/vid_et4000.c
View File

@@ -23,6 +23,7 @@
#include <wchar.h> #include <wchar.h>
#include "../86box.h" #include "../86box.h"
#include "../io.h" #include "../io.h"
#include "../mca.h"
#include "../mem.h" #include "../mem.h"
#include "../rom.h" #include "../rom.h"
#include "../device.h" #include "../device.h"
@@ -43,6 +44,10 @@ typedef struct et4000_t
rom_t bios_rom; rom_t bios_rom;
uint8_t banking; uint8_t banking;
uint8_t pos_regs[8];
int is_mca;
} et4000_t; } et4000_t;
static uint8_t crtc_mask[0x40] = static uint8_t crtc_mask[0x40] =
@@ -112,6 +117,16 @@ uint8_t et4000_in(uint16_t addr, void *p)
switch (addr) switch (addr)
{ {
case 0x3c2:
if (et4000->is_mca)
{
if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e)
return 0;
else
return 0x10;
}
break;
case 0x3C5: case 0x3C5:
if ((svga->seqaddr & 0xf) == 7) return svga->seqregs[svga->seqaddr & 0xf] | 4; if ((svga->seqaddr & 0xf) == 7) return svga->seqregs[svga->seqaddr & 0xf] | 4;
break; break;
@@ -160,11 +175,13 @@ void et4000_recalctimings(svga_t *svga)
} }
} }
void *et4000_init(const device_t *info) void *et4000_isa_init(const device_t *info)
{ {
et4000_t *et4000 = malloc(sizeof(et4000_t)); et4000_t *et4000 = malloc(sizeof(et4000_t));
memset(et4000, 0, sizeof(et4000_t)); memset(et4000, 0, sizeof(et4000_t));
et4000->is_mca = 0;
rom_init(&et4000->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); rom_init(&et4000->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
io_sethandler(0x03c0, 0x0020, et4000_in, NULL, NULL, et4000_out, NULL, NULL, et4000); io_sethandler(0x03c0, 0x0020, et4000_in, NULL, NULL, et4000_out, NULL, NULL, et4000);
@@ -178,6 +195,51 @@ void *et4000_init(const device_t *info)
return et4000; return et4000;
} }
static uint8_t
et4000_mca_read(int port, void *priv)
{
et4000_t *et4000 = (et4000_t *)priv;
return(et4000->pos_regs[port & 7]);
}
static void
et4000_mca_write(int port, uint8_t val, void *priv)
{
et4000_t *et4000 = (et4000_t *)priv;
/* MCA does not write registers below 0x0100. */
if (port < 0x0102) return;
/* Save the MCA register value. */
et4000->pos_regs[port & 7] = val;
}
void *et4000_mca_init(const device_t *info)
{
et4000_t *et4000 = malloc(sizeof(et4000_t));
memset(et4000, 0, sizeof(et4000_t));
et4000->is_mca = 1;
/* Enable MCA. */
et4000->pos_regs[0] = 0xF2; /* ET4000 MCA board ID */
et4000->pos_regs[1] = 0x80;
mca_add(et4000_mca_read, et4000_mca_write, et4000);
rom_init(&et4000->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
svga_init(&et4000->svga, et4000, 1 << 20, /*1mb*/
et4000_recalctimings,
et4000_in, et4000_out,
NULL,
NULL);
io_sethandler(0x03c0, 0x0020, et4000_in, NULL, NULL, et4000_out, NULL, NULL, et4000);
return et4000;
}
static int et4000_available(void) static int et4000_available(void)
{ {
return rom_present(BIOS_ROM_PATH); return rom_present(BIOS_ROM_PATH);
@@ -206,13 +268,25 @@ void et4000_force_redraw(void *p)
et4000->svga.fullchange = changeframecount; et4000->svga.fullchange = changeframecount;
} }
const device_t et4000_device = const device_t et4000_isa_device =
{ {
"Tseng Labs ET4000AX", "Tseng Labs ET4000AX (ISA)",
DEVICE_ISA, 0, DEVICE_ISA, 0,
et4000_init, et4000_close, NULL, et4000_isa_init, et4000_close, NULL,
et4000_available, et4000_available,
et4000_speed_changed, et4000_speed_changed,
et4000_force_redraw, et4000_force_redraw,
NULL NULL
}; };
const device_t et4000_mca_device =
{
"Tseng Labs ET4000AX (MCA)",
DEVICE_MCA, 0,
et4000_mca_init, et4000_close, NULL,
et4000_available,
et4000_speed_changed,
et4000_force_redraw,
NULL
};

3
src/video/vid_et4000.h
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@@ -1,4 +1,5 @@
/* Copyright holders: Sarah Walker /* Copyright holders: Sarah Walker
see COPYING for more details see COPYING for more details
*/ */
extern const device_t et4000_device; extern const device_t et4000_isa_device;
extern const device_t et4000_mca_device;

5
src/video/vid_table.c
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@@ -126,10 +126,11 @@ video_cards[] = {
{ "[ISA] TI CF62011 SVGA", "ti_cf62011", &ti_cf62011_device, GFX_TICF62011, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, { "[ISA] TI CF62011 SVGA", "ti_cf62011", &ti_cf62011_device, GFX_TICF62011, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
#endif #endif
{"[ISA] Trident TVGA8900D", "tvga8900d", &tvga8900d_device, GFX_TVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}}, {"[ISA] Trident TVGA8900D", "tvga8900d", &tvga8900d_device, GFX_TVGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 8, 8, 12}},
{"[ISA] Tseng ET4000AX", "et4000ax", &et4000_device, GFX_ET4000, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}}, {"[ISA] Tseng ET4000AX", "et4000ax", &et4000_isa_device, GFX_ET4000_ISA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 3, 3, 6, 5, 5, 10}},
{"[ISA] VGA", "vga", &vga_device, GFX_VGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, {"[ISA] VGA", "vga", &vga_device, GFX_VGA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{"[ISA] Wyse 700", "wy700", &wy700_device, GFX_WY700, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}}, {"[ISA] Wyse 700", "wy700", &wy700_device, GFX_WY700, VIDEO_FLAG_TYPE_CGA, {VIDEO_ISA, 8, 16, 32, 8, 16, 32}},
{"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, GFX_MACH64GX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, {"[MCA] Tseng ET4000AX", "et4000mca", &et4000_mca_device, GFX_ET4000_MCA, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 3, 3, 6, 5, 5, 10}},
{"[PCI] ATI Graphics Pro Turbo (Mach64 GX)", "mach64gx_pci", &mach64gx_pci_device, GFX_MACH64GX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}},
{"[PCI] ATI Video Xpression (Mach64 VT2)", "mach64vt2", &mach64vt2_device, GFX_MACH64VT2, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}}, {"[PCI] ATI Video Xpression (Mach64 VT2)", "mach64vt2", &mach64vt2_device, GFX_MACH64VT2, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 2, 2, 1, 20, 20, 21}},
{"[PCI] Cardex Tseng ET4000/w32p", "et4000w32p_pci", &et4000w32p_cardex_pci_device, GFX_ET4000W32_CARDEX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}}, {"[PCI] Cardex Tseng ET4000/w32p", "et4000w32p_pci", &et4000w32p_cardex_pci_device, GFX_ET4000W32_CARDEX_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 4, 10, 10, 10}},
{"[PCI] Cirrus Logic CL-GD 5430", "cl_gd5430_pci", &gd5430_pci_device, GFX_CL_GD5430_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}}, {"[PCI] Cirrus Logic CL-GD 5430", "cl_gd5430_pci", &gd5430_pci_device, GFX_CL_GD5430_PCI, VIDEO_FLAG_TYPE_SPECIAL, {VIDEO_BUS, 4, 4, 8, 10, 10, 20}},

3
src/video/video.h
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@@ -44,7 +44,8 @@ enum {
GFX_SUPER_EGA, /* Using Chips & Technologies SuperEGA BIOS */ GFX_SUPER_EGA, /* Using Chips & Technologies SuperEGA BIOS */
GFX_VGA, /* IBM VGA */ GFX_VGA, /* IBM VGA */
GFX_TVGA, /* Using Trident TVGA8900D BIOS */ GFX_TVGA, /* Using Trident TVGA8900D BIOS */
GFX_ET4000, /* Tseng ET4000 */ GFX_ET4000_ISA, /* Tseng ET4000 */
GFX_ET4000_MCA, /* Tseng ET4000 */
GFX_ET4000W32_CARDEX_VLB, /* Tseng ET4000/W32p (Cardex) VLB */ GFX_ET4000W32_CARDEX_VLB, /* Tseng ET4000/W32p (Cardex) VLB */
GFX_ET4000W32_CARDEX_PCI, /* Tseng ET4000/W32p (Cardex) PCI */ GFX_ET4000W32_CARDEX_PCI, /* Tseng ET4000/W32p (Cardex) PCI */
#if defined(DEV_BRANCH) && defined(USE_STEALTH32) #if defined(DEV_BRANCH) && defined(USE_STEALTH32)

3
src/win/Makefile.mingw
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@@ -490,7 +490,8 @@ NETOBJ := network.o \
ip_input.o queue.o tcp_input.o debug.o ip_output.o \ ip_input.o queue.o tcp_input.o debug.o ip_output.o \
sbuf.o tcp_output.o udp.o if.o mbuf.o slirp.o tcp_subr.o \ sbuf.o tcp_output.o udp.o if.o mbuf.o slirp.o tcp_subr.o \
net_dp8390.o \ net_dp8390.o \
net_3c503.o net_ne2000.o net_3c503.o net_ne2000.o \
net_wd8003.o
SNDOBJ := sound.o \ SNDOBJ := sound.o \
openal.o \ openal.o \