9001st update on Cirrus banking...
1. VRAM mask consistency... 2. Don't apply the IBM VGA mode check to linear functions, where banking isn't used at all.
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@@ -816,6 +816,7 @@ gd54xx_out(uint16_t addr, uint8_t val, void *priv)
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svga->seqregs[svga->seqaddr] &= 0x0f;
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if (svga->crtc[0x27] >= CIRRUS_ID_CLGD5429)
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svga->set_reset_disabled = svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA;
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gd54xx_recalc_banking(gd54xx);
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gd54xx_set_svga_fast(gd54xx);
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svga_recalctimings(svga);
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break;
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@@ -2009,11 +2010,11 @@ gd54xx_hwcursor_draw(svga_t *svga, int displine)
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svga->hwcursor_latch.addr += pitch;
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for (int x = 0; x < svga->hwcursor.cur_xsize; x += 8) {
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dat[0] = svga->vram[svga->hwcursor_latch.addr & svga->vram_display_mask];
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dat[0] = svga->vram[svga->hwcursor_latch.addr & gd54xx->vram_mask];
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if (svga->hwcursor.cur_xsize == 64)
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dat[1] = svga->vram[(svga->hwcursor_latch.addr + 0x08) & svga->vram_display_mask];
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dat[1] = svga->vram[(svga->hwcursor_latch.addr + 0x08) & gd54xx->vram_mask];
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else
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dat[1] = svga->vram[(svga->hwcursor_latch.addr + 0x80) & svga->vram_display_mask];
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dat[1] = svga->vram[(svga->hwcursor_latch.addr + 0x80) & gd54xx->vram_mask];
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for (uint8_t xx = 0; xx < 8; xx++) {
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b0 = (dat[0] >> (7 - xx)) & 1;
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b1 = (dat[1] >> (7 - xx)) & 1;
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@@ -2350,7 +2351,7 @@ gd54xx_readb_linear(uint32_t addr, void *priv)
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uint8_t ap = gd54xx_get_aperture(addr);
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addr &= 0x003fffff; /* 4 MB mask */
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA) || !(svga->gdcreg[5] & 0x40))
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA))
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return svga_read_linear(addr, svga);
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if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) {
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@@ -2393,7 +2394,7 @@ gd54xx_readw_linear(uint32_t addr, void *priv)
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addr &= 0x003fffff; /* 4 MB mask */
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA) || !(svga->gdcreg[5] & 0x40))
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA))
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return svga_readw_linear(addr, svga);
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if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) {
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@@ -2443,7 +2444,7 @@ gd54xx_readl_linear(uint32_t addr, void *priv)
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addr &= 0x003fffff; /* 4 MB mask */
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA) || !(svga->gdcreg[5] & 0x40))
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA))
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return svga_readl_linear(addr, svga);
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if ((addr >= (svga->vram_max - 256)) && (addr < svga->vram_max)) {
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@@ -2583,7 +2584,7 @@ gd54xx_writeb_linear(uint32_t addr, uint8_t val, void *priv)
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uint8_t ap = gd54xx_get_aperture(addr);
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA) || !(svga->gdcreg[5] & 0x40)) {
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA)) {
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svga_write_linear(addr, val, svga);
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return;
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}
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@@ -2630,7 +2631,7 @@ gd54xx_writew_linear(uint32_t addr, uint16_t val, void *priv)
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uint32_t old_addr = addr;
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uint8_t ap = gd54xx_get_aperture(addr);
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA) || !(svga->gdcreg[5] & 0x40)) {
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA)) {
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svga_writew_linear(addr, val, svga);
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return;
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}
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@@ -2697,7 +2698,7 @@ gd54xx_writel_linear(uint32_t addr, uint32_t val, void *priv)
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uint32_t old_addr = addr;
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uint8_t ap = gd54xx_get_aperture(addr);
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA) || !(svga->gdcreg[5] & 0x40)) {
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if (!(svga->seqregs[0x07] & CIRRUS_SR7_BPP_SVGA)) {
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svga_writel_linear(addr, val, svga);
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return;
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}
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