Fixed some compile-breaking mistakes in the CPU code.

This commit is contained in:
OBattler
2020-11-16 00:06:33 +01:00
parent 0faf6692c9
commit 32dfbdd082
3 changed files with 6 additions and 3 deletions

View File

@@ -170,7 +170,9 @@ extern void x386_dynarec_log(const char *fmt, ...);
#include "x86_ops_bcd.h"
#include "x86_ops_bit.h"
#include "x86_ops_bitscan.h"
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
#include "x86_ops_cyrix.h"
#endif
#include "x86_ops_flag.h"
#include "x86_ops_fpu.h"
#include "x86_ops_inc_dec.h"

View File

@@ -414,11 +414,10 @@ cpu_set(void)
/* The Samuel 2 datasheet claims it's Celeron-compatible. */
is_p6 |= (cpu_s->cpu_type == CPU_CYRIX3S);
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
is_cx6x86 = (cpu_s->cpu_type == CPU_PENTIUMPRO) || (cpu_s->cpu_type == CPU_PENTIUM2) ||
(cpu_s->cpu_type == CPU_PENTIUM2D);
#else
is_cx6x86 = (cpu_s->cpu_type == CPU_Cx6x86) || (cpu_s->cpu_type == CPU_Cx6x86MX) ||
(cpu_s->cpu_type == CPU_Cx6x86L) || (cpu_s->cpu_type == CPU_CxGX1);
#else
is_cx6x86 = 0;
#endif
hasfpu = (fpu_type != FPU_NONE);
hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL);

View File

@@ -86,6 +86,7 @@ static int opMOVD_mm_l_a32(uint32_t fetchdat)
return 0;
}
#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
/*Cyrix maps both MOVD and SMINT to the same opcode*/
static int opMOVD_mm_l_a16_cx(uint32_t fetchdat)
{
@@ -131,6 +132,7 @@ static int opMOVD_mm_l_a32_cx(uint32_t fetchdat)
}
return 0;
}
#endif
static int opMOVQ_q_mm_a16(uint32_t fetchdat)
{