Fixed some compile-breaking mistakes in the CPU code.
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@@ -170,7 +170,9 @@ extern void x386_dynarec_log(const char *fmt, ...);
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#include "x86_ops_bcd.h"
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#include "x86_ops_bit.h"
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#include "x86_ops_bitscan.h"
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#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
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#include "x86_ops_cyrix.h"
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#endif
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#include "x86_ops_flag.h"
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#include "x86_ops_fpu.h"
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#include "x86_ops_inc_dec.h"
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@@ -414,11 +414,10 @@ cpu_set(void)
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/* The Samuel 2 datasheet claims it's Celeron-compatible. */
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is_p6 |= (cpu_s->cpu_type == CPU_CYRIX3S);
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#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
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is_cx6x86 = (cpu_s->cpu_type == CPU_PENTIUMPRO) || (cpu_s->cpu_type == CPU_PENTIUM2) ||
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(cpu_s->cpu_type == CPU_PENTIUM2D);
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#else
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is_cx6x86 = (cpu_s->cpu_type == CPU_Cx6x86) || (cpu_s->cpu_type == CPU_Cx6x86MX) ||
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(cpu_s->cpu_type == CPU_Cx6x86L) || (cpu_s->cpu_type == CPU_CxGX1);
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#else
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is_cx6x86 = 0;
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#endif
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hasfpu = (fpu_type != FPU_NONE);
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hascache = (cpu_s->cpu_type >= CPU_486SLC) || (cpu_s->cpu_type == CPU_IBM386SLC || cpu_s->cpu_type == CPU_IBM486SLC || cpu_s->cpu_type == CPU_IBM486BL);
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@@ -86,6 +86,7 @@ static int opMOVD_mm_l_a32(uint32_t fetchdat)
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return 0;
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}
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#if defined(DEV_BRANCH) && defined(USE_CYRIX_6X86)
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/*Cyrix maps both MOVD and SMINT to the same opcode*/
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static int opMOVD_mm_l_a16_cx(uint32_t fetchdat)
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{
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@@ -131,6 +132,7 @@ static int opMOVD_mm_l_a32_cx(uint32_t fetchdat)
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}
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return 0;
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}
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#endif
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static int opMOVQ_q_mm_a16(uint32_t fetchdat)
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{
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