80486DX2-66/86Box-fork
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Fix build headers and dumb cirrus undeclared parts.

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This commit is contained in:
TC1995
2021-05-30 02:01:16 +02:00
parent d63ce5ab82
commit 35b5301670
3 changed files with 17 additions and 9 deletions
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10
src/include/86box/vid_svga.h
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@@ -146,6 +146,16 @@ typedef struct svga_t
/*Used to implement CRTC[0x17] bit 2 hsync divisor*/
int hsync_divisor;
/*Tseng-style chain4 mode - CRTC dword mode is the same as byte mode, chain4
addresses are shifted to match*/
int packed_chain4;
/*Force CRTC to dword mode, regardless of CR14/CR17. Required for S3 enhanced mode*/
int force_dword_mode;
int remap_required;
uint32_t (*remap_func)(struct svga_t *svga, uint32_t in_addr);
void *ramdac, *clock_gen;
} svga_t;

3
src/include/86box/vid_svga_render.h
View File

@@ -27,6 +27,8 @@ extern int scrollcache;
extern uint8_t edatlookup[4][4];
void svga_recalc_remap_func(svga_t *svga);
void svga_render_null(svga_t *svga);
void svga_render_blank(svga_t *svga);
void svga_render_overscan_left(svga_t *svga);
@@ -37,6 +39,7 @@ void svga_render_text_80_ksc5601(svga_t *svga);
void svga_render_2bpp_lowres(svga_t *svga);
void svga_render_2bpp_highres(svga_t *svga);
void svga_render_2bpp_headland_highres(svga_t *svga);
void svga_render_4bpp_lowres(svga_t *svga);
void svga_render_4bpp_highres(svga_t *svga);
void svga_render_8bpp_lowres(svga_t *svga);

13
src/video/vid_cl54xx.c
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@@ -151,7 +151,7 @@ typedef struct gd54xx_t
mem_mapping_t aperture2_mapping;
mem_mapping_t vgablt_mapping;
svga_t svga, *mb_vga;
svga_t svga;
int has_bios, rev,
bit32;
@@ -215,7 +215,6 @@ typedef struct gd54xx_t
int card;
uint8_t pos_regs[8];
int vidsys_ena;
uint32_t lfb_base, vgablt_base;
@@ -1024,11 +1023,7 @@ gd54xx_out(uint16_t addr, uint8_t val, void *p)
}
}
return;
case 0x46e8:
pclog("port 46e8 = %02x\n", val & 0x18);
break;
case 0x3d4:
svga->crtcreg = val & gd54xx->crtcreg_mask;
return;
@@ -2001,7 +1996,7 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
switch (svga->writemode) {
case 4:
if (svga->adv_flags & FLAG_ADDR_BY16) {
if (svga->gdcreg[0xb] & 0x10) {
addr <<= 2;
addr &= svga->decode_mask;
@@ -2023,7 +2018,7 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
break;
case 5:
if (svga->adv_flags & FLAG_ADDR_BY16) {
if (svga->gdcreg[0xb] & 0x10) {
addr <<= 2;
addr &= svga->decode_mask;