First batch of Acer A1G fixes, fixes #3992.
This commit is contained in:
@@ -1231,6 +1231,10 @@ pc_reset_hard_init(void)
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device_reset_all(DEVICE_PCI);
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}
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/* Mark IDE shadow drives (slaves with a present master) as such in case
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the IDE controllers present are not some form of PCI. */
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ide_drives_set_shadow();
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/* Reset the CPU module. */
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resetx86();
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dma_reset();
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@@ -2977,6 +2977,22 @@ ide_board_reset(int board)
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ide_drive_reset(d);
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}
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void
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ide_drives_set_shadow(void)
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{
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for (uint8_t d = 0; d < IDE_NUM; d++) {
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if (ide_drives[d] == NULL)
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continue;
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if ((d & 1) && (ide_drives[d]->type == IDE_NONE) && (ide_drives[d ^ 1]->type != IDE_NONE)) {
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ide_drives[d]->type = ide_drives[d ^ 1]->type | IDE_SHADOW;
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if (ide_drives[d]->tf != NULL)
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free(ide_drives[d]->tf);
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ide_drives[d]->tf = ide_drives[d ^ 1]->tf;
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}
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}
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}
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/* Reset a standalone IDE unit. */
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static void
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ide_reset(UNUSED(void *priv))
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@@ -188,6 +188,8 @@ extern void ide_atapi_attach(ide_t *dev);
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extern void *ide_xtide_init(void);
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extern void ide_xtide_close(void);
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extern void ide_drives_set_shadow(void);
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extern void ide_writew(uint16_t addr, uint16_t val, void *priv);
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extern void ide_write_devctl(uint16_t addr, uint8_t val, void *priv);
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extern void ide_writeb(uint16_t addr, uint8_t val, void *priv);
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@@ -19,6 +19,7 @@
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extern void vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv);
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extern const device_t acc3221_device;
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extern const device_t ali5105_device;
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extern const device_t ali5123_device;
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extern const device_t f82c710_device;
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extern const device_t f82c606_device;
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@@ -381,10 +381,9 @@ machine_at_acera1g_init(const machine_t *model)
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device_add(&gd5428_onboard_device);
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device_add(&keyboard_ps2_acer_pci_device);
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device_add(&ide_isa_2ch_device);
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device_add(&ide_vlb_2ch_device);
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if (fdc_type == FDC_INTERNAL)
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device_add(&fdc_at_device);
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device_add(&ali5105_device);
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return ret;
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}
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@@ -8,15 +8,13 @@
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*
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* Emulation of the NatSemi PC87310 Super I/O chip.
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*
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*
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*
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* Authors: Miran Grca, <mgrca8@gmail.com>
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* Tiseno100
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* EngiNerd <webmaster.crrc@yahoo.it>
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* EngiNerd, <webmaster.crrc@yahoo.it>
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* Tiseno100,
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*
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* Copyright 2020 Miran Grca.
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* Copyright 2020 Tiseno100
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* Copyright 2020-2024 Miran Grca.
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* Copyright 2021 EngiNerd.
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* Copyright 2020 Tiseno100.
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*/
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#include <stdarg.h>
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#include <stdio.h>
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@@ -42,7 +40,8 @@
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#include <86box/sio.h>
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#include <86box/plat_unused.h>
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#define HAS_IDE_FUNCTIONALITY dev->ide_function
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#define FLAG_IDE 0x00000001
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#define FLAG_ALI 0x00000002
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#ifdef ENABLE_PC87310_LOG
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int pc87310_do_log = ENABLE_PC87310_LOG;
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@@ -64,8 +63,8 @@ pc87310_log(const char *fmt, ...)
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typedef struct pc87310_t {
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uint8_t tries;
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uint8_t ide_function;
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uint8_t reg;
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uint8_t flags;
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uint8_t regs[2];
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fdc_t *fdc;
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serial_t *uart[2];
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} pc87310_t;
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@@ -83,7 +82,9 @@ lpt1_handler(pc87310_t *dev)
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* 10 278h
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* 11 disabled
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*/
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temp = dev->reg & 3;
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temp = dev->regs[1] & 0x03;
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lpt1_remove();
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switch (temp) {
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case 0:
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@@ -111,23 +112,59 @@ lpt1_handler(pc87310_t *dev)
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}
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static void
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serial_handler(pc87310_t *dev, int uart)
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serial_handler(pc87310_t *dev)
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{
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int temp;
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/* bit 2: disable serial port 1
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* bit 3: disable serial port 2
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* bit 4: swap serial ports
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uint8_t temp, temp2 = 0x00;
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uint16_t base1 = 0x0000, base2 = 0x0000;
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uint8_t irq1, irq2;
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/* - Bit 2: Disable serial port 1;
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* - Bit 3: Disable serial port 2;
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* - Bit 4: Swap serial ports.
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*/
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temp = (dev->reg >> (2 + uart)) & 1;
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temp = (dev->regs[1] >> 2) & 0x07;
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// current serial port is enabled
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if (!temp) {
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// configure serial port as COM2
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if (((dev->reg >> 4) & 1) ^ uart)
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serial_setup(dev->uart[uart], COM2_ADDR, COM2_IRQ);
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// configure serial port as COM1
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else
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serial_setup(dev->uart[uart], COM1_ADDR, COM1_IRQ);
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/* - Bits 1, 0: 0, 0 = Normal (3F8 and 2F8);
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* 0, 1 = 2E8 instead of 2F8;
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* 1, 0 = 3E8 instead of 3F8 and 2E8 instead of 2F8;
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* 1, 1 = 3E8 instead of 3F8.
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*
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* If we XOR bit 0 with bit 1, we get this:
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* 0, 0 = Normal (3F8 and 2F8);
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* 0, 1 = 2E8 instead of 2F8;
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* 1, 0 = 3E8 instead of 3F8;
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* 1, 1 = 3E8 instead of 3F8 and 2E8 instead of 2F8.
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*
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* Then they become simple toggle bits.
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* Therefore, we do this for easier operation.
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*/
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if (dev->flags & FLAG_ALI) {
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temp2 = dev->regs[0] & 0x03;
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temp2 ^= ((temp2 & 0x02) >> 1);
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}
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serial_remove(dev->uart[0]);
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serial_remove(dev->uart[1]);
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if (!(temp & 0x01)) {
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base1 = (temp & 0x04) ? COM2_ADDR : COM1_ADDR;
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if ((base1 == COM1_ADDR) && (temp2 & 0x02))
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base1 = 0x03e8;
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else if ((base1 == COM2_ADDR) && (temp2 & 0x01))
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base1 = 0x02e8;
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irq1 = (temp & 0x04) ? COM2_IRQ : COM1_IRQ;
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serial_setup(dev->uart[0], base1, irq1);
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pc87310_log("UART 1 at %04X, IRQ %i\n", base1, irq1);
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}
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if (!(temp & 0x02)) {
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base2 = (temp & 0x04) ? COM1_ADDR : COM2_ADDR;
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if ((base2 == COM1_ADDR) && (temp2 & 0x02))
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base2 = 0x03e8;
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else if ((base2 == COM2_ADDR) && (temp2 & 0x01))
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base2 = 0x02e8;
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irq2 = (temp & 0x04) ? COM1_IRQ : COM2_IRQ;
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serial_setup(dev->uart[1], base2, irq2);
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pc87310_log("UART 2 at %04X, IRQ %i\n", base2, irq2);
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}
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}
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@@ -136,61 +173,63 @@ pc87310_write(UNUSED(uint16_t port), uint8_t val, void *priv)
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{
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pc87310_t *dev = (pc87310_t *) priv;
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uint8_t valxor;
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uint8_t idx = (uint8_t) ((port & 0x0002) >> 1);
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pc87310_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, port, val, dev->tries);
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// second write to config register
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if (dev->tries) {
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valxor = val ^ dev->reg;
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dev->tries = 0;
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dev->reg = val;
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// first write to config register
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} else {
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/* Second write to config register. */
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valxor = val ^ dev->regs[idx];
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dev->tries = 0;
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dev->regs[idx] = val;
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if (idx) {
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/* Register, common to both PC87310 and ALi M5105. */
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pc87310_log("SIO: Common register written %02X\n", val);
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/* Reconfigure parallel port. */
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if (valxor & 0x03)
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/* Bits 1, 0: 1, 1 = Disable parallel port. */
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lpt1_handler(dev);
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/* Reconfigure serial ports. */
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if (valxor & 0x1c)
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serial_handler(dev);
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/* Reconfigure IDE controller. */
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if ((dev->flags & FLAG_IDE) && (valxor & 0x20)) {
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pc87310_log("SIO: HDC disabled\n");
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ide_pri_disable();
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/* Bit 5: 1 = Disable IDE controller. */
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if (!(val & 0x20)) {
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pc87310_log("SIO: HDC enabled\n");
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ide_set_base(0, 0x1f0);
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ide_set_side(0, 0x3f6);
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ide_pri_enable();
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}
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}
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/* Reconfigure floppy disk controller. */
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if (valxor & 0x40) {
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pc87310_log("SIO: FDC disabled\n");
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fdc_remove(dev->fdc);
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/* Bit 6: 1 = Disable FDC. */
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if (!(val & 0x40)) {
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pc87310_log("SIO: FDC enabled\n");
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fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
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}
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}
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} else {
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/* ALi M5105 extension register. */
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pc87310_log("SIO: M5105 extension register written %02X\n", val);
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/* Reconfigure serial ports. */
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if (valxor & 0x03)
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serial_handler(dev);
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}
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} else
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/* First write to config register. */
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dev->tries++;
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return;
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}
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pc87310_log("SIO: written %01X\n", val);
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/* reconfigure parallel port */
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if (valxor & 0x03) {
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lpt1_remove();
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/* bits 0-1: 11 disable parallel port */
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if (!((val & 1) && (val & 2)))
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lpt1_handler(dev);
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}
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/* reconfigure serial ports */
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if (valxor & 0x1c) {
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serial_remove(dev->uart[0]);
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serial_remove(dev->uart[1]);
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/* bit 2: 1 disable first serial port */
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if (!(val & 4))
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serial_handler(dev, 0);
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/* bit 3: 1 disable second serial port */
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if (!(val & 8))
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serial_handler(dev, 1);
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}
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/* reconfigure IDE controller */
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if (valxor & 0x20) {
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pc87310_log("SIO: HDC disabled\n");
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ide_pri_disable();
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/* bit 5: 1 disable ide controller */
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if (!(val & 0x20) && HAS_IDE_FUNCTIONALITY) {
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pc87310_log("SIO: HDC enabled\n");
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ide_set_base(0, 0x1f0);
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ide_set_side(0, 0x3f6);
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ide_pri_enable();
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}
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}
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/* reconfigure floppy disk controller */
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if (valxor & 0x40) {
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pc87310_log("SIO: FDC disabled\n");
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fdc_remove(dev->fdc);
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/* bit 6: 1 disable fdc */
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if (!(val & 0x40)) {
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pc87310_log("SIO: FDC enabled\n");
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fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
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}
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}
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return;
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}
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uint8_t
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@@ -198,11 +237,13 @@ pc87310_read(UNUSED(uint16_t port), void *priv)
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{
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pc87310_t *dev = (pc87310_t *) priv;
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uint8_t ret = 0xff;
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uint8_t idx = (uint8_t) ((port & 0x0002) >> 1);
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dev->tries = 0;
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ret = dev->reg;
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ret = dev->regs[idx];
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pc87310_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, port, ret);
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pc87310_log("SIO: read %01X\n", ret);
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return ret;
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@@ -211,22 +252,18 @@ pc87310_read(UNUSED(uint16_t port), void *priv)
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void
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pc87310_reset(pc87310_t *dev)
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{
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dev->reg = 0x0;
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dev->tries = 0;
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/*
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0 = 360 rpm @ 500 kbps for 3.5"
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1 = Default, 300 rpm @ 500, 300, 250, 1000 kbps for 3.5"
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*/
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lpt1_remove();
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dev->regs[0] = 0x00;
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dev->regs[1] = 0x00;
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dev->tries = 0;
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lpt1_handler(dev);
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serial_remove(dev->uart[0]);
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serial_remove(dev->uart[1]);
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serial_handler(dev, 0);
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serial_handler(dev, 1);
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serial_handler(dev);
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if (dev->flags & FLAG_IDE) {
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ide_pri_disable();
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ide_pri_enable();
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}
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fdc_reset(dev->fdc);
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#if 0
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ide_pri_enable();
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#endif
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}
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static void
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@@ -240,25 +277,28 @@ pc87310_close(void *priv)
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static void *
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pc87310_init(const device_t *info)
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{
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pc87310_t *dev = (pc87310_t *) malloc(sizeof(pc87310_t));
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memset(dev, 0, sizeof(pc87310_t));
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pc87310_t *dev = (pc87310_t *) calloc(1, sizeof(pc87310_t));
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/* Avoid conflicting with machines that make no use of the PC87310 Internal IDE */
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HAS_IDE_FUNCTIONALITY = info->local;
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dev->flags = info->local;
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dev->fdc = device_add(&fdc_at_nsc_device);
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dev->uart[0] = device_add_inst(&ns16550_device, 1);
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dev->uart[1] = device_add_inst(&ns16550_device, 2);
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dev->uart[0] = device_add_inst(&ns16450_device, 1);
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dev->uart[1] = device_add_inst(&ns16450_device, 2);
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if (HAS_IDE_FUNCTIONALITY)
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device_add(&ide_isa_device);
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if (dev->flags & FLAG_IDE)
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device_add((dev->flags & FLAG_ALI) ? &ide_vlb_device : &ide_isa_device);
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pc87310_reset(dev);
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io_sethandler(0x3f3, 0x0001,
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pc87310_read, NULL, NULL, pc87310_write, NULL, NULL, dev);
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if (dev->flags & FLAG_ALI)
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io_sethandler(0x3f1, 0x0001,
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pc87310_read, NULL, NULL, pc87310_write, NULL, NULL, dev);
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return dev;
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}
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@@ -280,7 +320,21 @@ const device_t pc87310_ide_device = {
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.name = "National Semiconductor PC87310 Super I/O with IDE functionality",
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.internal_name = "pc87310_ide",
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.flags = 0,
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.local = 1,
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.local = FLAG_IDE,
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.init = pc87310_init,
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.close = pc87310_close,
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.reset = NULL,
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{ .available = NULL },
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.speed_changed = NULL,
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.force_redraw = NULL,
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.config = NULL
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};
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const device_t ali5105_device = {
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.name = "ALi M5105 Super I/O",
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.internal_name = "ali5105",
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.flags = 0,
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.local = FLAG_ALI,
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.init = pc87310_init,
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.close = pc87310_close,
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.reset = NULL,
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