First batch of Acer A1G fixes, fixes #3992.

This commit is contained in:
OBattler
2024-01-08 22:27:09 +01:00
parent 39258ecdeb
commit 3a62aa4ea7
6 changed files with 178 additions and 102 deletions

View File

@@ -1231,6 +1231,10 @@ pc_reset_hard_init(void)
device_reset_all(DEVICE_PCI); device_reset_all(DEVICE_PCI);
} }
/* Mark IDE shadow drives (slaves with a present master) as such in case
the IDE controllers present are not some form of PCI. */
ide_drives_set_shadow();
/* Reset the CPU module. */ /* Reset the CPU module. */
resetx86(); resetx86();
dma_reset(); dma_reset();

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@@ -2977,6 +2977,22 @@ ide_board_reset(int board)
ide_drive_reset(d); ide_drive_reset(d);
} }
void
ide_drives_set_shadow(void)
{
for (uint8_t d = 0; d < IDE_NUM; d++) {
if (ide_drives[d] == NULL)
continue;
if ((d & 1) && (ide_drives[d]->type == IDE_NONE) && (ide_drives[d ^ 1]->type != IDE_NONE)) {
ide_drives[d]->type = ide_drives[d ^ 1]->type | IDE_SHADOW;
if (ide_drives[d]->tf != NULL)
free(ide_drives[d]->tf);
ide_drives[d]->tf = ide_drives[d ^ 1]->tf;
}
}
}
/* Reset a standalone IDE unit. */ /* Reset a standalone IDE unit. */
static void static void
ide_reset(UNUSED(void *priv)) ide_reset(UNUSED(void *priv))

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@@ -188,6 +188,8 @@ extern void ide_atapi_attach(ide_t *dev);
extern void *ide_xtide_init(void); extern void *ide_xtide_init(void);
extern void ide_xtide_close(void); extern void ide_xtide_close(void);
extern void ide_drives_set_shadow(void);
extern void ide_writew(uint16_t addr, uint16_t val, void *priv); extern void ide_writew(uint16_t addr, uint16_t val, void *priv);
extern void ide_write_devctl(uint16_t addr, uint8_t val, void *priv); extern void ide_write_devctl(uint16_t addr, uint8_t val, void *priv);
extern void ide_writeb(uint16_t addr, uint8_t val, void *priv); extern void ide_writeb(uint16_t addr, uint8_t val, void *priv);

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@@ -19,6 +19,7 @@
extern void vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv); extern void vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv);
extern const device_t acc3221_device; extern const device_t acc3221_device;
extern const device_t ali5105_device;
extern const device_t ali5123_device; extern const device_t ali5123_device;
extern const device_t f82c710_device; extern const device_t f82c710_device;
extern const device_t f82c606_device; extern const device_t f82c606_device;

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@@ -381,10 +381,9 @@ machine_at_acera1g_init(const machine_t *model)
device_add(&gd5428_onboard_device); device_add(&gd5428_onboard_device);
device_add(&keyboard_ps2_acer_pci_device); device_add(&keyboard_ps2_acer_pci_device);
device_add(&ide_isa_2ch_device); device_add(&ide_vlb_2ch_device);
if (fdc_type == FDC_INTERNAL) device_add(&ali5105_device);
device_add(&fdc_at_device);
return ret; return ret;
} }

View File

@@ -8,15 +8,13 @@
* *
* Emulation of the NatSemi PC87310 Super I/O chip. * Emulation of the NatSemi PC87310 Super I/O chip.
* *
*
*
* Authors: Miran Grca, <mgrca8@gmail.com> * Authors: Miran Grca, <mgrca8@gmail.com>
* Tiseno100 * EngiNerd, <webmaster.crrc@yahoo.it>
* EngiNerd <webmaster.crrc@yahoo.it> * Tiseno100,
* *
* Copyright 2020 Miran Grca. * Copyright 2020-2024 Miran Grca.
* Copyright 2020 Tiseno100
* Copyright 2021 EngiNerd. * Copyright 2021 EngiNerd.
* Copyright 2020 Tiseno100.
*/ */
#include <stdarg.h> #include <stdarg.h>
#include <stdio.h> #include <stdio.h>
@@ -42,7 +40,8 @@
#include <86box/sio.h> #include <86box/sio.h>
#include <86box/plat_unused.h> #include <86box/plat_unused.h>
#define HAS_IDE_FUNCTIONALITY dev->ide_function #define FLAG_IDE 0x00000001
#define FLAG_ALI 0x00000002
#ifdef ENABLE_PC87310_LOG #ifdef ENABLE_PC87310_LOG
int pc87310_do_log = ENABLE_PC87310_LOG; int pc87310_do_log = ENABLE_PC87310_LOG;
@@ -64,8 +63,8 @@ pc87310_log(const char *fmt, ...)
typedef struct pc87310_t { typedef struct pc87310_t {
uint8_t tries; uint8_t tries;
uint8_t ide_function; uint8_t flags;
uint8_t reg; uint8_t regs[2];
fdc_t *fdc; fdc_t *fdc;
serial_t *uart[2]; serial_t *uart[2];
} pc87310_t; } pc87310_t;
@@ -83,7 +82,9 @@ lpt1_handler(pc87310_t *dev)
* 10 278h * 10 278h
* 11 disabled * 11 disabled
*/ */
temp = dev->reg & 3; temp = dev->regs[1] & 0x03;
lpt1_remove();
switch (temp) { switch (temp) {
case 0: case 0:
@@ -111,23 +112,59 @@ lpt1_handler(pc87310_t *dev)
} }
static void static void
serial_handler(pc87310_t *dev, int uart) serial_handler(pc87310_t *dev)
{ {
int temp; uint8_t temp, temp2 = 0x00;
/* bit 2: disable serial port 1 uint16_t base1 = 0x0000, base2 = 0x0000;
* bit 3: disable serial port 2 uint8_t irq1, irq2;
* bit 4: swap serial ports /* - Bit 2: Disable serial port 1;
* - Bit 3: Disable serial port 2;
* - Bit 4: Swap serial ports.
*/ */
temp = (dev->reg >> (2 + uart)) & 1; temp = (dev->regs[1] >> 2) & 0x07;
// current serial port is enabled /* - Bits 1, 0: 0, 0 = Normal (3F8 and 2F8);
if (!temp) { * 0, 1 = 2E8 instead of 2F8;
// configure serial port as COM2 * 1, 0 = 3E8 instead of 3F8 and 2E8 instead of 2F8;
if (((dev->reg >> 4) & 1) ^ uart) * 1, 1 = 3E8 instead of 3F8.
serial_setup(dev->uart[uart], COM2_ADDR, COM2_IRQ); *
// configure serial port as COM1 * If we XOR bit 0 with bit 1, we get this:
else * 0, 0 = Normal (3F8 and 2F8);
serial_setup(dev->uart[uart], COM1_ADDR, COM1_IRQ); * 0, 1 = 2E8 instead of 2F8;
* 1, 0 = 3E8 instead of 3F8;
* 1, 1 = 3E8 instead of 3F8 and 2E8 instead of 2F8.
*
* Then they become simple toggle bits.
* Therefore, we do this for easier operation.
*/
if (dev->flags & FLAG_ALI) {
temp2 = dev->regs[0] & 0x03;
temp2 ^= ((temp2 & 0x02) >> 1);
}
serial_remove(dev->uart[0]);
serial_remove(dev->uart[1]);
if (!(temp & 0x01)) {
base1 = (temp & 0x04) ? COM2_ADDR : COM1_ADDR;
if ((base1 == COM1_ADDR) && (temp2 & 0x02))
base1 = 0x03e8;
else if ((base1 == COM2_ADDR) && (temp2 & 0x01))
base1 = 0x02e8;
irq1 = (temp & 0x04) ? COM2_IRQ : COM1_IRQ;
serial_setup(dev->uart[0], base1, irq1);
pc87310_log("UART 1 at %04X, IRQ %i\n", base1, irq1);
}
if (!(temp & 0x02)) {
base2 = (temp & 0x04) ? COM1_ADDR : COM2_ADDR;
if ((base2 == COM1_ADDR) && (temp2 & 0x02))
base2 = 0x03e8;
else if ((base2 == COM2_ADDR) && (temp2 & 0x01))
base2 = 0x02e8;
irq2 = (temp & 0x04) ? COM1_IRQ : COM2_IRQ;
serial_setup(dev->uart[1], base2, irq2);
pc87310_log("UART 2 at %04X, IRQ %i\n", base2, irq2);
} }
} }
@@ -136,61 +173,63 @@ pc87310_write(UNUSED(uint16_t port), uint8_t val, void *priv)
{ {
pc87310_t *dev = (pc87310_t *) priv; pc87310_t *dev = (pc87310_t *) priv;
uint8_t valxor; uint8_t valxor;
uint8_t idx = (uint8_t) ((port & 0x0002) >> 1);
pc87310_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, port, val, dev->tries);
// second write to config register
if (dev->tries) { if (dev->tries) {
valxor = val ^ dev->reg; /* Second write to config register. */
dev->tries = 0; valxor = val ^ dev->regs[idx];
dev->reg = val; dev->tries = 0;
// first write to config register dev->regs[idx] = val;
} else {
if (idx) {
/* Register, common to both PC87310 and ALi M5105. */
pc87310_log("SIO: Common register written %02X\n", val);
/* Reconfigure parallel port. */
if (valxor & 0x03)
/* Bits 1, 0: 1, 1 = Disable parallel port. */
lpt1_handler(dev);
/* Reconfigure serial ports. */
if (valxor & 0x1c)
serial_handler(dev);
/* Reconfigure IDE controller. */
if ((dev->flags & FLAG_IDE) && (valxor & 0x20)) {
pc87310_log("SIO: HDC disabled\n");
ide_pri_disable();
/* Bit 5: 1 = Disable IDE controller. */
if (!(val & 0x20)) {
pc87310_log("SIO: HDC enabled\n");
ide_set_base(0, 0x1f0);
ide_set_side(0, 0x3f6);
ide_pri_enable();
}
}
/* Reconfigure floppy disk controller. */
if (valxor & 0x40) {
pc87310_log("SIO: FDC disabled\n");
fdc_remove(dev->fdc);
/* Bit 6: 1 = Disable FDC. */
if (!(val & 0x40)) {
pc87310_log("SIO: FDC enabled\n");
fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
}
}
} else {
/* ALi M5105 extension register. */
pc87310_log("SIO: M5105 extension register written %02X\n", val);
/* Reconfigure serial ports. */
if (valxor & 0x03)
serial_handler(dev);
}
} else
/* First write to config register. */
dev->tries++; dev->tries++;
return;
}
pc87310_log("SIO: written %01X\n", val);
/* reconfigure parallel port */
if (valxor & 0x03) {
lpt1_remove();
/* bits 0-1: 11 disable parallel port */
if (!((val & 1) && (val & 2)))
lpt1_handler(dev);
}
/* reconfigure serial ports */
if (valxor & 0x1c) {
serial_remove(dev->uart[0]);
serial_remove(dev->uart[1]);
/* bit 2: 1 disable first serial port */
if (!(val & 4))
serial_handler(dev, 0);
/* bit 3: 1 disable second serial port */
if (!(val & 8))
serial_handler(dev, 1);
}
/* reconfigure IDE controller */
if (valxor & 0x20) {
pc87310_log("SIO: HDC disabled\n");
ide_pri_disable();
/* bit 5: 1 disable ide controller */
if (!(val & 0x20) && HAS_IDE_FUNCTIONALITY) {
pc87310_log("SIO: HDC enabled\n");
ide_set_base(0, 0x1f0);
ide_set_side(0, 0x3f6);
ide_pri_enable();
}
}
/* reconfigure floppy disk controller */
if (valxor & 0x40) {
pc87310_log("SIO: FDC disabled\n");
fdc_remove(dev->fdc);
/* bit 6: 1 disable fdc */
if (!(val & 0x40)) {
pc87310_log("SIO: FDC enabled\n");
fdc_set_base(dev->fdc, FDC_PRIMARY_ADDR);
}
}
return;
} }
uint8_t uint8_t
@@ -198,11 +237,13 @@ pc87310_read(UNUSED(uint16_t port), void *priv)
{ {
pc87310_t *dev = (pc87310_t *) priv; pc87310_t *dev = (pc87310_t *) priv;
uint8_t ret = 0xff; uint8_t ret = 0xff;
uint8_t idx = (uint8_t) ((port & 0x0002) >> 1);
dev->tries = 0; dev->tries = 0;
ret = dev->reg; ret = dev->regs[idx];
pc87310_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, port, ret);
pc87310_log("SIO: read %01X\n", ret); pc87310_log("SIO: read %01X\n", ret);
return ret; return ret;
@@ -211,22 +252,18 @@ pc87310_read(UNUSED(uint16_t port), void *priv)
void void
pc87310_reset(pc87310_t *dev) pc87310_reset(pc87310_t *dev)
{ {
dev->reg = 0x0; dev->regs[0] = 0x00;
dev->tries = 0; dev->regs[1] = 0x00;
/*
0 = 360 rpm @ 500 kbps for 3.5" dev->tries = 0;
1 = Default, 300 rpm @ 500, 300, 250, 1000 kbps for 3.5"
*/
lpt1_remove();
lpt1_handler(dev); lpt1_handler(dev);
serial_remove(dev->uart[0]); serial_handler(dev);
serial_remove(dev->uart[1]); if (dev->flags & FLAG_IDE) {
serial_handler(dev, 0); ide_pri_disable();
serial_handler(dev, 1); ide_pri_enable();
}
fdc_reset(dev->fdc); fdc_reset(dev->fdc);
#if 0
ide_pri_enable();
#endif
} }
static void static void
@@ -240,25 +277,28 @@ pc87310_close(void *priv)
static void * static void *
pc87310_init(const device_t *info) pc87310_init(const device_t *info)
{ {
pc87310_t *dev = (pc87310_t *) malloc(sizeof(pc87310_t)); pc87310_t *dev = (pc87310_t *) calloc(1, sizeof(pc87310_t));
memset(dev, 0, sizeof(pc87310_t));
/* Avoid conflicting with machines that make no use of the PC87310 Internal IDE */ /* Avoid conflicting with machines that make no use of the PC87310 Internal IDE */
HAS_IDE_FUNCTIONALITY = info->local; dev->flags = info->local;
dev->fdc = device_add(&fdc_at_nsc_device); dev->fdc = device_add(&fdc_at_nsc_device);
dev->uart[0] = device_add_inst(&ns16550_device, 1); dev->uart[0] = device_add_inst(&ns16450_device, 1);
dev->uart[1] = device_add_inst(&ns16550_device, 2); dev->uart[1] = device_add_inst(&ns16450_device, 2);
if (HAS_IDE_FUNCTIONALITY) if (dev->flags & FLAG_IDE)
device_add(&ide_isa_device); device_add((dev->flags & FLAG_ALI) ? &ide_vlb_device : &ide_isa_device);
pc87310_reset(dev); pc87310_reset(dev);
io_sethandler(0x3f3, 0x0001, io_sethandler(0x3f3, 0x0001,
pc87310_read, NULL, NULL, pc87310_write, NULL, NULL, dev); pc87310_read, NULL, NULL, pc87310_write, NULL, NULL, dev);
if (dev->flags & FLAG_ALI)
io_sethandler(0x3f1, 0x0001,
pc87310_read, NULL, NULL, pc87310_write, NULL, NULL, dev);
return dev; return dev;
} }
@@ -280,7 +320,21 @@ const device_t pc87310_ide_device = {
.name = "National Semiconductor PC87310 Super I/O with IDE functionality", .name = "National Semiconductor PC87310 Super I/O with IDE functionality",
.internal_name = "pc87310_ide", .internal_name = "pc87310_ide",
.flags = 0, .flags = 0,
.local = 1, .local = FLAG_IDE,
.init = pc87310_init,
.close = pc87310_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ali5105_device = {
.name = "ALi M5105 Super I/O",
.internal_name = "ali5105",
.flags = 0,
.local = FLAG_ALI,
.init = pc87310_init, .init = pc87310_init,
.close = pc87310_close, .close = pc87310_close,
.reset = NULL, .reset = NULL,