clang-format in src/network/

This commit is contained in:
Jasmine Iwanek
2022-09-18 17:18:20 -04:00
parent 4685da3fca
commit 3c76dbbde5
11 changed files with 3768 additions and 4025 deletions

View File

@@ -89,11 +89,9 @@ typedef struct {
int dma_channel;
} threec503_t;
#ifdef ENABLE_3COM503_LOG
int threec503_do_log = ENABLE_3COM503_LOG;
static void
threec503_log(const char *fmt, ...)
{
@@ -109,7 +107,6 @@ threec503_log(const char *fmt, ...)
# define threec503_log(fmt, ...)
#endif
static void
threec503_interrupt(void *priv, int set)
{
@@ -139,7 +136,6 @@ threec503_interrupt(void *priv, int set)
picintc(1 << dev->base_irq);
}
static void
threec503_ram_write(uint32_t addr, uint8_t val, void *priv)
{
@@ -151,7 +147,6 @@ threec503_ram_write(uint32_t addr, uint8_t val, void *priv)
dev->dp8390->mem[addr & 0x1fff] = val;
}
static uint8_t
threec503_ram_read(uint32_t addr, void *priv)
{
@@ -163,7 +158,6 @@ threec503_ram_read(uint32_t addr, void *priv)
return dev->dp8390->mem[addr & 0x1fff];
}
static void
threec503_set_drq(threec503_t *dev)
{
@@ -182,7 +176,6 @@ threec503_set_drq(threec503_t *dev)
}
}
/* reset - restore state to power-up, cancelling all i/o */
static void
threec503_reset(void *priv)
@@ -200,7 +193,6 @@ threec503_reset(void *priv)
dev->regs.ctrl = 0x0a;
}
static uint8_t
threec503_nic_lo_read(uint16_t addr, void *priv)
{
@@ -213,7 +205,8 @@ threec503_nic_lo_read(uint16_t addr, void *priv)
threec503_log("Read offset=%04x\n", off);
if (off == 0x00)
retval = dp8390_read_cr(dev->dp8390);
else switch(dev->dp8390->CR.pgsel) {
else
switch (dev->dp8390->CR.pgsel) {
case 0x00:
retval = dp8390_page0_read(dev->dp8390, off, 1);
break;
@@ -248,7 +241,6 @@ threec503_nic_lo_read(uint16_t addr, void *priv)
return (retval);
}
static void
threec503_nic_lo_write(uint16_t addr, uint8_t val, void *priv)
{
@@ -263,7 +255,8 @@ threec503_nic_lo_write(uint16_t addr, uint8_t val, void *priv)
command register */
if (off == 0x00)
dp8390_write_cr(dev->dp8390, val);
else switch(dev->dp8390->CR.pgsel) {
else
switch (dev->dp8390->CR.pgsel) {
case 0x00:
dp8390_page0_write(dev->dp8390, off, val, 1);
break;
@@ -290,7 +283,6 @@ threec503_nic_lo_write(uint16_t addr, uint8_t val, void *priv)
threec503_log("3Com503: write addr %x, value %x\n", addr, val);
}
static uint8_t
threec503_nic_hi_read(uint16_t addr, void *priv)
{
@@ -409,7 +401,6 @@ threec503_nic_hi_read(uint16_t addr, void *priv)
return 0;
}
static void
threec503_nic_hi_write(uint16_t addr, uint8_t val, void *priv)
{
@@ -538,7 +529,6 @@ threec503_nic_hi_write(uint16_t addr, uint8_t val, void *priv)
}
}
static void
threec503_nic_ioset(threec503_t *dev, uint16_t addr)
{
@@ -551,7 +541,6 @@ threec503_nic_ioset(threec503_t *dev, uint16_t addr)
threec503_nic_hi_write, NULL, NULL, dev);
}
static void *
threec503_nic_init(const device_t *info)
{
@@ -624,7 +613,6 @@ threec503_nic_init(const device_t *info)
return (dev);
}
static void
threec503_nic_close(void *priv)
{

View File

@@ -30,7 +30,6 @@
#include <86box/network.h>
#include <86box/net_dp8390.h>
static void dp8390_tx(dp8390_t *dev, uint32_t val);
static int dp8390_rx_common(void *priv, uint8_t *buf, int io_len);
int dp8390_rx(void *priv, uint8_t *buf, int io_len);
@@ -55,7 +54,6 @@ dp8390_log(const char *fmt, ...)
# define dp8390_log(lvl, fmt, ...)
#endif
/*
* Return the 6-bit index into the multicast
* table. Stolen unashamedly from FreeBSD's if_ed.c
@@ -83,7 +81,6 @@ mcast_index(const void *dst)
#undef POLYNOMIAL
}
/*
* Access the 32K private RAM.
*
@@ -122,7 +119,6 @@ dp8390_chipmem_read(dp8390_t *dev, uint32_t addr, unsigned int len)
return (retval);
}
void
dp8390_chipmem_write(dp8390_t *dev, uint32_t addr, uint32_t val, unsigned len)
{
@@ -147,24 +143,18 @@ dp8390_chipmem_write(dp8390_t *dev, uint32_t addr, uint32_t val, unsigned len)
}
}
/* Routines for handling reads/writes to the Command Register. */
uint32_t
dp8390_read_cr(dp8390_t *dev)
{
uint32_t retval;
retval = (((dev->CR.pgsel & 0x03) << 6) |
((dev->CR.rdma_cmd & 0x07) << 3) |
(dev->CR.tx_packet << 2) |
(dev->CR.start << 1) |
(dev->CR.stop));
retval = (((dev->CR.pgsel & 0x03) << 6) | ((dev->CR.rdma_cmd & 0x07) << 3) | (dev->CR.tx_packet << 2) | (dev->CR.start << 1) | (dev->CR.stop));
dp8390_log("DP8390: read CR returns 0x%02x\n", retval);
return (retval);
}
void
dp8390_write_cr(dp8390_t *dev, uint32_t val)
{
@@ -244,8 +234,7 @@ dp8390_write_cr(dp8390_t *dev, uint32_t val)
/* Linux probes for an interrupt by setting up a remote-DMA read
* of 0 bytes with remote-DMA completion interrupts enabled.
* Detect this here */
if ((dev->CR.rdma_cmd == 0x01) && dev->CR.start &&
(dev->remote_bytes == 0)) {
if ((dev->CR.rdma_cmd == 0x01) && dev->CR.start && (dev->remote_bytes == 0)) {
dev->ISR.rdma_done = 1;
if (dev->IMR.rdma_inte && dev->interrupt) {
dev->interrupt(dev->priv, 1);
@@ -255,7 +244,6 @@ dp8390_write_cr(dp8390_t *dev, uint32_t val)
}
}
static void
dp8390_tx(dp8390_t *dev, uint32_t val)
{
@@ -269,7 +257,6 @@ dp8390_tx(dp8390_t *dev, uint32_t val)
dev->tx_timer_active = 0;
}
/*
* Called by the platform-specific code when an Ethernet frame
* has been received. The destination address is tested to see
@@ -303,8 +290,7 @@ dp8390_rx_common(void *priv, uint8_t *buf, int io_len)
if (dev->curr_page < dev->bound_ptr) {
avail = dev->bound_ptr - dev->curr_page;
} else {
avail = (dev->page_stop - dev->page_start) -
(dev->curr_page - dev->bound_ptr);
avail = (dev->page_stop - dev->page_start) - (dev->curr_page - dev->bound_ptr);
}
/*
@@ -400,8 +386,7 @@ dp8390_rx_common(void *priv, uint8_t *buf, int io_len)
/* Copy into buffer, update curpage, and signal interrupt if config'd */
startptr = &dev->mem[(dev->curr_page * 256) - dev->mem_start];
memcpy(startptr, pkthdr, sizeof(pkthdr));
if ((nextpage > dev->curr_page) ||
((dev->curr_page + pages) == dev->page_stop)) {
if ((nextpage > dev->curr_page) || ((dev->curr_page + pages) == dev->page_stop)) {
memcpy(startptr + sizeof(pkthdr), buf, io_len);
} else {
endbytes = (dev->page_stop - dev->curr_page) * 256;
@@ -421,7 +406,6 @@ dp8390_rx_common(void *priv, uint8_t *buf, int io_len)
return 1;
}
int
dp8390_rx(void *priv, uint8_t *buf, int io_len)
{
@@ -433,7 +417,6 @@ dp8390_rx(void *priv, uint8_t *buf, int io_len)
return dp8390_rx_common(priv, buf, io_len);
}
/* Handle reads/writes to the 'zeroth' page of the DS8390 register file. */
uint32_t
dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len)
@@ -461,13 +444,7 @@ dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len)
break;
case 0x04: /* TSR */
retval = ((dev->TSR.ow_coll << 7) |
(dev->TSR.cd_hbeat << 6) |
(dev->TSR.fifo_ur << 5) |
(dev->TSR.no_carrier << 4) |
(dev->TSR.aborted << 3) |
(dev->TSR.collided << 2) |
(dev->TSR.tx_ok));
retval = ((dev->TSR.ow_coll << 7) | (dev->TSR.cd_hbeat << 6) | (dev->TSR.fifo_ur << 5) | (dev->TSR.no_carrier << 4) | (dev->TSR.aborted << 3) | (dev->TSR.collided << 2) | (dev->TSR.tx_ok));
break;
case 0x05: /* NCR */
@@ -483,14 +460,7 @@ dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len)
break;
case 0x07: /* ISR */
retval = ((dev->ISR.reset << 7) |
(dev->ISR.rdma_done << 6) |
(dev->ISR.cnt_oflow << 5) |
(dev->ISR.overwrite << 4) |
(dev->ISR.tx_err << 3) |
(dev->ISR.rx_err << 2) |
(dev->ISR.pkt_tx << 1) |
(dev->ISR.pkt_rx));
retval = ((dev->ISR.reset << 7) | (dev->ISR.rdma_done << 6) | (dev->ISR.cnt_oflow << 5) | (dev->ISR.overwrite << 4) | (dev->ISR.tx_err << 3) | (dev->ISR.rx_err << 2) | (dev->ISR.pkt_tx << 1) | (dev->ISR.pkt_rx));
break;
case 0x08: /* CRDA0 */
@@ -510,14 +480,7 @@ dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len)
break;
case 0x0c: /* RSR */
retval = ((dev->RSR.deferred << 7) |
(dev->RSR.rx_disabled << 6) |
(dev->RSR.rx_mbit << 5) |
(dev->RSR.rx_missed << 4) |
(dev->RSR.fifo_or << 3) |
(dev->RSR.bad_falign << 2) |
(dev->RSR.bad_crc << 1) |
(dev->RSR.rx_ok));
retval = ((dev->RSR.deferred << 7) | (dev->RSR.rx_disabled << 6) | (dev->RSR.rx_mbit << 5) | (dev->RSR.rx_missed << 4) | (dev->RSR.fifo_or << 3) | (dev->RSR.bad_falign << 2) | (dev->RSR.bad_crc << 1) | (dev->RSR.rx_ok));
break;
case 0x0d: /* CNTR0 */
@@ -543,7 +506,6 @@ dp8390_page0_read(dp8390_t *dev, uint32_t off, unsigned int len)
return (retval);
}
void
dp8390_page0_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len)
{
@@ -593,20 +555,8 @@ dp8390_page0_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len)
dev->ISR.overwrite &= !((int) ((val & 0x10) == 0x10));
dev->ISR.cnt_oflow &= !((int) ((val & 0x20) == 0x20));
dev->ISR.rdma_done &= !((int) ((val & 0x40) == 0x40));
val = ((dev->ISR.rdma_done << 6) |
(dev->ISR.cnt_oflow << 5) |
(dev->ISR.overwrite << 4) |
(dev->ISR.tx_err << 3) |
(dev->ISR.rx_err << 2) |
(dev->ISR.pkt_tx << 1) |
(dev->ISR.pkt_rx));
val &= ((dev->IMR.rdma_inte << 6) |
(dev->IMR.cofl_inte << 5) |
(dev->IMR.overw_inte << 4) |
(dev->IMR.txerr_inte << 3) |
(dev->IMR.rxerr_inte << 2) |
(dev->IMR.tx_inte << 1) |
(dev->IMR.rx_inte));
val = ((dev->ISR.rdma_done << 6) | (dev->ISR.cnt_oflow << 5) | (dev->ISR.overwrite << 4) | (dev->ISR.tx_err << 3) | (dev->ISR.rx_err << 2) | (dev->ISR.pkt_tx << 1) | (dev->ISR.pkt_rx));
val &= ((dev->IMR.rdma_inte << 6) | (dev->IMR.cofl_inte << 5) | (dev->IMR.overw_inte << 4) | (dev->IMR.txerr_inte << 3) | (dev->IMR.rxerr_inte << 2) | (dev->IMR.tx_inte << 1) | (dev->IMR.rx_inte));
if ((val == 0x00) && dev->interrupt)
dev->interrupt(dev->priv, 0);
break;
@@ -731,13 +681,7 @@ dp8390_page0_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len)
dev->IMR.overw_inte = ((val & 0x10) == 0x10);
dev->IMR.cofl_inte = ((val & 0x20) == 0x20);
dev->IMR.rdma_inte = ((val & 0x40) == 0x40);
val2 = ((dev->ISR.rdma_done << 6) |
(dev->ISR.cnt_oflow << 5) |
(dev->ISR.overwrite << 4) |
(dev->ISR.tx_err << 3) |
(dev->ISR.rx_err << 2) |
(dev->ISR.pkt_tx << 1) |
(dev->ISR.pkt_rx));
val2 = ((dev->ISR.rdma_done << 6) | (dev->ISR.cnt_oflow << 5) | (dev->ISR.overwrite << 4) | (dev->ISR.tx_err << 3) | (dev->ISR.rx_err << 2) | (dev->ISR.pkt_tx << 1) | (dev->ISR.pkt_rx));
if (dev->interrupt) {
if (((val & val2) & 0x7f) == 0)
dev->interrupt(dev->priv, 0);
@@ -752,7 +696,6 @@ dp8390_page0_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len)
}
}
/* Handle reads/writes to the first page of the DS8390 register file. */
uint32_t
dp8390_page1_read(dp8390_t *dev, uint32_t off, unsigned int len)
@@ -791,7 +734,6 @@ dp8390_page1_read(dp8390_t *dev, uint32_t off, unsigned int len)
}
}
void
dp8390_page1_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len)
{
@@ -835,7 +777,6 @@ dp8390_page1_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len)
}
}
/* Handle reads/writes to the second page of the DS8390 register file. */
uint32_t
dp8390_page2_read(dp8390_t *dev, uint32_t off, unsigned int len)
@@ -874,35 +815,16 @@ dp8390_page2_read(dp8390_t *dev, uint32_t off, unsigned int len)
return (0xff);
case 0x0c: /* RCR */
return ((dev->RCR.monitor << 5) |
(dev->RCR.promisc << 4) |
(dev->RCR.multicast << 3) |
(dev->RCR.broadcast << 2) |
(dev->RCR.runts_ok << 1) |
(dev->RCR.errors_ok));
return ((dev->RCR.monitor << 5) | (dev->RCR.promisc << 4) | (dev->RCR.multicast << 3) | (dev->RCR.broadcast << 2) | (dev->RCR.runts_ok << 1) | (dev->RCR.errors_ok));
case 0x0d: /* TCR */
return ((dev->TCR.coll_prio << 4) |
(dev->TCR.ext_stoptx << 3) |
((dev->TCR.loop_cntl & 0x3) << 1) |
(dev->TCR.crc_disable));
return ((dev->TCR.coll_prio << 4) | (dev->TCR.ext_stoptx << 3) | ((dev->TCR.loop_cntl & 0x3) << 1) | (dev->TCR.crc_disable));
case 0x0e: /* DCR */
return (((dev->DCR.fifo_size & 0x3) << 5) |
(dev->DCR.auto_rx << 4) |
(dev->DCR.loop << 3) |
(dev->DCR.longaddr << 2) |
(dev->DCR.endian << 1) |
(dev->DCR.wdsize));
return (((dev->DCR.fifo_size & 0x3) << 5) | (dev->DCR.auto_rx << 4) | (dev->DCR.loop << 3) | (dev->DCR.longaddr << 2) | (dev->DCR.endian << 1) | (dev->DCR.wdsize));
case 0x0f: /* IMR */
return ((dev->IMR.rdma_inte << 6) |
(dev->IMR.cofl_inte << 5) |
(dev->IMR.overw_inte << 4) |
(dev->IMR.txerr_inte << 3) |
(dev->IMR.rxerr_inte << 2) |
(dev->IMR.tx_inte << 1) |
(dev->IMR.rx_inte));
return ((dev->IMR.rdma_inte << 6) | (dev->IMR.cofl_inte << 5) | (dev->IMR.overw_inte << 4) | (dev->IMR.txerr_inte << 3) | (dev->IMR.rxerr_inte << 2) | (dev->IMR.tx_inte << 1) | (dev->IMR.rx_inte));
default:
dp8390_log("DP8390: Page2 register 0x%02x out of range\n",
@@ -913,7 +835,6 @@ dp8390_page2_read(dp8390_t *dev, uint32_t off, unsigned int len)
return (0);
}
void
dp8390_page2_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len)
{
@@ -981,7 +902,6 @@ dp8390_page2_write(dp8390_t *dev, uint32_t off, uint32_t val, unsigned len)
}
}
void
dp8390_set_defaults(dp8390_t *dev, uint8_t flags)
{
@@ -990,7 +910,6 @@ dp8390_set_defaults(dp8390_t *dev, uint8_t flags)
dev->flags = flags;
}
void
dp8390_mem_alloc(dp8390_t *dev, uint32_t start, uint32_t size)
{
@@ -1002,7 +921,6 @@ dp8390_mem_alloc(dp8390_t *dev, uint32_t start, uint32_t size)
dp8390_log("DP8390: Mapped %i bytes of memory at address %04X in the address space\n", size, start);
}
void
dp8390_set_id(dp8390_t *dev, uint8_t id0, uint8_t id1)
{
@@ -1010,7 +928,6 @@ dp8390_set_id(dp8390_t *dev, uint8_t id0, uint8_t id1)
dev->id1 = id1;
}
void
dp8390_reset(dp8390_t *dev)
{
@@ -1073,7 +990,6 @@ dp8390_reset(dp8390_t *dev)
dev->interrupt(dev->priv, 0);
}
void
dp8390_soft_reset(dp8390_t *dev)
{
@@ -1081,7 +997,6 @@ dp8390_soft_reset(dp8390_t *dev)
dev->ISR.reset = 1;
}
static void *
dp8390_init(const device_t *info)
{
@@ -1100,7 +1015,6 @@ dp8390_init(const device_t *info)
return dp8390;
}
static void
dp8390_close(void *priv)
{

View File

@@ -8,9 +8,9 @@
#include <86box/net_event.h>
#ifndef _WIN32
static void setup_fd(int fd)
static void
setup_fd(int fd)
{
fcntl(fd, F_SETFD, FD_CLOEXEC);
fcntl(fd, F_SETFL, O_NONBLOCK);

View File

@@ -69,7 +69,6 @@
#include <86box/bswap.h>
#include <86box/isapnp.h>
/* ROM BIOS file paths. */
#define ROM_PATH_NE1000 "roms/network/ne1000/ne1000.rom"
#define ROM_PATH_NE2000 "roms/network/ne2000/ne2000.rom"
@@ -81,7 +80,6 @@
#define PCI_DEVID 0x8029 /* RTL8029AS */
#define PCI_REGSIZE 256 /* size of PCI space */
static uint8_t rtl8019as_pnp_rom[] = {
0x4a, 0x8c, 0x80, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, /* RTL8019, dummy checksum (filled in by isapnp_add_card) */
0x0a, 0x10, 0x10, /* PnP version 1.0, vendor version 1.0 */
@@ -95,7 +93,6 @@ static uint8_t rtl8019as_pnp_rom[] = {
0x79, 0x00 /* end tag, dummy checksum (filled in by isapnp_add_card) */
};
typedef struct {
dp8390_t *dp8390;
const char *name;
@@ -125,7 +122,6 @@ typedef struct {
uint8_t pos_regs[8];
} nic_t;
#ifdef ENABLE_NE2K_LOG
int ne2k_do_log = ENABLE_NE2K_LOG;
@@ -144,7 +140,6 @@ nelog(int lvl, const char *fmt, ...)
# define nelog(lvl, fmt, ...)
#endif
static void
nic_interrupt(void *priv, int set)
{
@@ -163,7 +158,6 @@ nic_interrupt(void *priv, int set)
}
}
/* reset - restore state to power-up, cancelling all i/o */
static void
nic_reset(void *priv)
@@ -175,7 +169,6 @@ nic_reset(void *priv)
dp8390_reset(dev->dp8390);
}
static void
nic_soft_reset(void *priv)
{
@@ -184,7 +177,6 @@ nic_soft_reset(void *priv)
dp8390_soft_reset(dev->dp8390);
}
/*
* Access the ASIC I/O space.
*
@@ -314,12 +306,12 @@ asic_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
}
}
/* Writes to this page are illegal. */
static uint32_t
page3_read(nic_t *dev, uint32_t off, unsigned int len)
{
if (dev->board >= NE2K_RTL8019AS) switch(off) {
if (dev->board >= NE2K_RTL8019AS)
switch (off) {
case 0x1: /* 9346CR */
return (dev->_9346cr);
@@ -353,7 +345,6 @@ page3_read(nic_t *dev, uint32_t off, unsigned int len)
return (0x00);
}
static void
page3_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
{
@@ -386,7 +377,6 @@ page3_write(nic_t *dev, uint32_t off, uint32_t val, unsigned len)
nelog(3, "%s: Page3 write register 0x%02x attempted\n", dev->name, off);
}
static uint32_t
nic_read(nic_t *dev, uint32_t addr, unsigned len)
{
@@ -399,7 +389,8 @@ nic_read(nic_t *dev, uint32_t addr, unsigned len)
retval = asic_read(dev, off - 0x10, len);
else if (off == 0x00)
retval = dp8390_read_cr(dev->dp8390);
else switch(dev->dp8390->CR.pgsel) {
else
switch (dev->dp8390->CR.pgsel) {
case 0x00:
retval = dp8390_page0_read(dev->dp8390, off, len);
break;
@@ -421,28 +412,24 @@ nic_read(nic_t *dev, uint32_t addr, unsigned len)
return (retval);
}
static uint8_t
nic_readb(uint16_t addr, void *priv)
{
return (nic_read((nic_t *) priv, addr, 1));
}
static uint16_t
nic_readw(uint16_t addr, void *priv)
{
return (nic_read((nic_t *) priv, addr, 2));
}
static uint32_t
nic_readl(uint16_t addr, void *priv)
{
return (nic_read((nic_t *) priv, addr, 4));
}
static void
nic_write(nic_t *dev, uint32_t addr, uint32_t val, unsigned len)
{
@@ -458,7 +445,8 @@ nic_write(nic_t *dev, uint32_t addr, uint32_t val, unsigned len)
asic_write(dev, off - 0x10, val, len);
else if (off == 0x00)
dp8390_write_cr(dev->dp8390, val);
else switch(dev->dp8390->CR.pgsel) {
else
switch (dev->dp8390->CR.pgsel) {
case 0x00:
dp8390_page0_write(dev->dp8390, off, val, len);
break;
@@ -478,32 +466,27 @@ nic_write(nic_t *dev, uint32_t addr, uint32_t val, unsigned len)
}
}
static void
nic_writeb(uint16_t addr, uint8_t val, void *priv)
{
nic_write((nic_t *) priv, addr, val, 1);
}
static void
nic_writew(uint16_t addr, uint16_t val, void *priv)
{
nic_write((nic_t *) priv, addr, val, 2);
}
static void
nic_writel(uint16_t addr, uint32_t val, void *priv)
{
nic_write((nic_t *) priv, addr, val, 4);
}
static void nic_ioset(nic_t *dev, uint16_t addr);
static void nic_ioremove(nic_t *dev, uint16_t addr);
static void
nic_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv)
{
@@ -524,7 +507,6 @@ nic_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv)
nic_ioset(dev, dev->base_address);
}
static void
nic_pnp_csn_changed(uint8_t csn, void *priv)
{
@@ -533,7 +515,6 @@ nic_pnp_csn_changed(uint8_t csn, void *priv)
dev->pnp_csnsav = csn;
}
static uint8_t
nic_pnp_read_vendor_reg(uint8_t ld, uint8_t reg, void *priv)
{
@@ -559,7 +540,6 @@ nic_pnp_read_vendor_reg(uint8_t ld, uint8_t reg, void *priv)
return 0x00;
}
static void
nic_pnp_write_vendor_reg(uint8_t ld, uint8_t reg, uint8_t val, void *priv)
{
@@ -572,7 +552,6 @@ nic_pnp_write_vendor_reg(uint8_t ld, uint8_t reg, uint8_t val, void *priv)
}
}
static void
nic_ioset(nic_t *dev, uint16_t addr)
{
@@ -596,7 +575,6 @@ nic_ioset(nic_t *dev, uint16_t addr)
}
}
static void
nic_ioremove(nic_t *dev, uint16_t addr)
{
@@ -620,7 +598,6 @@ nic_ioremove(nic_t *dev, uint16_t addr)
}
}
static void
nic_update_bios(nic_t *dev)
{
@@ -628,7 +605,8 @@ nic_update_bios(nic_t *dev)
reg_bios_enable = 1;
if (! dev->has_bios) return;
if (!dev->has_bios)
return;
if (dev->is_pci)
reg_bios_enable = dev->pci_bar[1].addr_regs[0] & 0x01;
@@ -644,7 +622,6 @@ nic_update_bios(nic_t *dev)
}
}
static uint8_t
nic_pci_read(int func, int addr, void *priv)
{
@@ -737,7 +714,6 @@ nic_pci_read(int func, int addr, void *priv)
return (ret);
}
static void
nic_pci_write(int func, int addr, uint8_t val, void *priv)
{
@@ -749,11 +725,9 @@ nic_pci_write(int func, int addr, uint8_t val, void *priv)
switch (addr) {
case 0x04: /* PCI_COMMAND_LO */
valxor = (val & 0x03) ^ dev->pci_regs[addr];
if (valxor & PCI_COMMAND_IO)
{
if (valxor & PCI_COMMAND_IO) {
nic_ioremove(dev, dev->base_address);
if ((dev->base_address != 0) && (val & PCI_COMMAND_IO))
{
if ((dev->base_address != 0) && (val & PCI_COMMAND_IO)) {
nic_ioset(dev, dev->base_address);
}
}
@@ -781,10 +755,8 @@ nic_pci_write(int func, int addr, uint8_t val, void *priv)
nelog(1, "%s: PCI: new I/O base is %04X\n",
dev->name, dev->base_address);
/* We're done, so get out of the here. */
if (dev->pci_regs[4] & PCI_COMMAND_IO)
{
if (dev->base_address != 0)
{
if (dev->pci_regs[4] & PCI_COMMAND_IO) {
if (dev->base_address != 0) {
nic_ioset(dev, dev->base_address);
}
}
@@ -809,16 +781,17 @@ nic_pci_write(int func, int addr, uint8_t val, void *priv)
}
}
static void
nic_rom_init(nic_t *dev, char *s)
{
uint32_t temp;
FILE *f;
if (s == NULL) return;
if (s == NULL)
return;
if (dev->bios_addr == 0) return;
if (dev->bios_addr == 0)
return;
if ((f = rom_fopen(s, "rb")) != NULL) {
fseek(f, 0L, SEEK_END);
@@ -855,10 +828,16 @@ nic_mca_read(int port, void *priv)
return (dev->pos_regs[port & 7]);
}
#define MCA_611F_IO_PORTS { 0x300, 0x340, 0x320, 0x360, 0x1300, 0x1340, \
0x1320, 0x1360 }
#define MCA_611F_IO_PORTS \
{ \
0x300, 0x340, 0x320, 0x360, 0x1300, 0x1340, \
0x1320, 0x1360 \
}
#define MCA_611F_IRQS { 2, 3, 4, 5, 10, 11, 12, 15 }
#define MCA_611F_IRQS \
{ \
2, 3, 4, 5, 10, 11, 12, 15 \
}
static void
nic_mca_write(int port, uint8_t val, void *priv)
@@ -868,7 +847,8 @@ nic_mca_write(int port, uint8_t val, void *priv)
int8_t irq[] = MCA_611F_IRQS;
/* MCA does not write registers below 0x0100. */
if (port < 0x0102) return;
if (port < 0x0102)
return;
/* Save the MCA register value. */
dev->pos_regs[port & 7] = val;
@@ -902,11 +882,9 @@ nic_mca_write(int port, uint8_t val, void *priv)
nic_reset(dev);
nelog(2, "EtherNext/MC: Port=%04x, IRQ=%d\n", dev->base_address, dev->base_irq);
}
}
static uint8_t
nic_mca_feedb(void *priv)
{
@@ -915,7 +893,6 @@ nic_mca_feedb(void *priv)
return (dev->pos_regs[2] & 0x01);
}
static void *
nic_init(const device_t *info)
{
@@ -950,8 +927,7 @@ nic_init(const device_t *info)
dev->bios_addr = 0x00000;
dev->has_bios = 0;
}
}
else {
} else {
mca_add(nic_mca_read, nic_mca_write, nic_mca_feedb, NULL, dev);
}
}
@@ -995,8 +971,7 @@ nic_init(const device_t *info)
dev->maclocal[1] = 0x00;
dev->maclocal[2] = 0xD8;
rom = ROM_PATH_NE2000;
dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC | DP8390_FLAG_CHECK_CR |
DP8390_FLAG_CLEAR_IRQ);
dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC | DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ);
dp8390_mem_alloc(dev->dp8390, 0x4000, 0x4000);
break;
@@ -1007,8 +982,7 @@ nic_init(const device_t *info)
dev->pos_regs[0] = 0x1F;
dev->pos_regs[1] = 0x61;
rom = NULL;
dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC | DP8390_FLAG_CHECK_CR |
DP8390_FLAG_CLEAR_IRQ);
dp8390_set_defaults(dev->dp8390, DP8390_FLAG_EVEN_MAC | DP8390_FLAG_CHECK_CR | DP8390_FLAG_CLEAR_IRQ);
dp8390_mem_alloc(dev->dp8390, 0x4000, 0x4000);
break;
@@ -1100,16 +1074,10 @@ nic_init(const device_t *info)
if (dev->board == NE2K_RTL8029AS) {
memcpy(&dev->eeprom[0x02], dev->maclocal, 6);
dev->eeprom[0x76] =
dev->eeprom[0x7A] =
dev->eeprom[0x7E] = (PCI_DEVID&0xff);
dev->eeprom[0x77] =
dev->eeprom[0x7B] =
dev->eeprom[0x7F] = (PCI_DEVID>>8);
dev->eeprom[0x78] =
dev->eeprom[0x7C] = (PCI_VENDID&0xff);
dev->eeprom[0x79] =
dev->eeprom[0x7D] = (PCI_VENDID>>8);
dev->eeprom[0x76] = dev->eeprom[0x7A] = dev->eeprom[0x7E] = (PCI_DEVID & 0xff);
dev->eeprom[0x77] = dev->eeprom[0x7B] = dev->eeprom[0x7F] = (PCI_DEVID >> 8);
dev->eeprom[0x78] = dev->eeprom[0x7C] = (PCI_VENDID & 0xff);
dev->eeprom[0x79] = dev->eeprom[0x7D] = (PCI_VENDID >> 8);
} else {
memcpy(&dev->eeprom[0x12], rtl8019as_pnp_rom, sizeof(rtl8019as_pnp_rom));
@@ -1130,7 +1098,6 @@ nic_init(const device_t *info)
return (dev);
}
static void
nic_close(void *priv)
{

View File

@@ -233,7 +233,6 @@ pcap_log(const char *fmt, ...)
# define pcap_log(fmt, ...)
#endif
static void
net_pcap_rx_handler(uint8_t *user, const struct pcap_pkthdr *h, const uint8_t *bytes)
{
@@ -343,7 +342,6 @@ net_pcap_thread(void *priv)
if (pfd[NET_EVENT_RX].revents & POLLIN) {
f_pcap_dispatch(pcap->pcap, PCAP_PKT_BATCH, net_pcap_rx_handler, (u_char *) pcap);
}
}
pcap_log("PCAP: polling stopped.\n");
@@ -402,7 +400,8 @@ net_pcap_prepare(netdev_t *list)
strncpy(list->description, dev->name, sizeof(list->description) - 1);
}
list++; i++;
list++;
i++;
}
/* Release the memory. */
@@ -411,7 +410,6 @@ net_pcap_prepare(netdev_t *list)
return (i);
}
/*
* Initialize (Win)Pcap for use.
*

View File

@@ -54,8 +54,7 @@
#define PCI_REGSIZE 256 /* size of PCI space */
#pragma pack(1)
typedef struct RTNETETHERHDR
{
typedef struct RTNETETHERHDR {
uint8_t DstMac[6];
uint8_t SrcMac[6];
/** Ethernet frame type or frame size, depending on the kind of ethernet.
@@ -192,7 +191,6 @@ typedef struct RTNETETHERHDR
/** Calculates the full physical address. */
#define PHYSADDR(S, A) ((A) | (S)->GCUpperPhys)
static const uint8_t am79c961_pnp_rom[] = {
0x04, 0x96, 0x55, 0xaa, 0x00, 0x00, 0x00, 0x00, 0x00, /* ADV55AA, dummy checksum (filled in by isapnp_add_card) */
0x0a, 0x10, 0x00, /* PnP version 1.0, vendor version 0.0 */
@@ -207,7 +205,6 @@ static const uint8_t am79c961_pnp_rom[] = {
0x79, 0x00 /* end tag, dummy checksum (filled in by isapnp_add_card) */
};
typedef struct {
mem_mapping_t mmio_mapping;
const char *name;
@@ -267,8 +264,7 @@ typedef struct {
/** @todo All structs: big endian? */
struct INITBLK16
{
struct INITBLK16 {
uint16_t mode; /**< copied into csr15 */
uint16_t padr1; /**< MAC 0..15 */
uint16_t padr2; /**< MAC 16..32 */
@@ -287,8 +283,7 @@ struct INITBLK16
/** bird: I've changed the type for the bitfields. They should only be 16-bit all together.
* frank: I've changed the bitfiled types to uint32_t to prevent compiler warnings. */
struct INITBLK32
{
struct INITBLK32 {
uint16_t mode; /**< copied into csr15 */
uint16_t res1 : 4; /**< reserved */
uint16_t rlen : 4; /**< number of receive descriptor ring entries */
@@ -307,8 +302,7 @@ struct INITBLK32
};
/** Transmit Message Descriptor */
typedef struct TMD
{
typedef struct TMD {
struct
{
uint32_t tbadr; /**< transmit buffer address */
@@ -348,8 +342,7 @@ typedef struct TMD
} TMD;
/** Receive Message Descriptor */
typedef struct RMD
{
typedef struct RMD {
struct
{
uint32_t rbadr; /**< receive buffer address */
@@ -396,7 +389,6 @@ static void pcnet_bcr_writew(nic_t *dev, uint16_t rap, uint16_t val);
static void pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val);
static int pcnetCanReceive(nic_t *dev);
#ifdef ENABLE_PCNET_LOG
int pcnet_do_log = ENABLE_PCNET_LOG;
@@ -415,7 +407,6 @@ pcnetlog(int lvl, const char *fmt, ...)
# define pcnetlog(lvl, fmt, ...)
#endif
static void
pcnet_do_irq(nic_t *dev, int issue)
{
@@ -443,7 +434,6 @@ pcnetIsLinkUp(nic_t *dev)
return !dev->fLinkTempDown && dev->fLinkUp;
}
/**
* Load transmit message descriptor
* Make sure we read the own flag first.
@@ -496,7 +486,6 @@ pcnetTmdLoad(nic_t *dev, TMD *tmd, uint32_t addr, int fRetIfNotOwn)
return !!tmd->tmd1.own;
}
/**
* Store transmit message descriptor and hand it over to the host (the VM guest).
* Make sure that all data are transmitted before we clear the own flag.
@@ -538,7 +527,6 @@ pcnetTmdStorePassHost(nic_t *dev, TMD *tmd, uint32_t addr)
}
}
/**
* Load receive message descriptor
* Make sure we read the own flag first.
@@ -592,7 +580,6 @@ pcnetRmdLoad(nic_t *dev, RMD *rmd, uint32_t addr, int fRetIfNotOwn)
return !!rmd->rmd1.own;
}
/**
* Store receive message descriptor and hand it over to the host (the VM guest).
* Make sure that all data are transmitted before we clear the own flag.
@@ -634,7 +621,6 @@ pcnetRmdStorePassHost(nic_t *dev, RMD *rmd, uint32_t addr)
}
}
/** Checks if it's a bad (as in invalid) RMD.*/
#define IS_RMD_BAD(rmd) ((rmd).rmd1.ones != 15)
@@ -671,10 +657,8 @@ lnc_mchash(const uint8_t *ether_addr)
int idx, bit;
uint8_t data;
for (idx = 0; idx < ETHER_ADDR_LEN; idx++)
{
for (data = *ether_addr++, bit = 0; bit < MULTICAST_FILTER_LEN; bit++)
{
for (idx = 0; idx < ETHER_ADDR_LEN; idx++) {
for (data = *ether_addr++, bit = 0; bit < MULTICAST_FILTER_LEN; bit++) {
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? LNC_POLYNOMIAL : 0);
data >>= 1;
}
@@ -757,7 +741,6 @@ static const uint32_t crctab[256] =
0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d,
};
static __inline int
padr_match(nic_t *dev, const uint8_t *buf, int size)
{
@@ -773,7 +756,8 @@ padr_match(nic_t *dev, const uint8_t *buf, int size)
result = !CSR_DRCVPA(dev) && !memcmp(hdr->ether_dhost, padr, 6);
pcnetlog(3, "%s: packet dhost=%02x:%02x:%02x:%02x:%02x:%02x, "
"padr=%02x:%02x:%02x:%02x:%02x:%02x => %d\n", dev->name,
"padr=%02x:%02x:%02x:%02x:%02x:%02x => %d\n",
dev->name,
hdr->ether_dhost[0], hdr->ether_dhost[1], hdr->ether_dhost[2],
hdr->ether_dhost[3], hdr->ether_dhost[4], hdr->ether_dhost[5],
padr[0], padr[1], padr[2], padr[3], padr[4], padr[5], result);
@@ -781,7 +765,6 @@ padr_match(nic_t *dev, const uint8_t *buf, int size)
return result;
}
static __inline int
padr_bcast(nic_t *dev, const uint8_t *buf, size_t size)
{
@@ -792,7 +775,6 @@ padr_bcast(nic_t *dev, const uint8_t *buf, size_t size)
return result;
}
static int
ladr_match(nic_t *dev, const uint8_t *buf, size_t size)
{
@@ -814,7 +796,6 @@ ladr_match(nic_t *dev, const uint8_t *buf, size_t size)
return 0;
}
/**
* Get the receive descriptor ring address with a given index.
*/
@@ -824,7 +805,6 @@ pcnetRdraAddr(nic_t *dev, int idx)
return dev->GCRDRA + ((CSR_RCVRL(dev) - idx) << dev->iLog2DescSize);
}
/**
* Get the transmit descriptor ring address with a given index.
*/
@@ -834,7 +814,6 @@ pcnetTdraAddr(nic_t *dev, int idx)
return dev->GCTDRA + ((CSR_XMTRL(dev) - idx) << dev->iLog2DescSize);
}
static void
pcnetSoftReset(nic_t *dev)
{
@@ -891,7 +870,6 @@ pcnetSoftReset(nic_t *dev)
dev->aCSR[124] = 0x0000;
}
static void
pcnetUpdateIrq(nic_t *dev)
{
@@ -902,9 +880,7 @@ pcnetUpdateIrq(nic_t *dev)
csr0 &= ~0x0080; /* clear INTR */
if (((csr0 & ~dev->aCSR[3]) & 0x5f00) ||
(((dev->aCSR[4]>>1) & ~dev->aCSR[4]) & 0x0115) ||
(((dev->aCSR[5]>>1) & dev->aCSR[5]) & 0x0048)) {
if (((csr0 & ~dev->aCSR[3]) & 0x5f00) || (((dev->aCSR[4] >> 1) & ~dev->aCSR[4]) & 0x0115) || (((dev->aCSR[5] >> 1) & dev->aCSR[5]) & 0x0048)) {
iISR = !!(csr0 & 0x0040); /* CSR_INEA */
csr0 |= 0x0080; /* set INTR */
}
@@ -936,7 +912,6 @@ pcnetUpdateIrq(nic_t *dev)
dev->iISR = iISR;
}
static void
pcnetInit(nic_t *dev)
{
@@ -945,7 +920,8 @@ pcnetInit(nic_t *dev)
/** @todo Documentation says that RCVRL and XMTRL are stored as two's complement!
* Software is allowed to write these registers directly. */
#define PCNET_INIT() do { \
#define PCNET_INIT() \
do { \
dma_bm_read(PHYSADDR(dev, CSR_IADR(dev)), \
(uint8_t *) &initblk, sizeof(initblk), dev->transfer_size); \
dev->aCSR[15] = le16_to_cpu(initblk.mode); \
@@ -1022,7 +998,6 @@ pcnetInit(nic_t *dev)
dev->aCSR[0] &= ~0x0004; /* clear STOP bit */
}
/**
* Start RX/TX operation.
*/
@@ -1044,7 +1019,6 @@ pcnetStart(nic_t *dev)
timer_set_delay_u64(&dev->timer, 2000 * TIMER_USEC);
}
/**
* Stop RX/TX operation.
*/
@@ -1058,7 +1032,6 @@ pcnetStop(nic_t *dev)
timer_disable(&dev->timer);
}
/**
* Poll Receive Descriptor Table Entry and cache the results in the appropriate registers.
* Note: Once a descriptor belongs to the network card (this driver), it cannot be changed
@@ -1138,7 +1111,6 @@ pcnetRdtePoll(nic_t *dev)
}
}
/**
* Poll Transmit Descriptor Table Entry
* @return true if transmit descriptors available
@@ -1176,7 +1148,6 @@ pcnetTdtePoll(nic_t *dev, TMD *tmd)
}
}
/**
* Poll Transmit Descriptor Table Entry
* @return true if transmit descriptors available
@@ -1189,8 +1160,7 @@ pcnetCalcPacketLen(nic_t *dev, int cb)
uint32_t iDesc = CSR_XMTRC(dev);
uint32_t iFirstDesc = iDesc;
do
{
do {
/* Advance the ring counter */
if (iDesc < 2)
iDesc = CSR_XMTRL(dev);
@@ -1224,7 +1194,6 @@ pcnetCalcPacketLen(nic_t *dev, int cb)
return cbPacket;
}
/**
* Write data into guest receive buffers.
*/
@@ -1287,7 +1256,8 @@ pcnetReceiveNoSync(void *priv, uint8_t *buf, int size)
GCPhys += cb;
}
dev->aCSR[0] |= 0x1000; /* Set MISS flag */
CSR_MISSC(dev)++;
CSR_MISSC(dev)
++;
pcnetlog(2, "%s: pcnetReceiveNoSync: packet missed\n", dev->name);
} else {
RTNETETHERHDR *pEth = (RTNETETHERHDR *) buf;
@@ -1504,8 +1474,7 @@ pcnetAsyncTransmit(nic_t *dev)
/* Don't continue sending packets when the link is down. */
if ((!pcnetIsLinkUp(dev)
&& dev->cLinkDownReported > PCNET_MAX_LINKDOWN_REPORTED)
)
&& dev->cLinkDownReported > PCNET_MAX_LINKDOWN_REPORTED))
break;
pcnetlog(3, "%s: TMDLOAD %#010x\n", dev->name, PHYSADDR(dev, CSR_CXDA(dev)));
@@ -1581,7 +1550,8 @@ pcnetAsyncTransmit(nic_t *dev)
if (CSR_XMTRC(dev) < 2) {
CSR_XMTRC(dev) = CSR_XMTRL(dev);
} else {
CSR_XMTRC(dev)--;
CSR_XMTRC(dev)
--;
}
} else if (tmd.tmd1.stp) {
/*
@@ -1603,7 +1573,8 @@ pcnetAsyncTransmit(nic_t *dev)
if (CSR_XMTRC(dev) < 2)
CSR_XMTRC(dev) = CSR_XMTRL(dev);
else
CSR_XMTRC(dev)--;
CSR_XMTRC(dev)
--;
TMD dummy;
if (!pcnetTdtePoll(dev, &dummy)) {
@@ -1657,7 +1628,8 @@ pcnetAsyncTransmit(nic_t *dev)
if (CSR_XMTRC(dev) < 2)
CSR_XMTRC(dev) = CSR_XMTRL(dev);
else
CSR_XMTRC(dev)--;
CSR_XMTRC(dev)
--;
break;
}
} /* the loop */
@@ -1683,7 +1655,6 @@ pcnetAsyncTransmit(nic_t *dev)
}
}
/**
* Poll for changes in RX and TX descriptor rings.
*/
@@ -1704,7 +1675,6 @@ pcnetPollRxTx(nic_t *dev)
pcnetAsyncTransmit(dev);
}
static void
pcnetPollTimer(void *p)
{
@@ -1721,7 +1691,6 @@ pcnetPollTimer(void *p)
pcnetPollRxTx(dev);
}
static void
pcnetHardReset(nic_t *dev)
{
@@ -1758,7 +1727,6 @@ pcnetHardReset(nic_t *dev)
pcnetSoftReset(dev);
}
static void
pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
{
@@ -1944,7 +1912,6 @@ pcnet_csr_writew(nic_t *dev, uint16_t rap, uint16_t val)
dev->aCSR[rap] = val;
}
/**
* Encode a 32-bit link speed into a custom 16-bit floating-point value
*/
@@ -1960,7 +1927,6 @@ pcnetLinkSpd(uint32_t speed)
return (exp << 13) | speed;
}
static uint16_t
pcnet_csr_readw(nic_t *dev, uint16_t rap)
{
@@ -1989,7 +1955,6 @@ pcnet_csr_readw(nic_t *dev, uint16_t rap)
return val;
}
static void
pcnet_bcr_writew(nic_t *dev, uint16_t rap, uint16_t val)
{
@@ -2233,7 +2198,6 @@ pcnet_bcr_readw(nic_t *dev, uint16_t rap)
return val;
}
static void
pcnet_word_write(nic_t *dev, uint32_t addr, uint16_t val)
{
@@ -2315,7 +2279,6 @@ skip_update_irq:
return (val);
}
static void
pcnet_dword_write(nic_t *dev, uint32_t addr, uint32_t val)
{
@@ -2340,7 +2303,6 @@ pcnet_dword_write(nic_t *dev, uint32_t addr, uint32_t val)
};
}
static uint32_t
pcnet_dword_read(nic_t *dev, uint32_t addr)
{
@@ -2375,7 +2337,6 @@ skip_update_irq:
return (val);
}
static void
pcnet_aprom_writeb(nic_t *dev, uint32_t addr, uint32_t val)
{
@@ -2384,7 +2345,6 @@ pcnet_aprom_writeb(nic_t *dev, uint32_t addr, uint32_t val)
dev->aPROM[addr & 0x0f] = val & 0xff;
}
static uint32_t
pcnet_aprom_readb(nic_t *dev, uint32_t addr)
{
@@ -2393,7 +2353,6 @@ pcnet_aprom_readb(nic_t *dev, uint32_t addr)
return val;
}
static void
pcnet_write(nic_t *dev, uint32_t addr, uint32_t val, int len)
{
@@ -2421,28 +2380,24 @@ pcnet_write(nic_t *dev, uint32_t addr, uint32_t val, int len)
}
}
static void
pcnet_writeb(uint16_t addr, uint8_t val, void *priv)
{
pcnet_write((nic_t *) priv, addr, val, 1);
}
static void
pcnet_writew(uint16_t addr, uint16_t val, void *priv)
{
pcnet_write((nic_t *) priv, addr, val, 2);
}
static void
pcnet_writel(uint16_t addr, uint32_t val, void *priv)
{
pcnet_write((nic_t *) priv, addr, val, 4);
}
static uint32_t
pcnet_read(nic_t *dev, uint32_t addr, int len)
{
@@ -2457,8 +2412,7 @@ pcnet_read(nic_t *dev, uint32_t addr, int len)
else if (!BCR_DWIO(dev) && ((addr & 1) == 0) && len == 2)
retval = pcnet_aprom_readb(dev, addr) | (pcnet_aprom_readb(dev, addr + 1) << 8);
else if (BCR_DWIO(dev) && ((addr & 3) == 0) && len == 4) {
retval = pcnet_aprom_readb(dev, addr) | (pcnet_aprom_readb(dev, addr + 1) << 8) |
(pcnet_aprom_readb(dev, addr + 2) << 16) | (pcnet_aprom_readb(dev, addr + 3) << 24);
retval = pcnet_aprom_readb(dev, addr) | (pcnet_aprom_readb(dev, addr + 1) << 8) | (pcnet_aprom_readb(dev, addr + 2) << 16) | (pcnet_aprom_readb(dev, addr + 3) << 24);
}
} else {
if (len == 1)
@@ -2473,70 +2427,60 @@ pcnet_read(nic_t *dev, uint32_t addr, int len)
return (retval);
}
static uint8_t
pcnet_readb(uint16_t addr, void *priv)
{
return (pcnet_read((nic_t *) priv, addr, 1));
}
static uint16_t
pcnet_readw(uint16_t addr, void *priv)
{
return (pcnet_read((nic_t *) priv, addr, 2));
}
static uint32_t
pcnet_readl(uint16_t addr, void *priv)
{
return (pcnet_read((nic_t *) priv, addr, 4));
}
static void
pcnet_mmio_writeb(uint32_t addr, uint8_t val, void *priv)
{
pcnet_write((nic_t *) priv, addr, val, 1);
}
static void
pcnet_mmio_writew(uint32_t addr, uint16_t val, void *priv)
{
pcnet_write((nic_t *) priv, addr, val, 2);
}
static void
pcnet_mmio_writel(uint32_t addr, uint32_t val, void *priv)
{
pcnet_write((nic_t *) priv, addr, val, 4);
}
static uint8_t
pcnet_mmio_readb(uint32_t addr, void *priv)
{
return (pcnet_read((nic_t *) priv, addr, 1));
}
static uint16_t
pcnet_mmio_readw(uint32_t addr, void *priv)
{
return (pcnet_read((nic_t *) priv, addr, 2));
}
static uint32_t
pcnet_mmio_readl(uint32_t addr, void *priv)
{
return (pcnet_read((nic_t *) priv, addr, 4));
}
static void
pcnet_mem_init(nic_t *dev, uint32_t addr)
{
@@ -2546,21 +2490,18 @@ pcnet_mem_init(nic_t *dev, uint32_t addr)
NULL, MEM_MAPPING_EXTERNAL, dev);
}
static void
pcnet_mem_set_addr(nic_t *dev, uint32_t base)
{
mem_mapping_set_addr(&dev->mmio_mapping, base, 32);
}
static void
pcnet_mem_disable(nic_t *dev)
{
mem_mapping_disable(&dev->mmio_mapping);
}
static void
pcnet_ioremove(nic_t *dev, uint16_t addr, int len)
{
@@ -2575,7 +2516,6 @@ pcnet_ioremove(nic_t *dev, uint16_t addr, int len)
}
}
static void
pcnet_ioset(nic_t *dev, uint16_t addr, int len)
{
@@ -2592,7 +2532,6 @@ pcnet_ioset(nic_t *dev, uint16_t addr, int len)
}
}
static void
pcnet_pci_write(int func, int addr, uint8_t val, void *p)
{
@@ -2625,7 +2564,10 @@ pcnet_pci_write(int func, int addr, uint8_t val, void *p)
pcnet_pci_regs[addr] = val;
break;
case 0x10: case 0x11: case 0x12: case 0x13:
case 0x10:
case 0x11:
case 0x12:
case 0x13:
/* I/O Base set. */
/* First, remove the old I/O. */
pcnet_ioremove(dev, dev->PCIBase, 32);
@@ -2643,7 +2585,9 @@ pcnet_pci_write(int func, int addr, uint8_t val, void *p)
}
return;
case 0x15: case 0x16: case 0x17:
case 0x15:
case 0x16:
case 0x17:
/* MMIO Base set. */
/* First, remove the old I/O. */
pcnet_mem_disable(dev);
@@ -2668,7 +2612,6 @@ pcnet_pci_write(int func, int addr, uint8_t val, void *p)
}
}
static uint8_t
pcnet_pci_read(int func, int addr, void *p)
{
@@ -3065,7 +3008,6 @@ pcnet_init(const device_t *info)
return (dev);
}
static void
pcnet_close(void *priv)
{
@@ -3078,7 +3020,6 @@ pcnet_close(void *priv)
if (dev) {
free(dev);
dev = NULL;
}
}

View File

@@ -36,7 +36,6 @@
#include <86box/network.h>
#include <86box/net_plip.h>
enum {
PLIP_START = 0x00,
PLIP_TX_LEN_LSB_LOW = 0x10,
@@ -75,12 +74,10 @@ typedef struct
netcard_t *card;
} plip_t;
static void plip_receive_packet(plip_t *dev);
plip_t *instance;
#ifdef ENABLE_PLIP_LOG
int plip_do_log = ENABLE_PLIP_LOG;
@@ -99,7 +96,6 @@ plip_log(uint8_t lvl, const char *fmt, ...)
# define plip_log(lvl, fmt, ...)
#endif
static void
timeout_timer(void *priv)
{
@@ -123,7 +119,6 @@ timeout_timer(void *priv)
timer_disable(&dev->timeout_timer);
}
static void
plip_write_data(uint8_t val, void *priv)
{
@@ -345,7 +340,6 @@ plip_write_data(uint8_t val, void *priv)
timer_set_delay_u64(&dev->timeout_timer, 1000000 * TIMER_USEC);
}
static void
plip_write_ctrl(uint8_t val, void *priv)
{
@@ -359,7 +353,6 @@ plip_write_ctrl(uint8_t val, void *priv)
timer_set_delay_u64(&dev->rx_timer, ISACONST);
}
static uint8_t
plip_read_status(void *priv)
{
@@ -370,7 +363,6 @@ plip_read_status(void *priv)
return dev->status;
}
static void
plip_receive_packet(plip_t *dev)
{
@@ -403,7 +395,6 @@ plip_receive_packet(plip_t *dev)
lpt_irq(dev->lpt, 1);
}
/* This timer defers a call to plip_receive_packet to
the next ISA clock, in order to avoid IRQ weirdness. */
static void
@@ -416,7 +407,6 @@ rx_timer(void *priv)
timer_disable(&dev->rx_timer);
}
static int
plip_rx(void *priv, uint8_t *buf, int io_len)
{
@@ -442,7 +432,6 @@ plip_rx(void *priv, uint8_t *buf, int io_len)
return 1;
}
static void *
plip_lpt_init(void *lpt)
{
@@ -464,7 +453,6 @@ plip_lpt_init(void *lpt)
return dev;
}
static void *
plip_net_init(const device_t *info)
{
@@ -481,7 +469,6 @@ plip_net_init(const device_t *info)
return instance;
}
static void
plip_close(void *priv)
{

View File

@@ -75,7 +75,6 @@ typedef struct {
#ifdef ENABLE_SLIRP_LOG
int slirp_do_log = ENABLE_SLIRP_LOG;
static void
slirp_log(const char *fmt, ...)
{
@@ -91,21 +90,18 @@ slirp_log(const char *fmt, ...)
# define slirp_log(fmt, ...)
#endif
static void
net_slirp_guest_error(const char *msg, void *opaque)
{
slirp_log("SLiRP: guest_error(): %s\n", msg);
}
static int64_t
net_slirp_clock_get_ns(void *opaque)
{
return (int64_t) ((double) tsc / cpuclock * 1000000000.0);
}
static void *
net_slirp_timer_new(SlirpTimerCb cb, void *cb_opaque, void *opaque)
{
@@ -114,7 +110,6 @@ net_slirp_timer_new(SlirpTimerCb cb, void *cb_opaque, void *opaque)
return timer;
}
static void
net_slirp_timer_free(void *timer, void *opaque)
{
@@ -122,14 +117,12 @@ net_slirp_timer_free(void *timer, void *opaque)
free(timer);
}
static void
net_slirp_timer_mod(void *timer, int64_t expire_timer, void *opaque)
{
timer_on_auto(timer, expire_timer * 1000);
}
static void
net_slirp_register_poll_fd(int fd, void *opaque)
{
@@ -137,7 +130,6 @@ net_slirp_register_poll_fd(int fd, void *opaque)
(void) opaque;
}
static void
net_slirp_unregister_poll_fd(int fd, void *opaque)
{
@@ -145,14 +137,12 @@ net_slirp_unregister_poll_fd(int fd, void *opaque)
(void) opaque;
}
static void
net_slirp_notify(void *opaque)
{
(void) opaque;
}
ssize_t
net_slirp_send_packet(const void *qp, size_t pkt_len, void *opaque)
{
@@ -167,7 +157,6 @@ net_slirp_send_packet(const void *qp, size_t pkt_len, void *opaque)
return pkt_len;
}
#ifdef _WIN32
static int
net_slirp_add_poll(int fd, int events, void *opaque)
@@ -341,7 +330,6 @@ net_slirp_thread(void *priv)
default:
slirp_pollfds_poll(slirp->slirp, ret == WAIT_FAILED, net_slirp_get_revents, slirp);
break;
}
}

View File

@@ -120,7 +120,6 @@ typedef struct {
if_chip, board_chip;
} wd_t;
#ifdef ENABLE_WD_LOG
int wd_do_log = ENABLE_WD_LOG;
@@ -139,10 +138,8 @@ wdlog(const char *fmt, ...)
# define wdlog(fmt, ...)
#endif
static const int we_int_table[4] = { 2, 3, 4, 7 };
static void
wd_interrupt(void *priv, int set)
{
@@ -157,7 +154,6 @@ wd_interrupt(void *priv, int set)
picintc(1 << dev->irq);
}
/* reset - restore state to power-up, cancelling all i/o */
static void
wd_reset(void *priv)
@@ -169,7 +165,6 @@ wd_reset(void *priv)
dp8390_reset(dev->dp8390);
}
static void
wd_soft_reset(void *priv)
{
@@ -178,7 +173,6 @@ wd_soft_reset(void *priv)
dp8390_soft_reset(dev->dp8390);
}
static uint8_t
wd_ram_read(uint32_t addr, void *priv)
{
@@ -197,7 +191,6 @@ wd_ram_write(uint32_t addr, uint8_t val, void *priv)
wdlog("WD80x3: RAM Write: addr=%06x, val=%02x\n", addr & (dev->ram_size - 1), val);
}
static int
wd_get_irq_index(wd_t *dev)
{
@@ -214,7 +207,6 @@ wd_get_irq_index(wd_t *dev)
return 0;
}
static uint32_t
wd_smc_read(wd_t *dev, uint32_t off)
{
@@ -284,9 +276,7 @@ wd_smc_read(wd_t *dev, uint32_t off)
case 0x0f:
/*This has to return the byte that adds up to 0xFF*/
checksum = (dev->dp8390->physaddr[0] + dev->dp8390->physaddr[1] + dev->dp8390->physaddr[2] +
dev->dp8390->physaddr[3] + dev->dp8390->physaddr[4] + dev->dp8390->physaddr[5] +
dev->board_chip);
checksum = (dev->dp8390->physaddr[0] + dev->dp8390->physaddr[1] + dev->dp8390->physaddr[2] + dev->dp8390->physaddr[3] + dev->dp8390->physaddr[4] + dev->dp8390->physaddr[5] + dev->board_chip);
retval = 0xff - (checksum & 0xff);
break;
@@ -298,7 +288,6 @@ wd_smc_read(wd_t *dev, uint32_t off)
return (retval);
}
static void
wd_set_ram(wd_t *dev)
{
@@ -320,7 +309,6 @@ wd_set_ram(wd_t *dev)
wdlog("%s: RAM now %sabled\n", dev->name, (dev->msr & WE_MSR_ENABLE_RAM) ? "en" : "dis");
}
static void
wd_smc_write(wd_t *dev, uint32_t off, uint32_t val)
{
@@ -403,7 +391,6 @@ wd_smc_write(wd_t *dev, uint32_t off, uint32_t val)
}
}
static uint8_t
wd_read(uint16_t addr, void *priv, int len)
{
@@ -439,7 +426,6 @@ wd_read(uint16_t addr, void *priv, int len)
return (retval);
}
static uint8_t
wd_readb(uint16_t addr, void *priv)
{
@@ -448,7 +434,6 @@ wd_readb(uint16_t addr, void *priv)
return (wd_read(addr, dev, 1));
}
static uint16_t
wd_readw(uint16_t addr, void *priv)
{
@@ -457,7 +442,6 @@ wd_readw(uint16_t addr, void *priv)
return (wd_read(addr, dev, 2));
}
static void
wd_write(uint16_t addr, uint8_t val, void *priv, unsigned int len)
{
@@ -486,21 +470,18 @@ wd_write(uint16_t addr, uint8_t val, void *priv, unsigned int len)
}
}
static void
wd_writeb(uint16_t addr, uint8_t val, void *priv)
{
wd_write(addr, val, priv, 1);
}
static void
wd_writew(uint16_t addr, uint16_t val, void *priv)
{
wd_write(addr, val & 0xff, priv, 2);
}
static void
wd_io_set(wd_t *dev, uint16_t addr)
{
@@ -515,7 +496,6 @@ wd_io_set(wd_t *dev, uint16_t addr)
}
}
static void
wd_io_remove(wd_t *dev, uint16_t addr)
{
@@ -530,7 +510,6 @@ wd_io_remove(wd_t *dev, uint16_t addr)
}
}
static uint8_t
wd_mca_read(int port, void *priv)
{
@@ -539,8 +518,10 @@ wd_mca_read(int port, void *priv)
return (dev->pos_regs[port & 7]);
}
#define MCA_6FC0_IRQS { 3, 4, 10, 15 }
#define MCA_6FC0_IRQS \
{ \
3, 4, 10, 15 \
}
static void
wd_mca_write(int port, uint8_t val, void *priv)
@@ -549,7 +530,8 @@ wd_mca_write(int port, uint8_t val, void *priv)
int8_t irq[4] = MCA_6FC0_IRQS;
/* MCA does not write registers below 0x0100. */
if (port < 0x0102) return;
if (port < 0x0102)
return;
/* Save the MCA register value. */
dev->pos_regs[port & 7] = val;
@@ -589,7 +571,8 @@ wd_8013epa_mca_write(int port, uint8_t val, void *priv)
wd_t *dev = (wd_t *) priv;
/* MCA does not write registers below 0x0100. */
if (port < 0x0102) return;
if (port < 0x0102)
return;
/* Save the MCA register value. */
dev->pos_regs[port & 7] = val;
@@ -645,14 +628,12 @@ wd_8013epa_mca_write(int port, uint8_t val, void *priv)
dev->base_address, dev->irq, dev->ram_addr);
}
static uint8_t
wd_mca_feedb(void *priv)
{
return 1;
}
static void *
wd_init(const device_t *info)
{
@@ -798,7 +779,6 @@ wd_init(const device_t *info)
return (dev);
}
static void
wd_close(void *priv)
{

View File

@@ -92,7 +92,6 @@ static const device_t net_none_device = {
.config = NULL
};
static const device_t *net_cards[] = {
&net_none_device,
&threec503_device,
@@ -124,7 +123,6 @@ int net_card_current = 0;
int network_ndev;
netdev_t network_devs[NET_HOST_INTF_MAX];
/* Local variables. */
#ifdef ENABLE_NETWORK_LOG
@@ -132,7 +130,6 @@ int network_do_log = ENABLE_NETWORK_LOG;
static FILE *network_dump = NULL;
static mutex_t *network_dump_mutex;
static void
network_log(const char *fmt, ...)
{
@@ -145,7 +142,6 @@ network_log(const char *fmt, ...)
}
}
static void
network_dump_packet(netpkt_t *pkt)
{
@@ -183,7 +179,6 @@ network_dump_packet(netpkt_t *pkt)
# define network_dump_packet(pkt)
#endif
#ifdef _WIN32
static void
network_winsock_clean(void)
@@ -248,7 +243,6 @@ network_queue_init(netqueue_t *queue)
queue->packets[i].data = calloc(1, NET_MAX_FRAME);
queue->packets[i].len = 0;
}
}
static bool
@@ -300,7 +294,8 @@ network_queue_put_swap(netqueue_t *queue, netpkt_t *src_pkt)
}
static int
network_queue_get_swap(netqueue_t *queue, netpkt_t *dst_pkt) {
network_queue_get_swap(netqueue_t *queue, netpkt_t *dst_pkt)
{
if (network_queue_empty(queue))
return 0;
@@ -340,7 +335,6 @@ network_queue_clear(netqueue_t *queue)
queue->tail = queue->head = 0;
}
static void
network_rx_queue(void *priv)
{
@@ -402,7 +396,6 @@ network_rx_queue(void *priv)
card->led_timer += timer_period;
}
/*
* Attach a network card to the system.
*
@@ -474,7 +467,6 @@ netcard_close(netcard_t *card)
free(card);
}
/* Stop any network activity. */
void
network_close(void)
@@ -487,7 +479,6 @@ network_close(void)
network_log("NETWORK: closed.\n");
}
/*
* Reset the network card(s).
*
@@ -517,7 +508,6 @@ network_reset(void)
}
}
/* Queue a packet for transmission to one of the network providers. */
void
network_tx(netcard_t *card, uint8_t *bufp, int len)
@@ -525,7 +515,8 @@ network_tx(netcard_t *card, uint8_t *bufp, int len)
network_queue_put(&card->queues[NET_QUEUE_TX_VM], bufp, len);
}
int network_tx_pop(netcard_t *card, netpkt_t *out_pkt)
int
network_tx_pop(netcard_t *card, netpkt_t *out_pkt)
{
int ret = 0;
@@ -536,7 +527,8 @@ int network_tx_pop(netcard_t *card, netpkt_t *out_pkt)
return ret;
}
int network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size)
int
network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size)
{
int pkt_count = 0;
@@ -553,7 +545,8 @@ int network_tx_popv(netcard_t *card, netpkt_t *pkt_vec, int vec_size)
return pkt_count;
}
int network_rx_put(netcard_t *card, uint8_t *bufp, int len)
int
network_rx_put(netcard_t *card, uint8_t *bufp, int len)
{
int ret = 0;
@@ -564,7 +557,8 @@ int network_rx_put(netcard_t *card, uint8_t *bufp, int len)
return ret;
}
int network_rx_put_pkt(netcard_t *card, netpkt_t *pkt)
int
network_rx_put_pkt(netcard_t *card, netpkt_t *pkt)
{
int ret = 0;
@@ -611,7 +605,6 @@ network_dev_to_id(char *devname)
return (-1);
}
/* UI */
int
network_dev_available(int id)
@@ -636,7 +629,6 @@ network_available(void)
return available;
}
/* UI */
int
network_card_available(int card)
@@ -647,7 +639,6 @@ network_card_available(int card)
return (1);
}
/* UI */
const device_t *
network_card_getdevice(int card)
@@ -655,17 +646,16 @@ network_card_getdevice(int card)
return (net_cards[card]);
}
/* UI */
int
network_card_has_config(int card)
{
if (!net_cards[card]) return(0);
if (!net_cards[card])
return (0);
return (device_has_config(net_cards[card]) ? 1 : 0);
}
/* UI */
char *
network_card_get_internal_name(int card)
@@ -673,7 +663,6 @@ network_card_get_internal_name(int card)
return device_get_internal_name(net_cards[card]);
}
/* UI */
int
network_card_get_from_internal_name(char *s)

View File

@@ -58,10 +58,8 @@
#include <86box/plat.h>
#include <86box/plat_dynld.h>
static void *pcap_handle; /* handle to WinPcap DLL */
/* Pointers to the real functions. */
static int (*f_pcap_findalldevs)(pcap_if_t **, char *);
static void (*f_pcap_freealldevs)(pcap_if_t *);
@@ -79,13 +77,11 @@ static dllimp_t pcap_imports[] = {
// clang-format on
};
typedef struct {
char device[128];
char description[128];
} capdev_t;
/* Retrieve an easy-to-use list of devices. */
static int
get_devlist(capdev_t *list)
@@ -116,7 +112,6 @@ get_devlist(capdev_t *list)
return (i);
}
/* Simple HEXDUMP routine for raw data. */
static void
hex_dump(unsigned char *bufp, int len)
@@ -150,7 +145,6 @@ hex_dump(unsigned char *bufp, int len)
}
}
/* Print a standard Ethernet MAC address. */
static void
eth_praddr(unsigned char *ptr)
@@ -159,7 +153,6 @@ eth_praddr(unsigned char *ptr)
ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5]);
}
/* Print a standard Ethernet header. */
static int
eth_prhdr(unsigned char *ptr)
@@ -176,7 +169,6 @@ eth_prhdr(unsigned char *ptr)
return (14);
}
/* Capture packets from the network, and print them. */
static int
start_cap(char *dev)
@@ -203,10 +195,12 @@ start_cap(char *dev)
printf("Listening on '%s'..\n", dev);
for (;;) {
rc = f_pcap_next_ex(pcap, &hdr, &pkt);
if (rc < 0) break;
if (rc < 0)
break;
/* Did we time out? */
if (rc == 0) continue;
if (rc == 0)
continue;
/* Convert the timestamp to readable format. */
now = hdr->ts.tv_sec;
@@ -226,7 +220,6 @@ start_cap(char *dev)
return (0);
}
/* Show a list of available network interfaces. */
static void
show_devs(capdev_t *list, int num)
@@ -250,7 +243,6 @@ show_devs(capdev_t *list, int num)
}
}
void
pclog(const char *fmt, ...)
{
@@ -261,7 +253,6 @@ pclog(const char *fmt, ...)
va_end(ap);
}
int
main(int argc, char **argv)
{